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81. 发明申请

US20120193687A1 REDUCED S/D CONTACT RESISTANCE OF III-V MOSFET USING LOW TEMPERATURE METAL-INDUCED CRYSTALLIZATION OF n+ Ge 有权
标题翻译：使用n + Ge低温金属诱导结晶的III-V MOSFET的降低的S / D接触电阻
公开(公告)号：US20120193687A1
公开(公告)日：2012-08-02
申请号：US13017127
申请日：2011-01-31
申请人： Jeehwan Kim , Jin-Hong Park , Devendra Sadana , Kuen-Ting Shiu
发明人： Jeehwan Kim , Jin-Hong Park , Devendra Sadana , Kuen-Ting Shiu
IPC分类号： H01L29/772 , H01L21/28
CPC分类号： H01L29/20 , H01L21/26513 , H01L21/28575 , H01L29/0847 , H01L29/267 , H01L29/41783 , H01L29/452 , H01L29/66522 , H01L29/66628 , H01L29/78
摘要： Embodiments of this invention provide a method to fabricate an electrical contact. The method includes providing a substrate of a compound Group III-V semiconductor material having at least one electrically conducting doped region adjacent to a surface of the substrate. The method further includes fabricating the electrical contact to the at least one electrically conducting doped region by depositing a single crystal layer of germanium over the surface of the substrate so as to at least partially overlie the at least one electrically conducting doped region, converting the single crystal layer of germanium into a layer of amorphous germanium by implanting a dopant, forming a metal layer over exposed surfaces of the amorphous germanium layer, and performing a metal-induced crystallization (MIC) process on the amorphous germanium layer having the overlying metal layer to convert the amorphous germanium layer to a crystalline germanium layer and to activate the implanted dopant. The electrical contact can be a source or a drain contact of a transistor.
摘要翻译：本发明的实施例提供一种制造电接触的方法。该方法包括提供化合物III-V族半导体材料的衬底，其具有与衬底的表面相邻的至少一个导电掺杂区域。该方法还包括通过在衬底的表面上沉积锗的单晶层以至少部分地覆盖在至少一个导电掺杂区域上来将至少一个导电掺杂区域的电接触制造到该至少一个导电掺杂区域，通过注入掺杂剂，在非晶锗层的暴露表面上形成金属层，并对具有上层金属层的非晶锗层进行金属诱导结晶（MIC）工艺，将锗的晶体层分解成无定形锗层，将无定形锗层转化为结晶锗层并激活注入的掺杂剂。电接触可以是晶体管的源极或漏极接触。

82. 发明授权

US07754008B2 Method of forming dislocation-free strained thin films 失效
标题翻译：形成无位错应变薄膜的方法
公开(公告)号：US07754008B2
公开(公告)日：2010-07-13
申请号：US11458628
申请日：2006-07-19
申请人： Ya-Hong Xie , Jeehwan Kim
发明人： Ya-Hong Xie , Jeehwan Kim
IPC分类号： H01L21/324
CPC分类号： C30B29/06 , H01L21/02532 , H01L21/02694 , H01L21/76254
摘要： A method of forming a stressed thin film on a substrate includes forming a plurality of islands on a viscous layer that is present on a surface of a substrate. Adjacent islands are bridged with a stressor layer. The structure is annealed at an elevated temperature above the glass flow temperature of the viscous layer to transfer at least a portion of the stress from the stressor layer to the underlying islands. The bridges are then removed to expose the stressed islands of thin film on the substrate.
摘要翻译：在衬底上形成应力薄膜的方法包括在存在于衬底的表面上的粘性层上形成多个岛。邻近的岛屿与应激源层桥接。该结构在高于粘性层的玻璃流动温度的高温下退火，以将至少一部分应力从应力层转移到下面的岛。然后去除桥接以暴露衬底上的应力薄膜薄膜。

83. 发明申请

US20070111468A1 METHOD FOR FABRICATING DISLOCATION-FREE STRESSED THIN FILMS 审中-公开
标题翻译：用于制备无分裂应力薄膜的方法
公开(公告)号：US20070111468A1
公开(公告)日：2007-05-17
申请号：US11458641
申请日：2006-07-19
申请人： Ya-Hong Xie , Jeehwan Kim
发明人： Ya-Hong Xie , Jeehwan Kim
IPC分类号： H01L21/76
CPC分类号： H01L21/76256
摘要： A method of forming a stressed thin film on a substrate includes the steps of depositing a thin film of silicon on a first substrate and transforming the first substrate into a porous substrate. The porous substrate containing the thin film of silicon is then transformed into a stressed state such that at least a portion of the stress is transferred to the thin film. The thin film may be under compressive stress or tensile stress. For example, volumetric expansion of the porous substrate imparts tensile stress to the thin film while volumetric contraction of the porous substrate imparts compressive stress to the thin film. The porous substrate containing the stressed thin film of silicon is then bonded to a second substrate. The porous substrate is removed so as to deposit the stressed thin film of silicon to the second substrate.
摘要翻译：在衬底上形成应力薄膜的方法包括以下步骤：在第一衬底上沉积硅薄膜并将第一衬底转化成多孔衬底。然后将含有硅薄膜的多孔基材转变成应力状态，使至少一部分应力转移到薄膜上。薄膜可能处于压应力或拉伸应力下。例如，多孔基材的体积膨胀赋予薄膜拉伸应力，而多孔基材的体积收缩赋予薄膜压缩应力。然后将含有应力薄膜的多孔基材接合到第二基板上。去除多孔基底以将应力薄的硅沉积到第二基底上。

84. 发明申请

US20070017438A1 METHOD OF FORMING DISLOCATION-FREE STRAINED THIN FILMS 失效
标题翻译：形成无离子应变薄膜的方法
公开(公告)号：US20070017438A1
公开(公告)日：2007-01-25
申请号：US11458628
申请日：2006-07-19
申请人： Ya-Hong Xie , Jeehwan Kim
发明人： Ya-Hong Xie , Jeehwan Kim
IPC分类号： C30B23/00 , C30B25/00 , C30B28/12 , C30B28/14
CPC分类号： C30B29/06 , H01L21/02532 , H01L21/02694 , H01L21/76254
摘要： A method of forming a stressed thin film on a substrate includes forming a plurality of islands on a viscous layer that is present on a surface of a substrate. Adjacent islands are bridged with a stressor layer. The structure is annealed at an elevated temperature above the glass flow temperature of the viscous layer to transfer at least a portion of the stress from the stressor layer to the underlying islands. The bridges are then removed to expose the stressed islands of thin film on the substrate.
摘要翻译：在衬底上形成应力薄膜的方法包括在存在于衬底的表面上的粘性层上形成多个岛。邻近的岛屿与应激源层桥接。该结构在高于粘性层的玻璃流动温度的高温下退火，以将至少一部分应力从应力层转移到下面的岛。然后去除桥接以暴露衬底上的应力薄膜薄膜。

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