专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

81. 发明授权

US08453157B2 Thread synchronization in simultaneous multi-threaded processor machines 有权
标题翻译：同步多线程处理器机器中的线程同步
公开(公告)号：US08453157B2
公开(公告)日：2013-05-28
申请号：US10990825
申请日：2004-11-16
申请人： Michael Thomas Benhase , Yu-Cheng Hsu , John Norbert McCauley , Louis Alonso Rasor , William Griswold Sherman , Cheng-Chung Song
发明人： Michael Thomas Benhase , Yu-Cheng Hsu , John Norbert McCauley , Louis Alonso Rasor , William Griswold Sherman , Cheng-Chung Song
IPC分类号： G06F9/46
CPC分类号： G06F9/5027 , G06F9/485 , G06F9/5022 , G06F9/52
摘要： Provided are a method, system and article of manufacture, wherein a first application executes at least two threads corresponding to a simultaneous multi-threaded processor whose resources have been acquired by the first application. The at least two threads are synchronized before releasing the simultaneous multi-threaded processor to a second application.
摘要翻译：提供了一种方法，系统和制品，其中第一应用程序执行对应于由第一应用获取其资源的同时多线程处理器的至少两个线程。在将同时多线程处理器释放到第二应用之前，至少两个线程被同步。

82. 发明授权

US08089313B2 Power amplifier 有权
标题翻译：功率放大器
公开(公告)号：US08089313B2
公开(公告)日：2012-01-03
申请号：US12727261
申请日：2010-03-19
申请人： De-Cheng Chang , Yu-Cheng Hsu
发明人： De-Cheng Chang , Yu-Cheng Hsu
IPC分类号： H03G3/20
CPC分类号： H03F1/0266 , H03F2200/105 , H03F2200/18
摘要： An adaptive bias power amplifier including an amplifier, a signal coupler, a power detector and a bias control circuit is provided. The signal coupler is connected to an input terminal of the amplifier. The power detector is connected to the signal coupler, and detects an input power of the amplifier via the signal coupler. The bias control circuit is connected to an output terminal of the power detector and the input terminal of the amplifier. The bias control circuit adjusts a gate bias of the amplifier in accordance with a detecting result of the power detector.
摘要翻译：提供了包括放大器，信号耦合器，功率检测器和偏置控制电路的自适应偏置功率放大器。信号耦合器连接到放大器的输入端。功率检测器连接到信号耦合器，并通过信号耦合器检测放大器的输入功率。偏置控制电路连接到功率检测器的输出端子和放大器的输入端子。偏置控制电路根据功率检测器的检测结果调整放大器的栅极偏置。

83. 发明授权

US08028189B2 Recoverable machine check handling 失效
标题翻译：可回收机检查处理
公开(公告)号：US08028189B2
公开(公告)日：2011-09-27
申请号：US10991207
申请日：2004-11-17
申请人： Yu-Cheng Hsu , John N. McCauley , Juan J. Ruiz , William G. Sherman , Cheng-Chung Song
发明人： Yu-Cheng Hsu , John N. McCauley , Juan J. Ruiz , William G. Sherman , Cheng-Chung Song
IPC分类号： G06F11/00
CPC分类号： G06F11/0793 , G06F11/0745 , G06F11/079
摘要： A technique for handling hardware errors in a computing system, such as a data storage facility, while avoiding a system crash. An interface is registered with an operating system of the computing system to process hardware errors. When a hardware error is detected, the interface checks an error register to identify the adapter that likely causes the error, and quarantines, e.g., blocks off, the offending adapter from the computing system. The interface then notifies the operating system that the error has been handled, thereby causing the operating system to bypass a system crash that would otherwise occur. The interface can be provided as a kernel extension of a device driver associated with the operating system.
摘要翻译：一种用于处理诸如数据存储设备的计算系统中的硬件错误的技术，同时避免系统崩溃。在计算系统的操作系统上注册一个接口来处理硬件错误。当检测到硬件错误时，接口检查错误寄存器以识别可能导致错误的适配器，并将违规适配器从计算系统隔离，例如阻止。接口然后通知操作系统该错误已被处理，从而导致操作系统绕过否则将发生的系统崩溃。该接口可以作为与操作系统相关联的设备驱动程序的内核扩展来提供。

84. 发明申请

US20110173493A1 CLUSTER AVAILABILITY MANAGEMENT 审中-公开
标题翻译：集群可用性管理
公开(公告)号：US20110173493A1
公开(公告)日：2011-07-14
申请号：US13072307
申请日：2011-03-25
申请人： William Joseph Armstrong , Michael Howard Hartung , Yu-Cheng Hsu , Glenn Rowan Wightwick
发明人： William Joseph Armstrong , Michael Howard Hartung , Yu-Cheng Hsu , Glenn Rowan Wightwick
IPC分类号： G06F11/20
CPC分类号： G06F11/2046 , G06F11/2028 , G06F11/2033
摘要： A first logical partition in a first processing complex of a server cluster is operated in an active mode and a second logical partition in the processing complex is operated in a standby mode. Upon detection of a failure in a second processing complex of the server cluster. the standby mode logical partition in the first processing complex is activated to an active mode. In one embodiment, partition resources are transferred from an active mode logical partition to the logical partition activated from standby mode. Other embodiments are described and claimed.
摘要翻译：服务器集群的第一处理复合体中的第一逻辑分区以活动模式操作，处理复合体中的第二逻辑分区在待机模式下操作。当检测到服务器集群的第二处理复合体中的故障时。第一处理复合体中的待机模式逻辑分区被激活到活动模式。在一个实施例中，分区资源从活动模式逻辑分区传送到从待机模式激活的逻辑分区。描述和要求保护其他实施例。

85. 发明授权

US07958310B2 Apparatus, system, and method for selecting a space efficient repository 失效
标题翻译：用于选择空间有效的储存库的设备，系统和方法
公开(公告)号：US07958310B2
公开(公告)日：2011-06-07
申请号：US12038557
申请日：2008-02-27
申请人： Michael Thomas Benhase , Shachar Fienblit , Yu-Cheng Hsu , Matthew Joseph Kalos
发明人： Michael Thomas Benhase , Shachar Fienblit , Yu-Cheng Hsu , Matthew Joseph Kalos
IPC分类号： G06F12/12
CPC分类号： G06F12/0804 , G06F12/0866
摘要： An apparatus, system, and method are disclosed for selecting a space efficient repository. A cache receives write data. A destage module destages the data sequentially to a coarse grained repository such as a stride level repository and destages a directory entry for the data to a coarse grained directory such as a stride level directory if the data satisfies a repository policy. In addition, the destage module destages the data to a fine grained repository such as a track level repository overwriting an existing data instance and destages the directory entry to a fine grained directory such as a track level directory if the data does not satisfy the repository policy.
摘要翻译：公开了一种用于选择空间有效的储存库的装置，系统和方法。高速缓存接收写入数据。如果数据满足存储库策略，则迁移模块会将数据顺序地运行到粗粒度存储库（例如跨级存储库），并将数据的目录条目迁移到粗粒度目录（如stride级目录）。此外，如果数据不满足存储库策略，则迁移模块会将数据迁移到诸如轨道级别存储库之类的细粒度存储库，以覆盖现有数据实例，并将目录项目迁移到细粒度目录（如磁道级目录）。

86. 发明申请

US20110087837A1 SECONDARY CACHE FOR WRITE ACCUMULATION AND COALESCING 有权
标题翻译：用于写入累积和分析的二次高速缓存
公开(公告)号：US20110087837A1
公开(公告)日：2011-04-14
申请号：US12577164
申请日：2009-10-10
申请人： Stephen L. Blinick , Lokesh M. Gupta , Yu-Cheng Hsu , Cheng-Chung Song
发明人： Stephen L. Blinick , Lokesh M. Gupta , Yu-Cheng Hsu , Cheng-Chung Song
IPC分类号： G06F12/08
CPC分类号： G06F12/0804 , G06F11/1008 , G06F11/1076 , G06F12/0866
摘要： A method for efficiently using a large secondary cache is disclosed herein. In certain embodiments, such a method may include accumulating, in a secondary cache, a plurality of data tracks. These data tracks may include modified data and/or unmodified data. The method may determine if a subset of the plurality of data tracks makes up a full stride. In the event the subset makes up a full stride, the method may destage the subset from the secondary cache. By destaging full strides, the method reduces the number of disk operations that are required to destage data from the secondary cache. A corresponding computer program product and apparatus are also disclosed and claimed herein.
摘要翻译：本文公开了一种高效地使用大型二级高速缓存的方法。在某些实施例中，这种方法可以包括在二次高速缓存中累积多个数据轨道。这些数据轨道可以包括经修改的数据和/或未修改的数据。该方法可以确定多个数据轨道的一个子集是否构成一个完整的步幅。在子集构成一个完整的步骤的情况下，该方法可能会从二级缓存中退出该子集。通过降级整个步骤，该方法减少了从二级缓存中恢复数据所需的磁盘操作数。本文还公开并要求对应的计算机程序产品和装置。

87. 发明申请

US20100161902A1 METHOD, SYSTEM, AND PROGRAM FOR AN ADAPTOR TO READ AND WRITE TO SYSTEM MEMORY 有权
标题翻译：适用于读取和写入系统存储器的方法，系统和程序
公开(公告)号：US20100161902A1
公开(公告)日：2010-06-24
申请号：US12537987
申请日：2009-08-07
申请人： Michael Thomas Benhase , James Chien-Chung Chen , Yu-Cheng Hsu , Matthew Joseph Kalos , Carol Spanel , Andrew Dale Walls
发明人： Michael Thomas Benhase , James Chien-Chung Chen , Yu-Cheng Hsu , Matthew Joseph Kalos , Carol Spanel , Andrew Dale Walls
IPC分类号： G06F12/00 , G06F12/08
CPC分类号： G06F12/0866 , G06F12/1081
摘要： Provided are a method, system, and program for an adaptor to read and write to system memory. A plurality of blocks of data to write to storage are received at an adaptor. The blocks of data are added to a buffer in the adaptor. A determination is made of pages in a memory device and I/O requests are generated to write the blocks in the buffer to the determined pages, wherein two I/O requests are generated to write to one block split between two pages in the memory device. The adaptor executes the generated I/O requests to write the blocks in the buffer to the determined pages in the memory device.
摘要翻译：提供了适配器读取和写入系统内存的方法，系统和程序。在适配器处接收要写入存储器的多个数据块。数据块被添加到适配器中的缓冲区。确定存储器设备中的页面并且生成I / O请求以将缓冲器中的块写入到所确定的页面，其中生成两个I / O请求以写入存储器设备中的两个页面之间的一个块分割。适配器执行生成的I / O请求，将缓冲区中的块写入存储器设备中确定的页面。

88. 发明授权

US07743372B2 Dynamic cluster code updating in logical partitions 失效
标题翻译：逻辑分区中的动态集群代码更新
公开(公告)号：US07743372B2
公开(公告)日：2010-06-22
申请号：US11169252
申请日：2005-06-28
申请人： William Joseph Armstrong , Michael Howard Hartung , Yu-Cheng Hsu , Glenn Rowan Wightwick
发明人： William Joseph Armstrong , Michael Howard Hartung , Yu-Cheng Hsu , Glenn Rowan Wightwick
IPC分类号： G06F9/44 , G06F9/45
CPC分类号： G06F9/45533 , G06F9/5077
摘要： A first logical partition in a first processing complex of a server cluster is operated at a first level of a software code. Software code in a second logical partition in the same processing complex is updated to a second level. Processing operations are assumed by the second logical partition operating at the second level of software code. Other embodiments are described and claimed.
摘要翻译：服务器集群的第一处理复合体中的第一逻辑分区在软件代码的第一级操作。相同处理复合体中第二个逻辑分区中的软件代码更新为第二级。处理操作由在第二级软件代码上操作的第二逻辑分区假定。描述和要求保护其他实施例。

89. 发明授权

US07702864B2 Apparatus, system, and method for writing stripes in parallel to unique persistent storage devices 有权
标题翻译：用于与独特的持久存储设备并行写入条带的装置，系统和方法
公开(公告)号：US07702864B2
公开(公告)日：2010-04-20
申请号：US10991940
申请日：2004-11-18
申请人： Herve Gilbert Philippe Andre , Michael Thomas Benhase , Yu-Cheng Hsu , David Frank Mannenbach
发明人： Herve Gilbert Philippe Andre , Michael Thomas Benhase , Yu-Cheng Hsu , David Frank Mannenbach
IPC分类号： G06F12/00
CPC分类号： G06F11/1441
摘要： An apparatus, system, and method are disclosed for copying data from a volatile memory device to a plurality of persistent storage devices in response to a loss of primary power. The apparatus includes a section module, a stripe module, and a write module. The section module sections a data image of a write cache into a plurality of data blocks. The stripe module establishes a plurality of data stripes from the plurality of data blocks. The write module writes in parallel each of the plurality of data stripes to a corresponding plurality of unique, persistent data storage devices in response to a loss of line power to the write cache. Advantageously, the apparatus quickly copies the write data from the write cache to a persistent memory device in a relatively short period of time, decreasing the dependence on significant batteries to back up the volatile memory device.
摘要翻译：公开了一种装置，系统和方法，用于将数据从易失性存储器件复制到多个持久存储器件，以响应主电源的损失。该装置包括部分模块，条带模块和写入模块。部分模块将写入高速缓存的数据图像分割成多个数据块。条带模块从多个数据块建立多个数据条带。响应于对写入高速缓存的线路功率的损失，写入模块将多个数据条带中的每一条并行写入相应的多个唯一的持久数据存储设备。有利地，该装置在相对短的时间段内将写入数据从写高速缓存快速复制到永久存储器件，减少了对有用电池的依赖以备份易失性存储器件。

90. 发明授权

US07577804B2 Detecting data integrity 失效
标题翻译：检测数据完整性
公开(公告)号：US07577804B2
公开(公告)日：2009-08-18
申请号：US10960393
申请日：2004-10-06
申请人： Michael P. Vageline , Michael John Jones , Richard B. Stelmach , Yu-Cheng Hsu , Richard Anthony Ripberger
发明人： Michael P. Vageline , Michael John Jones , Richard B. Stelmach , Yu-Cheng Hsu , Richard Anthony Ripberger
IPC分类号： G06F12/00 , G06F13/00 , G06F13/28 , G06F11/00
CPC分类号： G06F3/064 , G06F3/0619 , G06F3/0683
摘要： Provided are a method, system, and article of manufacture for detecting data integrity. An indicator is written to invalidate a data block that is capable of being stored in a plurality of sectors of a storage device, wherein the indicator is written to the storage device in at least one sector that is not included in the plurality of sectors. A writing of entire contents of the data block to the plurality of sectors of the storage device is initiated, in response to the writing of the indicator. The indicator is updated to validate the data block, in response to a completion of the writing of the entire contents of the data block to the plurality of sectors of the storage device.
摘要翻译：提供了用于检测数据完整性的方法，系统和制品。写入指示符以使能够存储在存储设备的多个扇区中的数据块无效，其中在至少一个不包括在多个扇区中的扇区中将指示符写入存储设备。响应于指示符的写入，开始将数据块的整个内容写入存储设备的多个扇区。响应于将数据块的全部内容写入到存储装置的多个扇区，更新指示符以验证数据块。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式