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81. 发明授权

US08575624B2 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US08575624B2
公开(公告)日：2013-11-05
申请号：US13403177
申请日：2012-02-23
申请人： Takahisa Kanemura , Masaki Kondo
发明人： Takahisa Kanemura , Masaki Kondo
IPC分类号： H01L29/15
CPC分类号： H01L29/7391 , H01L21/8213 , H01L21/823885 , H01L27/0688 , H01L27/0814 , H01L27/092 , H01L29/0843 , H01L29/1608 , H01L29/165 , H01L29/267 , H01L29/42312 , H01L29/66356
摘要： In one embodiment, a semiconductor device includes a semiconductor substrate, a gate electrode provided on the semiconductor substrate via an insulating layer, and a gate insulator provided on a side surface of the gate electrode. The device includes a stacked layer including a lower main terminal layer of a first conductivity type, an intermediate layer, and an upper main terminal layer of a second conductivity type which are successively stacked on the semiconductor substrate, the stacked layer being provided on the side surface of the gate electrode via the gate insulator. The upper or lower main terminal layer is provided on the side surface of the gate electrode via the gate insulator and the semiconductor layer.
摘要翻译：在一个实施例中，半导体器件包括半导体衬底，经由绝缘层设置在半导体衬底上的栅电极和设置在栅电极的侧表面上的栅极绝缘体。该器件包括层叠层，该堆叠层包括依次堆叠在半导体衬底上的第一导电类型的下主要主端子层，中间层和第二导电类型的上主端子层，堆叠层设置在侧面通过栅极绝缘体的栅电极的表面。上或下主端子层经由栅极绝缘体和半导体层设置在栅电极的侧表面上。

82. 发明申请

US20130037823A1 SEMICONDUCTOR DEVICE 失效
标题翻译：半导体器件
公开(公告)号：US20130037823A1
公开(公告)日：2013-02-14
申请号：US13403177
申请日：2012-02-23
申请人： Takahisa Kanemura , Masaki Kondo
发明人： Takahisa Kanemura , Masaki Kondo
IPC分类号： H01L29/772
CPC分类号： H01L29/7391 , H01L21/8213 , H01L21/823885 , H01L27/0688 , H01L27/0814 , H01L27/092 , H01L29/0843 , H01L29/1608 , H01L29/165 , H01L29/267 , H01L29/42312 , H01L29/66356
摘要： In one embodiment, a semiconductor device includes a semiconductor substrate, a gate electrode provided on the semiconductor substrate via an insulating layer, and a gate insulator provided on a side surface of the gate electrode. The device includes a stacked layer including a lower main terminal layer of a first conductivity type, an intermediate layer, and an upper main terminal layer of a second conductivity type which are successively stacked on the semiconductor substrate, the stacked layer being provided on the side surface of the gate electrode via the gate insulator. The upper or lower main terminal layer is provided on the side surface of the gate electrode via the gate insulator and the semiconductor layer.
摘要翻译：在一个实施例中，半导体器件包括半导体衬底，经由绝缘层设置在半导体衬底上的栅电极和设置在栅电极的侧表面上的栅极绝缘体。该器件包括层叠层，该堆叠层包括依次堆叠在半导体衬底上的第一导电类型的下主要主端子层，中间层和第二导电类型的上主端子层，堆叠层设置在侧面通过栅极绝缘体的栅电极的表面。上或下主端子层经由栅极绝缘体和半导体层设置在栅电极的侧表面上。

83. 发明授权

US08363275B2 Print controller configured to suppress bleed 有权
标题翻译：打印控制器配置为抑制流血
公开(公告)号：US08363275B2
公开(公告)日：2013-01-29
申请号：US12692970
申请日：2010-01-25
申请人： Masaki Kondo
发明人： Masaki Kondo
IPC分类号： H04N1/60
CPC分类号： G06K15/102 , G06K15/1871 , G06K2215/101 , H04N1/6022
摘要： A print controller controls a print process in which black ink having permeability to a recording medium and chromatic color ink having permeability to the recording medium different from the permeability of the black ink are used to form an image on the recording medium. The subject pixel setting unit sets, as a subject pixel, one pixel that satisfies a first condition that the pixel is a black pixel, a second condition that a plurality of peripheral pixels that are located adjacent to the pixel and that surround the pixel include at least one chromatic pixel, and a third condition that gradation level of black changes discontinuously between the pixel and at least one of the at least one chromatic pixel. The bleed suppressing unit executes a bleed suppression process to a set of pixel data corresponding to the subject pixel to suppress bleeding of the black ink on the recording medium.
摘要翻译：打印控制器控制打印处理，其中使用具有对记录介质的渗透性的黑色油墨和与记录介质的渗透性不同于黑色油墨的渗透性的彩色油墨在记录介质上形成图像。被摄体像素设定单元将像素为黑色像素的第一状态的一个像素作为被摄体像素设定为与像素相邻并且包围像素的多个周边像素包括在第二状态至少一个彩色像素，以及在所述像素和所述至少一个彩色像素中的至少一个之间不连续地改变黑色灰度级的第三条件。渗色抑制单元对与对象像素对应的一组像素数据执行渗色抑制处理，以抑制记录介质上的黑色墨水的渗色。

84. 发明申请

US20120227270A1 BUSH CUTTER AND PROTECTIVE COVER FOR THE SAME 审中-公开
标题翻译：母线切割机及保护盖
公开(公告)号：US20120227270A1
公开(公告)日：2012-09-13
申请号：US13512441
申请日：2010-11-11
申请人： Ryosuke Ito , Masaki Kondo
发明人： Ryosuke Ito , Masaki Kondo
IPC分类号： B26B29/00
CPC分类号： A01D34/90 , A01D34/4167 , A01D34/828 , A01D75/206
摘要： A bush cutter is provided with a cutting blade and a protective cover configured to partly cover the cutting blade. The protective cover includes a main body and an expansion part configured to be detachably attached to the main body. One of the main body and the expansion part of the protective cover is provided with a click portion and the other is provided with an engaging hole configured to accept engagement of the click portion from an inner side and expose the engaging click portion to an outer side. The engaging hole has an aperture geometry that allows entry of a tool but prevents entry of a fingertip. Accordingly, no tool is required when attaching the expansion part, but at least one tool is required when detaching the expansion part.
摘要翻译：铣刀设置有切割刀片和被配置为部分地覆盖切割刀片的保护盖。保护盖包括主体和被构造成可拆卸地附接到主体的膨胀部。保护罩的主体和膨胀部分之一设置有咔嗒部分，另一个设置有接合孔，该接合孔构造成接受从内侧接合咔哒部分并将接合咔哒部分暴露于外侧。接合孔具有允许工具进入但防止指尖进入的孔几何形状。因此，在安装膨胀部件时不需要工具，但是在拆卸膨胀部件时需要至少一个工具。

85. 发明授权

US08212306B2 Semiconductor storage device 失效
标题翻译：半导体存储设备
公开(公告)号：US08212306B2
公开(公告)日：2012-07-03
申请号：US12721757
申请日：2010-03-11
申请人： Takashi Izumida , Nobutoshi Aoki , Masaki Kondo , Takahisa Kanemura
发明人： Takashi Izumida , Nobutoshi Aoki , Masaki Kondo , Takahisa Kanemura
IPC分类号： H01L29/788
CPC分类号： H01L21/28273 , H01L27/11521 , H01L29/42324 , H01L29/66825 , H01L29/7883
摘要： A semiconductor storage device has a semiconductor substrate, a plurality of first insulating films formed on the semiconductor substrate with predetermined spacing therebetween, an element isolation region formed between the first insulating films in a first direction, a floating gate electrode comprising a first charge accumulation film formed on the first insulating film, a second charge accumulation film formed on the first charge accumulation film and having a width in a second direction orthogonal to the first direction smaller than the width of the first charge accumulation film, and a third charge accumulation film formed on the second charge accumulation film and having the width in the second direction larger than the width of the second charge accumulation film, a second insulating film formed on the second charge accumulation film and between the second charge accumulation film and the element isolation region, a third insulating film formed on the charge accumulation film and the element isolation region along the second direction, and a control gate electrode formed on the third insulating film.
摘要翻译：半导体存储装置具有半导体基板，在半导体基板上形成有规定间隔的多个第一绝缘膜，在第一方向上形成在第一绝缘膜之间的元件隔离区域，包括第一电荷累积膜的浮栅电极形成在所述第一绝缘膜上的第二电荷累积膜，形成在所述第一电荷累积膜上并且具有与所述第一方向正交的第二方向的宽度小于所述第一电荷累积膜的宽度的第二电荷累积膜，以及形成的第三电荷累积膜在第二电荷累积膜上并且具有大于第二电荷累积膜的宽度的第二方向的宽度，形成在第二电荷累积膜上以及在第二电荷累积膜和元件隔离区之间的第二绝缘膜，形成在电荷累积膜上的第三绝缘膜和沿着第二方向的元件隔离区域，以及形成在第三绝缘膜上的控制栅极电极。

86. 发明授权

US08110864B2 Nonvolatile semiconductor memory device 失效
标题翻译：非易失性半导体存储器件
公开(公告)号：US08110864B2
公开(公告)日：2012-02-07
申请号：US12327418
申请日：2008-12-03
申请人： Takashi Izumida , Masaki Kondo
发明人： Takashi Izumida , Masaki Kondo
IPC分类号： H01L29/778
CPC分类号： H01L29/7881 , G11C16/0483 , H01L21/28273 , H01L27/115 , H01L27/11521 , H01L29/42324
摘要： In one aspect of the present invention, a nonvolatile semiconductor memory device may include a semiconductor substrate; a plurality of tunnel insulating films formed on the semiconductor substrate at predetermined intervals in a first direction; a plurality of floating gate electrodes each having a first portion and a second portion, the first portions being formed on the respective tunnel insulating films, the second portions being formed on the respective first portions and having smaller width than the first portions in the first direction; an inter-gate insulating film formed on the floating gate electrodes; and first and second control gate electrodes respectively formed on sidewalls, in the first direction, of the second portion of each of the plurality of floating gate electrodes with the inter-gate insulating film interposed therebetween.
摘要翻译：在本发明的一个方面中，非易失性半导体存储器件可以包括半导体衬底; 在第一方向上以预定间隔形成在所述半导体衬底上的多个隧道绝缘膜; 多个浮置栅极，每个具有第一部分和第二部分，所述第一部分形成在相应的隧道绝缘膜上，所述第二部分形成在相应的第一部分上，并且具有比所述第一方向上的第一部分更小的宽度 ; 形成在所述浮栅电极上的栅极间绝缘膜; 以及第一和第二控制栅极电极，分别形成在多个浮置栅电极中的每一个的第二部分的第一方向的侧壁上，栅间绝缘膜插入其间。

87. 发明授权

US08094343B2 Image processor 有权
标题翻译：图像处理器
公开(公告)号：US08094343B2
公开(公告)日：2012-01-10
申请号：US12202971
申请日：2008-09-02
申请人： Tomohiko Hasegawa , Masaki Kondo
发明人： Tomohiko Hasegawa , Masaki Kondo
IPC分类号： H04N1/40
CPC分类号： H04N1/6011 , H04N1/32122 , H04N1/6075 , H04N2201/325 , H04N2201/3273
摘要： An image forming processor includes a generating unit and a correcting unit. The first characteristic quantity data obtaining unit obtains a set of first characteristic quantity data. The receiving unit receives data of an original image. The second characteristic data obtaining unit obtains a set of second characteristic quantity data based on the data of the original image. The generating unit generates at least one set of image data concerning the first characteristic quantity data. The display unit displays the at least one set of image data to prompt a user to specify one set of image data among the at least one set of image data. The correcting unit corrects the original image by using the set of second characteristic quantity data and a set of first characteristic quantity data that has been used to generate the one set of image data specified by the user.
摘要翻译：图像形成处理器包括生成单元和校正单元。第一特征量数据获取单元获得一组第一特征量数据。接收单元接收原始图像的数据。第二特征数据获取单元基于原始图像的数据获得一组第二特征量数据。生成单元生成关于第一特征量数据的至少一组图像数据。所述显示单元显示所述至少一组图像数据，以提示用户在所述至少一组图像数据中指定一组图像数据。校正单元通过使用第二特征量数据集合和已经用于生成由用户指定的一组图像数据的一组第一特征量数据来校正原始图像。

88. 发明申请

US20110108056A1 CLEANING METHOD FOR TRANSFER ARM, CLEANING METHOD FOR SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING APPARATUS 审中-公开
标题翻译：用于转移ARM的清洁方法，用于基板处理装置和基板处理装置的清洁方法
公开(公告)号：US20110108056A1
公开(公告)日：2011-05-12
申请号：US12940270
申请日：2010-11-05
申请人： Shigeru Ishizawa , Masaki Kondo
发明人： Shigeru Ishizawa , Masaki Kondo
IPC分类号： B08B7/00
CPC分类号： B08B6/00 , H01L21/67028 , H01L21/67742 , H01L21/6833
摘要： There is provided a substrate processing apparatus cleaning method for removing contaminants adhered on a transfer arm. The cleaning method for the transfer arm that transfers a substrate and has an electrostatic chuck includes a voltage applying process for applying, when electrically charged contaminants are adhered on the transfer arm and the substrate is not mounted on the transfer arm, a voltage of the same polarity as that of the electrically charged contaminants to each electrode of the electrostatic chuck, to thereby remove the contaminants adhered on the transfer arm.
摘要翻译：提供了用于去除附着在转印臂上的污染物的基板处理装置清洗方法。用于传送基板并具有静电卡盘的传送臂的清洁方法包括：施加电压时，当带电污染物粘附在传送臂上并且基板未安装在传送臂上时，施加电压极性与静电卡盘的每个电极上带电荷的污染物的极性相反，从而去除粘附在传送臂上的污染物。

89. 发明申请

US20100207187A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE 审中-公开
标题翻译：非易失性半导体存储器件
公开(公告)号：US20100207187A1
公开(公告)日：2010-08-19
申请号：US12644821
申请日：2009-12-22
申请人： Nobutoshi Aoki , Masaki Kondo , Takashi Izumida
发明人： Nobutoshi Aoki , Masaki Kondo , Takashi Izumida
IPC分类号： H01L29/788
CPC分类号： H01L27/11521 , H01L29/40114
摘要： A nonvolatile semiconductor memory device comprises a memory cell. The memory cell includes a first gate insulating film formed on a semiconductor substrate, a floating gate formed on the first gate insulating film, a second gate insulating film formed on the floating gate, and a control gate formed on the second gate insulating film. The floating gate includes a first semiconductor film which contacts the first gate insulating film, and a metal film stacked on the semiconductor film. An effective tunneling thickness between the semiconductor substrate and the floating gate in a read operation is thicker than an effective tunneling thickness between the semiconductor substrate and the floating in a write operation.
摘要翻译：非易失性半导体存储器件包括存储器单元。存储单元包括形成在半导体衬底上的第一栅极绝缘膜，形成在第一栅极绝缘膜上的浮置栅极，形成在浮置栅极上的第二栅极绝缘膜，以及形成在第二栅极绝缘膜上的控制栅极。浮置栅极包括与第一栅极绝缘膜接触的第一半导体膜和层叠在半导体膜上的金属膜。在读取操作中，半导体衬底和浮置栅极之间的有效隧道厚度比在半导体衬底和写入操作中浮动之间的有效隧穿厚度厚。

90. 发明申请

US20070290253A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF 失效
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20070290253A1
公开(公告)日：2007-12-20
申请号：US11765881
申请日：2007-06-20
申请人： Masaru KITO , Nobutoshi Aoki , Masaru Kidoh , Ryota Katsumata , Masaki Kondo , Naoki Kusunoki , Toshiyuki Enda , Sanae Ito , Hiroyoshi Tanimoto , Hideaki Aochi , Akihiro Nitayama , Riichiro Shirota
发明人： Masaru KITO , Nobutoshi Aoki , Masaru Kidoh , Ryota Katsumata , Masaki Kondo , Naoki Kusunoki , Toshiyuki Enda , Sanae Ito , Hiroyoshi Tanimoto , Hideaki Aochi , Akihiro Nitayama , Riichiro Shirota
IPC分类号： H01L29/788
CPC分类号： H01L29/7881 , H01L21/84 , H01L27/115 , H01L27/11521 , H01L27/11568 , H01L27/1203 , H01L29/42336
摘要： A nonvolatile semiconductor memory device includes: a semiconductor region; device isolation regions placed in the semiconductor region and extending in a column direction; a semiconductor layer placed on the semiconductor region and between the device isolation regions, and having a convex shape in cross section along a row direction; source/drain regions placed in the semiconductor layer and spaced from each other; a gate insulating film placed on the semiconductor layer between the source/drain regions; a floating gate electrode layer placed on the gate insulating film; an intergate insulating film placed on the floating gate electrode layer and upper surfaces of the device isolation regions; and a control gate electrode layer placed on the intergate insulating film and extending in the row direction.
摘要翻译：非易失性半导体存储器件包括：半导体区域; 器件隔离区域放置在半导体区域中并沿列方向延伸; 放置在半导体区域和器件隔离区之间的半导体层，沿着行方向具有凸形的横截面; 源极/漏极区域放置在半导体层中并彼此间隔开; 位于源极/漏极区之间的半导体层上的栅极绝缘膜; 放置在栅极绝缘膜上的浮栅电极层; 布置在浮栅电极层和器件隔离区的上表面上的隔间绝缘膜; 以及控制栅极电极层，其设置在所述隔间绝缘膜上并沿行方向延伸。

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