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81. 发明申请

US20090050974A1 Method, System and Apparatus for Gating Configurations and Improved Contacts in Nanowire-Based Electronic Devices 失效
标题翻译：基于纳米线的电子设备中门控配置和改进接点的方法，系统和设备
公开(公告)号：US20090050974A1
公开(公告)日：2009-02-26
申请号：US12244573
申请日：2008-10-02
申请人： Shahriar Mostarshed , Jian Chen , Francisco Leon , Yaoling Pan , Linda T. Romano
发明人： Shahriar Mostarshed , Jian Chen , Francisco Leon , Yaoling Pan , Linda T. Romano
IPC分类号： H01L47/00 , H01L21/8234
CPC分类号： H01L29/0665 , B82Y10/00 , H01L29/0673 , H01L29/42384 , H01L29/42392 , H01L29/775 , H01L29/785 , H01L29/78645 , H01L29/78681 , H01L29/7869 , Y10S977/762 , Y10S977/932 , Y10S977/938
摘要： Methods, systems, and apparatuses for electronic devices having improved gate structures are described. An electronic device includes at least one nanowire. A gate contact is positioned along at least a portion of a length of the at least one nanowire. A dielectric material layer is between the gate contact and the at least one nanowire. A source contact and a drain contact are in contact with the at least one nanowire. At least a portion of the source contact and/or the drain contact overlaps with the gate contact along the nanowire the length. In another aspect, an electronic device includes a nanowire having a semiconductor core surrounded by an insulating shell layer. A ring shaped first gate region surrounds the nanowire along a portion of the length of the nanowire. A second gate region is positioned along the length of the nanowire between the nanowire and the substrate. A source contact and a drain contact are coupled to the semiconductor core of the nanowire at respective exposed portions of the semiconductor core.
摘要翻译：描述了具有改进的门结构的电子设备的方法，系统和装置。电子装置包括至少一个纳米线。栅极接触沿至少一个纳米线的长度的至少一部分定位。介电材料层在栅极接触和至少一个纳米线之间。源极触点和漏极触点与至少一个纳米线接触。源极触点和/或漏极触点的至少一部分沿着该纳米线的长度与栅极触点重叠。另一方面，一种电子器件包括具有被绝缘壳层包围的半导体芯的纳米线。环形第一栅极区域沿着纳米线长度的一部分包围纳米线。第二栅极区沿着纳米线和衬底之间的纳米线的长度定位。源极触点和漏极触点在半导体芯的相应的暴露部分处耦合到纳米线的半导体芯。

82. 发明申请

US20090032828A1 III-Nitride Device Grown on Edge-Dislocation Template 审中-公开
标题翻译：边缘位错模板上生长的III型氮化物器件
公开(公告)号：US20090032828A1
公开(公告)日：2009-02-05
申请号：US11833921
申请日：2007-08-03
申请人： Linda T. Romano , Patrick N. Grillot
发明人： Linda T. Romano , Patrick N. Grillot
IPC分类号： H01L33/00 , H01L21/20
CPC分类号： H01L33/32 , H01L21/02378 , H01L21/0242 , H01L21/02458 , H01L21/02505 , H01L21/02507 , H01L21/02513 , H01L21/0254 , H01L33/12
摘要： A semiconductor light emitting device includes a wurtzite III-nitride semiconductor structure including a light emitting layer disposed between an n-type region and a p-type region. A template layer and a dislocation bending layer are grown before the light emitting layer. The template layer is grown such that at least 70% of the dislocations in the template layer are edge dislocations. At least some of the edge dislocations in the template layer continue into the dislocation bending layer. The dislocation bending layer is grown to have a different magnitude of strain than the template layer. The change in strain at the interface between the template layer and the dislocation bending layer causes at least some of the edge dislocations in the template layer to bend to a different orientation in the dislocation bending layer. Semiconductor material grown above the bent edge dislocations may exhibit reduced strain.
摘要翻译：半导体发光器件包括含有设置在n型区域和p型区域之间的发光层的纤锌矿III族氮化物半导体结构。模板层和位错弯曲层在发光层之前生长。生长模板层使得模板层中至少70％的位错是边缘位错。模板层中的至少一些边缘位错继续进入位错弯曲层。使位错弯曲层生长成具有与模板层不同的应变大小。在模板层和位错弯曲层之间的界面处的应变变化导致模板层中的至少一些边缘位错在位错弯曲层中弯曲成不同的取向。在弯曲边缘位错以上生长的半导体材料可能表现出减小的应变。

83. 发明申请

US20080293244A1 Methods of Positioning and/or Orienting Nanostructures 有权
标题翻译：定位和/或定向纳米结构的方法
公开(公告)号：US20080293244A1
公开(公告)日：2008-11-27
申请号：US12186405
申请日：2008-08-05
申请人： Xiangfeng Duan , Hugh Daniels , Chunming Niu , Vijendra Sahi , James Hamilton , Linda T. Romano
发明人： Xiangfeng Duan , Hugh Daniels , Chunming Niu , Vijendra Sahi , James Hamilton , Linda T. Romano
IPC分类号： H01L21/44
CPC分类号： H01L51/0048 , B01J23/52 , B81B2203/0361 , B81B2207/015 , B81C3/005 , B81C99/008 , B81C2203/057 , B82B3/00 , B82Y10/00 , B82Y30/00 , B82Y40/00 , G11B5/743 , G11C2213/81 , H01L29/7869 , H01L51/0001 , H01L51/0595 , H01L2924/0002 , Y10S438/962 , Y10S977/762 , Y10S977/856 , Y10S977/857 , Y10S977/858 , Y10S977/89 , H01L2924/00
摘要： Methods of positioning and orienting nanostructures, and particularly nanowires, on surfaces for subsequent use or integration. The methods utilize mask based processes alone or in combination with flow based alignment of the nanostructures to provide oriented and positioned nanostructures on surfaces. Also provided are populations of positioned and/or oriented nanostructures, devices that include populations of positioned and/or oriented nanostructures, systems for positioning and/or orienting nanostructures, and related devices, systems and methods.
摘要翻译：在表面上定位和取向纳米结构，特别是纳米线的方法用于随后的使用或整合。该方法单独使用基于掩模的工艺，或者与纳米结构的基于流动的对准组合以在表面上提供定向和定位的纳米结构。还提供了定位和/或定向的纳米结构的群体，包括定位和/或定向纳米结构的群体，用于定位和/或取向纳米结构的系统以及相关设备，系统和方法。

84. 发明授权

US07339184B2 Systems and methods for harvesting and integrating nanowires 有权
标题翻译：用于收获和整合纳米线的系统和方法
公开(公告)号：US07339184B2
公开(公告)日：2008-03-04
申请号：US11117707
申请日：2005-04-29
申请人： Linda T. Romano , Jian Chen , Xiangfeng Duan , Robert S. Dubrow , Stephen A. Empedocles , Jay L. Goldman , James M. Hamilton , David L. Heald , Francesco Lemmi , Chunming Niu , Yaoling Pan , George Pontis , Vijendra Sahi , Erik C. Scher , David P. Stumbo , Jeffery A. Whiteford
发明人： Linda T. Romano , Jian Chen , Xiangfeng Duan , Robert S. Dubrow , Stephen A. Empedocles , Jay L. Goldman , James M. Hamilton , David L. Heald , Francesco Lemmi , Chunming Niu , Yaoling Pan , George Pontis , Vijendra Sahi , Erik C. Scher , David P. Stumbo , Jeffery A. Whiteford
IPC分类号： H01L29/00
CPC分类号： C30B29/605 , B82Y10/00 , C30B11/12 , H01L21/02439 , H01L21/02513 , H01L21/02521 , H01L21/02532 , H01L21/02603 , H01L21/02606 , H01L21/02639 , H01L21/02645 , H01L21/02653 , H01L29/0673 , H01L29/0676 , H01L29/068 , H01L29/125 , H01L29/66469 , H01L29/775 , H01L29/78684 , H01L29/7869 , H01L29/78696 , H01L51/0048 , Y10S977/762 , Y10S977/938 , Y10T428/139 , Y10T428/2902 , Y10T428/2949
摘要： The present invention is directed to methods to harvest, integrate and exploit nanomaterials, and particularly elongated nanowire materials. The invention provides methods for harvesting nanowires that include selectively etching a sacrificial layer placed on a nanowire growth substrate to remove nanowires. The invention also provides methods for integrating nanowires into electronic devices that include placing an outer surface of a cylinder in contact with a fluid suspension of nanowires and rolling the nanowire coated cylinder to deposit nanowires onto a surface. Methods are also provided to deposit nanowires using an ink-jet printer or an aperture to align nanowires. Additional aspects of the invention provide methods for preventing gate shorts in nanowire based transistors. Additional methods for harvesting and integrating nanowires are provided.
摘要翻译：本发明涉及收获，整合和利用纳米材料，特别是细长的纳米线材料的方法。本发明提供了收获纳米线的方法，其包括选择性地蚀刻放置在纳米线生长衬底上以去除纳米线的牺牲层。本发明还提供了将纳米线整合到电子器件中的方法，包括将圆筒的外表面与纳米线的流体悬浮液接触并滚动纳米线涂覆的圆筒以将纳米线沉积到表面上。还提供了使用喷墨打印机或孔径以纳米线排列纳米线的方法。本发明的另外的方面提供了用于防止基于纳米线的晶体管中的栅极短路的方法。提供了收获和集成纳米线的其他方法。

85. 发明授权

US07000315B2 Method of making photolithographically-patterned out-of-plane coil structures 有权
公开(公告)号：US07000315B2
公开(公告)日：2006-02-21
申请号：US10387203
申请日：2003-03-11
申请人： Christopher L. Chua , Francesco Lemmi , Koenraad F. Van Schuylenbergh , Jeng Ping Lu , David K. Fork , Eric Peeters , Decai Sun , Donald L. Smith , Linda T. Romano
发明人： Christopher L. Chua , Francesco Lemmi , Koenraad F. Van Schuylenbergh , Jeng Ping Lu , David K. Fork , Eric Peeters , Decai Sun , Donald L. Smith , Linda T. Romano
IPC分类号： H01R43/16
CPC分类号： H01L24/13 , G01R1/06727 , G01R3/00 , H01F17/0033 , H01F17/02 , H01F41/041 , H01L21/76838 , H01L21/7688 , H01L23/498 , H01L23/49811 , H01L23/5227 , H01L24/11 , H01L24/16 , H01L24/48 , H01L28/10 , H01L2224/05568 , H01L2224/05573 , H01L2224/05624 , H01L2224/13099 , H01L2224/4847 , H01L2224/8592 , H01L2924/0001 , H01L2924/00014 , H01L2924/00015 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01018 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01033 , H01L2924/01039 , H01L2924/0104 , H01L2924/01042 , H01L2924/01047 , H01L2924/01057 , H01L2924/01058 , H01L2924/01061 , H01L2924/01068 , H01L2924/01072 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01084 , H01L2924/014 , H01L2924/10253 , H01L2924/10329 , H01L2924/12034 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , Y10T29/4902 , Y10T29/49071 , Y10T29/49147 , Y10T29/49204 , Y10T29/49208 , Y10T29/4921 , Y10T29/49218 , H01L2924/00 , H01L2224/05599 , H01L2224/85399 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： An out-of-plane micro-structure which can be used for on-chip integration of high-Q inductors and transformers places the magnetic field direction parallel to the substrate plane without requiring high aspect ratio processing. The photolithographically patterned coil structure includes an elastic member having an intrinsic stress profile. The intrinsic stress profile biases a free portion away from the substrate forming a loop winding. An anchor portion remains fixed to the substrate. The free portion end becomes a second anchor portion which may be connected to the substrate via soldering or plating. A series of individual coil structures can be joined via their anchor portions to form inductors and transformers.

86. 发明授权

US06856225B1 Photolithographically-patterned out-of-plane coil structures and method of making 有权
标题翻译：光刻图案的平面外线圈结构和制造方法
公开(公告)号：US06856225B1
公开(公告)日：2005-02-15
申请号：US09573815
申请日：2000-05-17
申请人： Christopher L. Chua , Francesco Lemmi , Koenraad F. Van Schuylenbergh , Jeng Ping Lu , David K. Fork , Eric Peeters , Decai Sun , Donald L. Smith , Linda T. Romano
发明人： Christopher L. Chua , Francesco Lemmi , Koenraad F. Van Schuylenbergh , Jeng Ping Lu , David K. Fork , Eric Peeters , Decai Sun , Donald L. Smith , Linda T. Romano
IPC分类号： H01F41/04 , G01R1/067 , G01R3/00 , G03C5/00 , H01F17/00 , H01F17/02 , H01F27/29 , H01L21/02 , H01L21/60 , H01L21/768 , H01L23/485 , H01L23/49 , H01L23/498 , H01L23/522 , H01R9/03 , H05K7/02
CPC分类号： H01L24/13 , G01R1/06727 , G01R3/00 , H01F17/0033 , H01F17/02 , H01F41/041 , H01L21/76838 , H01L21/7688 , H01L23/498 , H01L23/49811 , H01L23/5227 , H01L24/11 , H01L24/16 , H01L24/48 , H01L28/10 , H01L2224/05568 , H01L2224/05573 , H01L2224/05624 , H01L2224/13099 , H01L2224/4847 , H01L2224/8592 , H01L2924/0001 , H01L2924/00014 , H01L2924/00015 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01018 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01033 , H01L2924/01039 , H01L2924/0104 , H01L2924/01042 , H01L2924/01047 , H01L2924/01057 , H01L2924/01058 , H01L2924/01061 , H01L2924/01068 , H01L2924/01072 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01084 , H01L2924/014 , H01L2924/10253 , H01L2924/10329 , H01L2924/12034 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , Y10T29/4902 , Y10T29/49071 , Y10T29/49147 , Y10T29/49204 , Y10T29/49208 , Y10T29/4921 , Y10T29/49218 , H01L2924/00 , H01L2224/05599 , H01L2224/85399 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： An out-of-plane micro-structure which can be used for on-chip integration of high-Q inductors and transformers places the magnetic field direction parallel to the substrate plane without requiring high aspect ratio processing. The photolithographically patterned coil structure includes an elastic member having an intrinsic stress profile. The intrinsic stress profile biases a free portion away from the substrate forming a loop winding. An anchor portion remains fixed to the substrate. The free portion end becomes a second anchor portion which may be connected to the substrate via soldering or plating. A series of individual coil structures can be joined via their anchor portions to form inductors and transformers.
摘要翻译：可以用于高Q电感和变压器的片上集成的平面外微结构使得磁场方向平行于衬底平面而不需要高纵横比处理。光刻图案的线圈结构包括具有固有应力分布的弹性构件。固有的应力分布使形成环绕的基板远离基板偏移。锚固部分保持固定到基底上。自由部分端部成为可以通过焊接或电镀而连接到基板的第二锚固部分。一系列单独的线圈结构可以通过它们的锚定部分接合以形成电感器和变压器。

87. 发明授权

US06794737B2 Spring structure with stress-balancing layer 有权
标题翻译：弹簧结构应力平衡层
公开(公告)号：US06794737B2
公开(公告)日：2004-09-21
申请号：US09976394
申请日：2001-10-12
申请人： Linda T. Romano , David K. Fork
发明人： Linda T. Romano , David K. Fork
IPC分类号： H01L2150
CPC分类号： H05K3/4092 , G01R1/06727 , G01R3/00 , H01L2924/0002 , Y10T29/4913 , H01L2924/00
摘要： A stress-balancing layer formed over portions of a spring metal finger that remain attached to an underlying substrate to counter internal stresses inherently formed in the spring metal finger. The (e.g., positive) internal stress of the spring metal causes the claw (tip) of the spring metal finger to bend away from the substrate when an underlying release material is removed. The stress-balancing pad is formed on an anchor portion of the spring metal finger, and includes an opposite (e.g., negative) internal stress that counters the positive stress of the spring metal finger. A stress-balancing layer is either initially formed over the entire spring metal finger and then partially removed (etched) from the claw portion, or selectively deposited only on the anchor portion of the spring metal finger. An interposing etch stop layer is used when the same material composition is used to form both the spring metal and stress-balancing layers.
摘要翻译：应力平衡层形成在弹簧金属指的部分上，其保持附接到下面的基底以抵抗固有地形成在弹簧金属指中的内部应力。弹簧金属的（例如正）内部应力导致弹簧金属指的爪（尖端）在移除下面的剥离材料时远离基底弯曲。应力平衡垫形成在弹簧金属指的锚固部分上，并且包括抵抗弹簧金属指的正应力的相反（例如负的）内部应力。最初在整个弹簧金属指上形成应力平衡层，然后部分地从爪部移除（蚀刻），或者仅选择性地沉积在弹簧金属指的锚定部分上。当使用相同的材料组成来形成弹簧金属和应力平衡层时，使用插入式蚀刻停止层。

88. 发明授权

US06781159B2 Field emission display device 失效
标题翻译：场致发射显示装置
公开(公告)号：US06781159B2
公开(公告)日：2004-08-24
申请号：US09998334
申请日：2001-12-03
申请人： Linda T. Romano , David K. Biegelsen
发明人： Linda T. Romano , David K. Biegelsen
IPC分类号： H01L3300
CPC分类号： H01J1/3044 , H01J9/025
摘要： An improved nanotip structure and method for forming the nanotip structure and a display system using the improved nanotip structure is described. The described nanotip is formed from a semiconductor having a crystalline structure such as gallium nitride. The crystalline structure preferably forms dislocations oriented in the direction of the nanotips. One method of forming the nanotip structure uses the relatively slow etching rates that occur around the dislocations compared to the faster etch rates that occur in other parts of the semiconductor structure. The slower etching around dislocations enables the formation of relatively high aspect ratio nanotips in the dislocation area.
摘要翻译：描述了用于形成纳米尖端结构的改进的纳米尖端结构和方法以及使用改进的纳米尖端结构的显示系统。所描述的纳米尖端由具有诸如氮化镓的晶体结构的半导体形成。晶体结构优选地形成在纳米尖端方向上取向的位错。与在半导体结构的其它部分中发生的更快的蚀刻速率相比，形成纳米尖端结构的一种方法使用在位错周围发生的相对慢的蚀刻速率。在位错周围较慢的蚀刻使得能够在位错区域中形成相对高的纵横比的纳米尖端。

89. 发明授权

US06355497B1 Removable large area, low defect density films for led and laser diode growth 有权
标题翻译：用于LED和激光二极管生长的可拆卸大面积，低缺陷密度膜
公开(公告)号：US06355497B1
公开(公告)日：2002-03-12
申请号：US09490286
申请日：2000-01-18
申请人： Linda T. Romano , Brent S. Krusor , Christopher L. Chua , Noble M. Johnson , Rose M. Wood , Jack Walker
发明人： Linda T. Romano , Brent S. Krusor , Christopher L. Chua , Noble M. Johnson , Rose M. Wood , Jack Walker
IPC分类号： H01L2100
CPC分类号： H01L33/007 , H01L21/02373 , H01L21/0242 , H01L21/02532 , H01L33/0079
摘要： A technique based on etching a release layer, for separating the nearly lattice matched substrate from a base substrate is disclosed. A nearly lattice matched substrate for the epitaxial growth of Group-III nitride semiconductor devices and method of fabricating the nearly lattice matched substrate and devices is disclosed. Enhanced ELOG methods are used to create low defect density GaN films. The GaN films are used to grow Group-III nitride LEDs and laser diodes.
摘要翻译：公开了一种基于蚀刻释放层的技术，用于将近乎格子匹配的基板与基底基板分离。公开了用于III族氮化物半导体器件的外延生长的几乎晶格匹配的衬底以及制造近晶格匹配衬底和器件的方法。增强的ELOG方法用于产生低缺陷密度GaN膜。 GaN薄膜用于生长III族氮化物LED和激光二极管。

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