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81. 发明申请

US20140033937A1 Screening Method And Apparatus For Use In Intaglio Printing 有权
标题翻译：用于凹版印刷的筛选方法和装置
公开(公告)号：US20140033937A1
公开(公告)日：2014-02-06
申请号：US13996967
申请日：2011-12-24
申请人： Haifeng Li , Bin Yang
发明人： Haifeng Li , Bin Yang
IPC分类号： G03F5/20
CPC分类号： G03F5/20 , H04N1/4055
摘要： The present application provides a screen method for intaglio printing, comprising: dividing multiple classes of regions according to a brightness range; and generating screen dots with various screen patterns for the grouped classes of regions. The present application also provides a screen device for intaglio printing, comprising: a dividing module configured to group multiple classes of regions according to the brightness range; and a generating module configured to generate screen dots with various screen patterns for the grouped classes of regions. Since multiple kinds of screen patterns are applied in the technical solutions in present application, the problem, i.e., water ripple will occur in the prior art, may be addressed, so as to improve the quality of printing.
摘要翻译：本申请提供了一种用于凹版印刷的屏幕方法，包括：根据亮度范围划分多个类别的区域; 并且为分组的区域类别生成具有各种屏幕图案的屏幕点。本申请还提供了一种用于凹版印刷的屏幕装置，包括：分割模块，被配置为根据亮度范围对多个类别的区域进行分组; 以及生成模块，被配置为生成用于所述分组的区域类别的各种屏幕图案的屏幕点。由于在本申请中的技术方案中应用了多种屏幕图案，所以可以解决现有技术中出现的水波纹问题，以提高打印质量。

82. 发明授权

US08497308B2 Integrated microchannel synthesis and separation 有权
标题翻译：集成微通道的合成和分离
公开(公告)号：US08497308B2
公开(公告)日：2013-07-30
申请号：US12439872
申请日：2007-09-05
申请人： Anna Lee Y. Tonkovich , Robert D. Litt , Timothy M. Werner , Bin Yang
发明人： Anna Lee Y. Tonkovich , Robert D. Litt , Timothy M. Werner , Bin Yang
IPC分类号： C07C27/00
CPC分类号： B01J19/0093 , B01J19/1831 , B01J2219/00783 , B01J2219/00835 , B01J2219/00873 , B01J2219/00984 , C07C29/152 , C10G2/341 , C07C31/04
摘要： A process for carrying out at least two unit operations in series, the process comprising the step of: (a) directing a feed stream into an integrated assembly which comprises a first microchannel unit operation upon at least one chemical of the feed stream to generate a distributed output stream that exits the first microchannel unit operation in a first set of discrete microchannels isolating flow through the discrete microchannels; and (b) directing the distributed output stream of the first microchannel unit operation into a second microchannel unit operation as a distributed input stream, to continue isolating flow between the first set of discrete microchannels, and conducting at least one operation upon at least one chemical of the input stream to generate a product stream that exits the second microchannel unit operation, where the first microchannel unit operation and the second unit operation share a housing.
摘要翻译：一种用于串联进行至少两个单元操作的方法，该方法包括以下步骤：（a）将进料流引导到集成组件中，其包括在进料流的至少一种化学品上的第一微通道单元操作以产生在第一组离散微通道中离开第一微通道单元操作的分布式输出流，其隔离通过离散微通道的流动; 和（b）将第一微通道单元操作的分布式输出流引导到作为分布式输入流的第二微通道单元操作中，以继续隔离第一组离散微通道之间的流动，并且至少一种化学物质进行至少一种操作以产生离开第二微通道单元操作的产品流，其中第一微通道单元操作和第二单元操作共享外壳。

83. 发明授权

US08492275B2 Method to form uniform silicide by selective implantation 有权
标题翻译：通过选择性植入形成均匀硅化物的方法
公开(公告)号：US08492275B2
公开(公告)日：2013-07-23
申请号：US13186519
申请日：2011-07-20
申请人： Emre Alptekin , Viraj Y. Sardesai , Cung D. Tran , Bin Yang
发明人： Emre Alptekin , Viraj Y. Sardesai , Cung D. Tran , Bin Yang
IPC分类号： H01L21/44
CPC分类号： H01L23/485 , H01L21/26506 , H01L21/26513 , H01L21/26566 , H01L21/2658 , H01L21/26586 , H01L21/28518 , H01L21/76814 , H01L2924/0002 , H01L2924/00
摘要： Methods form an integrated circuit structure by forming at least a portion of a plurality of devices within and/or on a substrate and patterning trenches in an inter-layer dielectric layer on the substrate adjacent the devices. The patterning forms relatively narrow trenches and relatively wide trenches. The methods then perform an angled implant of a compensating material into the trenches. The angle of the angled implant implants a greater concentration of the compensating material in the regions of the substrate at the bottom of the wider trenches relative to an amount of compensating material implanted in the regions of the substrate at the bottom of the narrower trenches. The methods then deposit a metallic material within the trenches and heat the metallic material to form silicide from the metallic material.
摘要翻译：方法通过在衬底内和/或衬底上形成多个器件的至少一部分形成集成电路结构，并且在邻近器件的衬底上的层间电介质层中图案化沟槽。图案形成相对较窄的沟槽和较宽的沟槽。然后，所述方法对沟槽进行补偿材料的成角度注入。成角度的植入物的角度相对于在较窄沟槽的底部注入衬底的区域中的补偿材料的量，在较宽沟槽底部的衬底区域中植入更大浓度的补偿材料。然后，该方法将金属材料沉积在沟槽内，并加热金属材料以从金属材料形成硅化物。

84. 发明授权

US08461170B2 Chemical compounds 失效
标题翻译：化合物
公开(公告)号：US08461170B2
公开(公告)日：2013-06-11
申请号：US13196189
申请日：2011-08-02
申请人： Brian Aquila , Victor Kamhi , Bo Peng , Timothy Pontz , Jamal Carlos Saeh , Kumar Thakur , Bin Yang
发明人： Brian Aquila , Victor Kamhi , Bo Peng , Timothy Pontz , Jamal Carlos Saeh , Kumar Thakur , Bin Yang
IPC分类号： A01N43/54 , A61K31/505
CPC分类号： C07D401/14 , C07F9/65685
摘要： The present invention relates to compounds of Formula (I) and/or Formula (Ia): and to their salts, pharmaceutical compositions, methods of use, and methods for their preparation. These compounds inhibit ALK kinase activity, and thus may be used for the treatment of cancer.
摘要翻译：本发明涉及式（I）和/或式（Ia）化合物及其盐，药物组合物，使用方法及其制备方法。这些化合物抑制ALK激酶活性，因此可用于治疗癌症。

85. 发明申请

US20130069124A1 MOSFET INTEGRATED CIRCUIT WITH UNIFORMLY THIN SILICIDE LAYER AND METHODS FOR ITS MANUFACTURE 有权
标题翻译：具有均匀薄膜硅层的MOSFET集成电路及其制造方法
公开(公告)号：US20130069124A1
公开(公告)日：2013-03-21
申请号：US13237732
申请日：2011-09-20
申请人： Bin Yang , Christian Lavoie , Emre Alptekin , Ahmet S. Ozcan , Cung D. Tran , Mark Raymond
发明人： Bin Yang , Christian Lavoie , Emre Alptekin , Ahmet S. Ozcan , Cung D. Tran , Mark Raymond
IPC分类号： H01L29/78 , H01L21/20
CPC分类号： H01L29/665 , H01L21/28518 , H01L29/6659 , H01L29/7833
摘要： An MOSFET device having a Silicide layer of uniform thickness, and methods for its fabrication, are provided. One such method involves depositing a metal layer over wide and narrow contact trenches on the surface of a silicon semiconductor substrate. Upon formation of a uniformly thin amorphous intermixed alloy layer at the metal/silicon interface, the excess (unreacted) metal is removed. The device is annealed to facilitate the formation of a thin silicide layer on the substrate surface which exhibits uniform thickness at the bottoms of both wide and narrow contact trenches.
摘要翻译：提供具有均匀厚度的硅化物层的MOSFET器件及其制造方法。一种这样的方法包括在硅半导体衬底的表面上的宽且窄的接触沟槽上沉积金属层。在金属/硅界面处形成均匀薄的无定形混合合金层时，除去过量的（未反应的）金属。该器件被退火以促进在衬底表面上形成薄的硅化物层，其在宽和窄接触沟槽的底部显示均匀的厚度。

86. 发明授权

US08349716B2 Semiconductor device with reduced junction leakage and an associated method of forming such a semiconductor device 失效
标题翻译：具有减小的结漏电的半导体器件和形成这种半导体器件的相关方法
公开(公告)号：US08349716B2
公开(公告)日：2013-01-08
申请号：US12911186
申请日：2010-10-25
申请人： Ming Cai , Christian Lavoie , Ahmet S. Ozcan , Bin Yang , Zhen Zhang
发明人： Ming Cai , Christian Lavoie , Ahmet S. Ozcan , Bin Yang , Zhen Zhang
IPC分类号： H01L21/336 , H01L21/04
CPC分类号： H01L21/2257 , H01L21/28512 , H01L21/28518 , H01L29/665 , H01L29/66643
摘要： Disclosed is a semiconductor device having a p-n junction with reduced junction leakage in the presence of metal silicide defects that extend to the junction and a method of forming the device. Specifically, a semiconductor layer having a p-n junction is formed. A metal silicide layer is formed on the semiconductor layer and a dopant is implanted into the metal silicide layer. An anneal process is performed causing the dopant to migrate toward the metal silicide-semiconductor layer interface such that the peak concentration of the dopant will be within a portion of the metal silicide layer bordering the metal silicide-semiconductor layer interface and encompassing the defects. As a result, the silicide to silicon contact is effectively engineered to increase the Schottky barrier height at the defect, which in turn drastically reduces any leakage that would otherwise occur, when the p-n junction is in reverse polarity.
摘要翻译：公开了一种具有p-n结的半导体器件，其在存在延伸到结的金属硅化物缺陷的情况下具有减少的结漏电以及形成器件的方法。具体地说，形成具有p-n结的半导体层。在半导体层上形成金属硅化物层，并且将掺杂剂注入到金属硅化物层中。执行退火处理，使掺杂剂朝向金属硅化物半导体层界面迁移，使得掺杂剂的峰值浓度将在金属硅化物层的与金属硅化物半导体层界面接壤并包围缺陷的部分内。结果，硅化物与硅接触被有效地设计以增加缺陷处的肖特基势垒高度，这反过来大大降低了当p-n结处于相反极性时将会发生的任何泄漏。

87. 发明申请

US20120298965A1 MULTIGATE STRUCTURE FORMED WITH ELECTROLESS METAL DEPOSITION 有权
标题翻译：具有电沉积金属沉积的多孔结构
公开(公告)号：US20120298965A1
公开(公告)日：2012-11-29
申请号：US13568839
申请日：2012-08-07
申请人： Wilfried Haensch , Christian Lavoie , Christine Qiqing Ouyang , Xiaoyan Shao , Paul M. Solomon , Zhen Zhang , Bin Yang
发明人： Wilfried Haensch , Christian Lavoie , Christine Qiqing Ouyang , Xiaoyan Shao , Paul M. Solomon , Zhen Zhang , Bin Yang
IPC分类号： H01L29/772 , B82Y99/00
CPC分类号： H01L29/0673 , H01L21/823814 , H01L29/41791
摘要： A multigate structure which comprises a semiconductor substrate; an ultra-thin silicon or carbon bodies of less than 20 nanometers thick located on the substrate; an electrolessly deposited metallic layer selectively located on the side surfaces and top surfaces of the ultra-thin silicon or carbon bodies and selectively located on top of the multigate structures to make electrical contact with the ultra-thin silicon or carbon bodies and to minimize parasitic resistance, and wherein the ultra-thin silicon or carbon bodies and metallic layer located thereon form source and drain regions is provided along with a process to fabricate the structure.
摘要翻译：一种多栅格结构，包括半导体衬底; 位于基板上的小于20纳米厚的超薄硅或碳体; 选择性地位于超薄硅或碳体的侧表面和顶表面上的无电沉积金属层，并且选择性地位于多结构结构的顶部上以与超薄硅或碳体电接触并最小化寄生电阻并且其中位于其上的超薄硅或碳体和金属层形成源区和漏区以及制造该结构的工艺。

88. 发明授权

US08198170B2 Semiconductor device fabrication method for improved isolation regions and defect-free active semiconductor material 有权
标题翻译：用于改进隔离区域和无缺陷活性半导体材料的半导体器件制造方法
公开(公告)号：US08198170B2
公开(公告)日：2012-06-12
申请号：US12905805
申请日：2010-10-15
申请人： Man Fai Ng , Bin Yang
发明人： Man Fai Ng , Bin Yang
IPC分类号： H01L21/762
CPC分类号： H01L21/76224 , H01L21/76283 , H01L21/823807 , H01L21/823878 , H01L21/84
摘要： A fabrication method for a semiconductor device structure is provided. The device structure has a layer of silicon and a layer of silicon dioxide overlying the layer of silicon, and the method begins by forming an isolation recess by removing a portion of the silicon dioxide and a portion of the silicon. The isolation recess is filled with stress-inducing silicon nitride and, thereafter, the silicon dioxide is removed such that the stress-inducing silicon nitride protrudes above the silicon. Next, the exposed silicon is thermally oxidized to form silicon dioxide hardmask material overlying the silicon. Thereafter, a first portion of the silicon dioxide hardmask material is removed to reveal an accessible surface of the silicon, while leaving a second portion of the silicon dioxide hardmask material intact. Next, silicon germanium is epitaxially grown from the accessible surface of the silicon.
摘要翻译：提供了半导体器件结构的制造方法。该器件结构具有一层硅层和一层覆盖硅层的二氧化硅层，该方法开始于通过去除一部分二氧化硅和一部分硅来形成隔离凹槽。隔离凹部填充有应力诱导性氮化硅，然后去除二氧化硅，使得应力诱导性氮化硅突出于硅上方。接下来，暴露的硅被热氧化以形成覆盖在硅上的二氧化硅硬掩模材料。此后，去除二氧化硅硬掩模材料的第一部分以露出硅的可接近表面，同时留下二氧化硅硬掩模材料的第二部分完好无损。接下来，从硅的可接近表面外延生长硅锗。

89. 发明申请

US20120132989A1 MULTIGATE STRUCTURE FORMED WITH ELECTROLESS METAL DEPOSITION 有权
公开(公告)号：US20120132989A1
公开(公告)日：2012-05-31
申请号：US12955388
申请日：2010-11-29
申请人： Wilfried Haensch , Christian Lavoie , Christine Qiqing Ouyang , Xiaoyan Shao , Paul M. Solomon , Zhen Zhang , Bin Yang
发明人： Wilfried Haensch , Christian Lavoie , Christine Qiqing Ouyang , Xiaoyan Shao , Paul M. Solomon , Zhen Zhang , Bin Yang
IPC分类号： H01L27/12 , H01L21/84
CPC分类号： H01L29/0673 , H01L21/823814 , H01L29/41791
摘要： A multigate structure which comprises a semiconductor substrate; an ultra-thin silicon or carbon bodies of less than 20 nanometers thick located on the substrate; an electrolessly deposited metallic layer selectively located on the side surfaces and top surfaces of the ultra-thin silicon or carbon bodies and selectively located on top of the multigate structures to make electrical contact with the ultra-thin silicon or carbon bodies and to minimize parasitic resistance, and wherein the ultra-thin silicon or carbon bodies and metallic layer located thereon form source and drain regions is provided along with a process to fabricate the structure.

90. 发明授权

US08183220B2 Double-effective vaccine vector against foot-and-mouth disease virus (FMDV), methods of preparing and using the same 有权
标题翻译：针对口蹄疫病毒（FMDV）的双重有效疫苗载体，其制备和使用方法
公开(公告)号：US08183220B2
公开(公告)日：2012-05-22
申请号：US12577900
申请日：2009-10-13
申请人： Jixing Liu , Bin Yang , Xi Lan , Xiangping Yin , Yinmei Bai , Xiaorong Han , Xuerui Li , Baoyu Li , Yuping Fang , Zhiyong Li
发明人： Jixing Liu , Bin Yang , Xi Lan , Xiangping Yin , Yinmei Bai , Xiaorong Han , Xuerui Li , Baoyu Li , Yuping Fang , Zhiyong Li
IPC分类号： A61K48/00 , C12N15/113 , C12N15/42 , C12N15/85
CPC分类号： A61K39/135 , A61K39/12 , A61K2039/5258 , A61K2039/53 , A61K2039/552 , C12N15/1131 , C12N2310/11 , C12N2310/111 , C12N2770/32134 , C12N2830/20 , C12N2840/203
摘要： A double-effective vaccine vector against foot-and-mouth disease virus having a bicistronic expression vector sequence, the bicistronic expression vector sequence is an antisense gene sequence capable of conjugating with 5′ UTR of RNA of the foot-and-mouth disease virus genome and an intact sequence of VP1 structural protein gene of the foot-and-mouth disease virus. Animal experiments show that the vaccine vector provides double effects in terms of gene therapy and gene immunization for the prevention and treatment of foot-and-mouth disease in animals. Also provided are construction methods and methods of use of the vaccine vector.
摘要翻译：双顺反子表达载体序列是一种双重有效的口蹄疫病毒疫苗载体，双顺反子表达载体序列是能够与口蹄疫病毒基因组RNA的5'UTR共轭的反义基因序列和口蹄疫病毒的VP1结构蛋白基因的完整序列。动物实验表明疫苗载体在基因治疗和基因免疫方面提供了双重效果，用于预防和治疗动物口蹄疫。还提供了疫苗载体的构建方法和使用方法。

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