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81. 发明申请

US20120096321A1 BLOCK MANAGEMENT METHOD, MEMORY CONTROLLER, AND MEMORY STORAGE APPARATUS 有权
标题翻译：块管理方法，存储器控制器和存储器存储器
公开(公告)号：US20120096321A1
公开(公告)日：2012-04-19
申请号：US12960546
申请日：2010-12-06
申请人： Chih-Kang Yeh
发明人： Chih-Kang Yeh
IPC分类号： G06F11/20
CPC分类号： G11C29/76 , G06F12/0246 , G06F2212/7204
摘要： A block management method for managing physical blocks of a rewritable non-volatile memory, and a memory controller and a memory storage apparatus using the same are provided. The method includes grouping the physical blocks into at least a data area, a free area, and a replacement area, and grouping the physical blocks of the data area and the free area into a plurality of physical units. The method also includes when one of the physical blocks belonging to of the physical units of the data area becomes a bad physical block, getting a physical block from the replacement area and replacing the bad physical block with the gotten physical block. The method further includes associating a physical unit that contains no valid data in the free area with the replacement area. Thereby, the physical blocks can be effectively managed and the access efficiency can be improved.
摘要翻译：提供了一种用于管理可重写非易失性存储器的物理块的块管理方法，以及存储器控制器和使用其的存储器存储装置。该方法包括将物理块分组成至少数据区域，空闲区域和替换区域，以及将数据区域和空闲区域的物理块分组成多个物理单元。该方法还包括当属于数据区的物理单元的物理块中的一个变为不良物理块时，从替换区获取物理块，并用获得的物理块替换不良物理块。该方法还包括将在自由区域中不包含有效数据的物理单元与替换区域相关联。因此，可以有效地管理物理块，并且可以提高访问效率。

82. 发明申请

US20110302364A1 DATA WRITING METHOD FOR NON-VOLATILE MEMORY AND CONTROLLER USING THE SAME 有权
标题翻译：使用该方法的非易失性存储器和控制器的数据写入方法
公开(公告)号：US20110302364A1
公开(公告)日：2011-12-08
申请号：US13215166
申请日：2011-08-22
申请人： Chih-Kang Yeh , Chien-Hua Chu , Jia-Yi Fu
发明人： Chih-Kang Yeh , Chien-Hua Chu , Jia-Yi Fu
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F2212/1032 , G06F2212/7203 , G06F2212/7207
摘要： A data writing method for a non-volatile memory is provided, wherein the non-volatile memory includes a data area and a spare area. In the data writing method, a plurality of blocks in a substitution area of the non-volatile memory is respectively used for substituting a plurality of blocks in the data area, wherein data to be written into the blocks in the data area is written into the blocks in the substitution area, and the blocks in the substitution area are selected from the spare area of the non-volatile memory. A plurality of temporary blocks of the non-volatile memory is used as a temporary area of the blocks in the substitution area, wherein the temporary area is used for temporarily storing the data to be written into the blocks in the substitution area.
摘要翻译：提供了一种用于非易失性存储器的数据写入方法，其中非易失性存储器包括数据区域和备用区域。在数据写入方法中，分别使用非易失性存储器的替代区域中的多个块来代替数据区域中的多个块，其中写入数据区域中的块的数据被写入到在替代区域中的块，并且替换区域中的块从非易失性存储器的备用区域中选择。非易失性存储器的多个临时块被用作替换区域中的块的临时区域，其中临时区域用于临时存储要写入替换区域中的块的数据。

83. 发明授权

US08074148B2 Memory management method and controller for non-volatile memory storage device 有权
标题翻译：非易失性存储器的内存管理方法和控制器
公开(公告)号：US08074148B2
公开(公告)日：2011-12-06
申请号：US12186711
申请日：2008-08-06
申请人： Chien-Hua Chu , Kuo-Yi Cheng , Chih-Kang Yeh
发明人： Chien-Hua Chu , Kuo-Yi Cheng , Chih-Kang Yeh
IPC分类号： G11C29/00
CPC分类号： G06F11/1068
摘要： A memory management method and a controller for a non-volatile memory storage device are provided. The memory management method and the controller are adapted for establishing a logical-to-physical mapping table of each block in a memory buffer of the controller by merely reading the data stored in a system management area within a start page of each block, so as to promote the management efficiency of the non-volatile memory storage device. In addition, the method and the controller of the present invention integrate all of or a part of the system management areas within the start page for efficiently managing and using the memory capacity of all the system management areas within the start page.
摘要翻译：提供了一种用于非易失性存储器存储装置的存储器管理方法和控制器。存储器管理方法和控制器适于通过仅读取存储在每个块的起始页面中的系统管理区域中的数据来建立控制器的存储器缓冲器中的每个块的逻辑到物理映射表，以便提升非易失性存储设备的管理效率。此外，本发明的方法和控制器将起始页面内的系统管理区域的全部或一部分整合起来，以有效地管理和使用起始页面内的所有系统管理区域的存储器容量。

84. 发明申请

US20110145481A1 FLASH MEMORY MANAGEMENT METHOD AND FLASH MEMORY CONTROLLER AND STORAGE SYSTEM USING THE SAME 有权
标题翻译：闪存存储器管理方法和闪速存储器控制器和使用该存储器的存储系统
公开(公告)号：US20110145481A1
公开(公告)日：2011-06-16
申请号：US12697525
申请日：2010-02-01
申请人： Chih-Kang YEH
发明人： Chih-Kang YEH
IPC分类号： G06F12/00 , G06F12/02
CPC分类号： G06F12/0246 , G06F2212/1016 , G06F2212/7202
摘要： A flash memory management method for managing a plurality of physical units of a flash memory chip is provided. The flash memory management method includes grouping a portion of the physical units into a data area and a spare area; configuring a plurality of logical units and setting mapping relationships between the logical units and the physical units of the data area. The flash memory management method further includes receiving data and writing the data into the physical unit mapped to a second logical unit among the logical units, and the data belongs to a first logical unit among logical units. Accordingly, the flash memory management method can effectively reduce the number of times for organizing valid data, thereby reducing the time for executing a host write-in command.
摘要翻译：提供一种用于管理闪存芯片的多个物理单元的闪存管理方法。闪存管理方法包括将一部分物理单元分组成数据区和备用区; 配置多个逻辑单元并设置逻辑单元与数据区的物理单元之间的映射关系。闪速存储器管理方法还包括接收数据并将数据写入映射到逻辑单元中的第二逻辑单元的物理单元，并且数据属于逻辑单元中的第一逻辑单元。因此，闪速存储器管理方法可以有效地减少用于组织有效数据的次数，从而减少执行主机写入命令的时间。

85. 发明申请

US20110099324A1 FLASH MEMORY STORAGE SYSTEM AND FLASH MEMORY CONTROLLER AND DATA PROCESSING METHOD THEREOF 有权
标题翻译：闪存存储系统和闪速存储器控制器及其数据处理方法
公开(公告)号：US20110099324A1
公开(公告)日：2011-04-28
申请号：US12636043
申请日：2009-12-11
申请人： Chih-Kang Yeh
发明人： Chih-Kang Yeh
IPC分类号： G06F12/00 , G06F12/02
CPC分类号： G06F12/0246 , G06F2212/7201 , G06F2212/7202 , G06F2212/7209
摘要： A flash memory storage system including a flash memory chip, a connector, and a flash memory controller is provided. The flash memory controller configures a plurality of logical addresses and maps the logical addresses to a part of the physical addresses in the flash memory chip, and a host system uses a file system to access the logical addresses. Besides, the flash memory controller identifies a deleted logical address among the logical addresses and marks data in the physical address mapped to the deleted logical address as invalid data. Thereby, the flash memory storage system can identify data deleted by the host system in the physical addresses, so that the time for sorting data can be effectively reduced.
摘要翻译：提供一种包括闪存芯片，连接器和闪速存储器控制器的闪速存储器存储系统。闪速存储器控制器配置多个逻辑地址并将逻辑地址映射到闪存芯片中的物理地址的一部分，并且主机系统使用文件系统来访问逻辑地址。此外，闪存控制器识别逻辑地址中删除的逻辑地址，并且将映射到被删除的逻辑地址的物理地址中的数据标记为无效数据。由此，闪速存储器存储系统可以识别主机系统在物理地址中删除的数据，从而可以有效地减少分类数据的时间。

86. 发明申请

US20110022787A1 DATA WRITING METHOD FOR NON-VOLATILE MEMORY AND CONTROLLER USING THE SAME 有权
公开(公告)号：US20110022787A1
公开(公告)日：2011-01-27
申请号：US12896086
申请日：2010-10-01
申请人： Chih-Kang Yeh , Chien-Hua Chu , Jia-Yi Fu
发明人： Chih-Kang Yeh , Chien-Hua Chu , Jia-Yi Fu
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F2212/1032 , G06F2212/7203 , G06F2212/7207
摘要： A data writing method for a non-volatile memory is provided, wherein the non-volatile memory includes a data area and a spare area. In the data writing method, a plurality of blocks in a substitution area of the non-volatile memory is respectively used for substituting a plurality of blocks in the data area, wherein data to be written into the blocks in the data area is written into the blocks in the substitution area, and the blocks in the substitution area are selected from the spare area of the non-volatile memory. A plurality of temporary blocks of the non-volatile memory is used as a temporary area of the blocks in the substitution area, wherein the temporary area is used for temporarily storing the data to be written into the blocks in the substitution area.

87. 发明申请

US20100318724A1 FLASH MEMORY CONTROL CIRCUIT, FLASH MEMORY STORAGE SYSTEM, AND DATA TRANSFER METHOD 有权
标题翻译：闪存存储器控制电路，闪存存储系统和数据传输方法
公开(公告)号：US20100318724A1
公开(公告)日：2010-12-16
申请号：US12542137
申请日：2009-08-17
申请人： CHIH-KANG YEH
发明人： CHIH-KANG YEH
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F12/0607 , G06F2212/7202 , G06F2212/7208 , G11C11/5628
摘要： A flash memory control circuit including a microprocessor unit, a first interface unit, a second interface unit, a buffer memory, a memory management unit, and a data read/write unit is provided. The memory management unit manages a plurality of flash memory units, wherein each of the flash memory units has a plurality of flash memories, each of the flash memories has a plurality of memory cell arrays, and each of the memory cell arrays at least has an upper page and a lower page. The memory management unit groups the memory cell arrays of the corresponding flash memories into a plurality of data transfer unit sets (DTUSs). The data read/write unit interleavingly transfers data to the flash memory units in units of the DTUSs. Thereby, the flash memory control circuit can transfer the data stably and the usage of the buffer memory can be reduced.
摘要翻译：提供了包括微处理器单元，第一接口单元，第二接口单元，缓冲存储器，存储器管理单元和数据读/写单元的闪存控制电路。存储器管理单元管理多个闪速存储器单元，其中每个闪存单元具有多个闪速存储器，每个闪速存储器具有多个存储单元阵列，并且每个存储单元阵列至少具有上页和下页。存储器管理单元将相应的闪速存储器的存储单元阵列分组成多个数据传送单元组（DTUS）。数据读/写单元以DTUS为单位将数据交错地传送到闪速存储单元。由此，闪速存储器控制电路可以稳定地传送数据，并且可以减少缓冲存储器的使用。

88. 发明申请

US20100274949A1 DATA ACCESS METHOD FOR FLASH MEMORY AND STORAGE SYSTEM AND CONTROLLER USING THE SAME 有权
标题翻译：用于闪速存储器和存储系统的数据访问方法以及使用该存储器的控制器
公开(公告)号：US20100274949A1
公开(公告)日：2010-10-28
申请号：US12490092
申请日：2009-06-23
申请人： Chih-Kang Yeh
发明人： Chih-Kang Yeh
IPC分类号： G06F12/02 , G06F12/00
CPC分类号： G06F12/0246 , G06F2212/7207
摘要： A data access method for accessing a flash memory storage system, a storage system and a controller using the same are provided. A flash memory has a plurality of physical blocks, which are grouped into a system area, a data area, and a spare area. One or more variable tables are established to record transient information of each set of mother-child blocks of the data area and the spare area. The number of the variable table could be adjusted adaptively according to time required for writing the variable table into the system area, such that an overall data access efficiency of the flash memory storage system is enhanced.
摘要翻译：提供了一种访问闪存存储系统的数据访问方法，存储系统和使用该存储系统的控制器。闪存具有多个物理块，其被分组为系统区域，数据区域和备用区域。建立一个或多个可变表以记录数据区和备用区的每组母子块的瞬态信息。可以根据将变量表写入系统区域所需的时间自适应地调整变量表的数量，从而提高闪速存储器存储系统的总体数据访问效率。

89. 发明申请

US20100257307A1 DATA MANAGEMENT METHOD AND FLASH MEMORY STORAGE SYSTEM AND CONTROLLER USING THE SAME 有权
标题翻译：数据管理方法和闪存存储系统及其控制器
公开(公告)号：US20100257307A1
公开(公告)日：2010-10-07
申请号：US12480125
申请日：2009-06-08
申请人： CHIEN-HUA CHU , Chih-Kang Yeh
发明人： CHIEN-HUA CHU , Chih-Kang Yeh
IPC分类号： G06F12/00 , G06F12/08 , G06F12/02
CPC分类号： G06F12/0804 , G06F12/0246 , G06F2212/2022 , G06F2212/214 , G06F2212/7208
摘要： A data management method for a flash memory storage system having a cache memory is provided. The data management method includes writing data into a flash memory when a write command is executed, and determining currently a state of all the writing data which is temporarily stored in the cache memory. Wherein, if the state indicates that a time for writing all the writing data temporarily stored in the cache memory into a flash memory may exceed an upper limit processing time, a portion of the writing data temporarily stored in the cache memory is first written into the flash memory. Accordingly, the data management method may effectively avoid a delay caused by a flush command issued from the host for flushing the cache memory.
摘要翻译：提供了一种具有高速缓冲存储器的闪存存储系统的数据管理方法。数据管理方法包括在执行写入命令时将数据写入闪速存储器，并且确定当前存储在高速缓冲存储器中的所有写入数据的状态。其中，如果状态指示将临时存储在高速缓冲存储器中的所有写入数据写入闪速存储器的时间可能超过上限处理时间，则暂时存储在高速缓冲存储器中的部分写入数据首先写入闪存因此，数据管理方法可以有效地避免由主机发出的用于刷新高速缓冲存储器的刷新命令引起的延迟。

90. 发明申请

US20100205352A1 MULTILEVEL CELL NAND FLASH MEMORY STORAGE SYSTEM, AND CONTROLLER AND ACCESS METHOD THEREOF 有权
标题翻译：多电平单元NAND闪存存储系统及其控制器及其访问方法
公开(公告)号：US20100205352A1
公开(公告)日：2010-08-12
申请号：US12413071
申请日：2009-03-27
申请人： Chien-Hua Chu , Chih-Kang Yeh , Kok-Yong Tan
发明人： Chien-Hua Chu , Chih-Kang Yeh , Kok-Yong Tan
IPC分类号： G06F12/02 , G06F12/00
CPC分类号： G06F12/0246 , G06F2212/7202 , G11C11/5628 , G11C29/82
摘要： A multi level cell (MLC) NAND flash memory storage system is provided. A controller of the MLC NAND flash memory storage system declares it a signal level cell (SLC) NAND flash memory chip to a host system connected thereto and provides a plurality of SLC logical blocks to the host system. When the controller receives a write command and a user data from the host system, the controller writes the user data into a page of a MLC physical block and records the page of the SLC logical block corresponding to the page of the MLC physical block. When the controller receives an erase command from the host system, the controller writes a predetermined data into the page of the MLC physical block mapped to the SLC logical block to be erased, wherein the predetermined data has the same pattern as a pattern of the erased page.
摘要翻译：提供了多级单元（MLC）NAND闪存存储系统。 MLC NAND闪存存储系统的控制器将信号级单元（SLC）NAND闪速存储器芯片声明到连接到其的主机系统，并向主机系统提供多个SLC逻辑块。当控制器从主机系统接收写入命令和用户数据时，控制器将用户数据写入MLC物理块的页面，并记录与MLC物理块的页面相对应的SLC逻辑块的页面。当控制器从主机系统接收到擦除命令时，控制器将预定数据写入映射到要擦除的SLC逻辑块的MLC物理块的页面，其中预定数据具有与擦除的模式相同的模式页。

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