专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

71. 发明授权

US07977152B2 Non-volatile resistive-switching memories formed using anodization 失效
标题翻译：使用阳极氧化形成的非易失性电阻式开关存储器
公开(公告)号：US07977152B2
公开(公告)日：2011-07-12
申请号：US12463319
申请日：2009-05-08
申请人： Alexander Gorer , Prashant Phatak , Tony Chiang , Igor Ivanov
发明人： Alexander Gorer , Prashant Phatak , Tony Chiang , Igor Ivanov
IPC分类号： H01L21/00
CPC分类号： H01L45/10 , H01L27/2463 , H01L45/1233 , H01L45/146 , H01L45/1633
摘要： Non-volatile resistive-switching memories formed using anodization are described. A method for forming a resistive-switching memory element using anodization includes forming a metal containing layer, anodizing the metal containing layer at least partially to form a resistive switching metal oxide, and forming a first electrode over the resistive switching metal oxide. In some examples, an unanodized portion of the metal containing layer may be a second electrode of the memory element.
摘要翻译：描述了使用阳极氧化形成的非易失性电阻式开关存储器。一种使用阳极氧化形成电阻式开关存储元件的方法包括形成含金属层，至少部分地阳极氧化含金属层以形成电阻式开关金属氧化物，以及在电阻式开关金属氧化物上形成第一电极。在一些实例中，含金属层的未渐变部分可以是存储元件的第二电极。

72. 发明授权

US07863087B1 Methods for forming resistive-switching metal oxides for nonvolatile memory elements 有权
标题翻译：用于形成用于非易失性存储元件的电阻式开关金属氧化物的方法
公开(公告)号：US07863087B1
公开(公告)日：2011-01-04
申请号：US12114655
申请日：2008-05-02
申请人： Pragati Kumar , Sandra G. Malhotra , Sean Barstow , Tony Chiang
发明人： Pragati Kumar , Sandra G. Malhotra , Sean Barstow , Tony Chiang
IPC分类号： H01L21/00 , H01L21/16 , H01L21/20 , H01L21/36
CPC分类号： H01L45/1625 , H01L27/2409 , H01L27/2463 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1641
摘要： Nonvolatile memory elements are provided that have resistive switching metal oxides. The nonvolatile memory elements may be formed from resistive-switching metal oxide layers. Metal oxide layers may be formed using sputter deposition at relatively low sputtering powers, relatively low duty cycles, and relatively high sputtering gas pressures. Dopants may be incorporated into a base oxide layer at an atomic concentration that is less than the solubility limit of the dopant in the base oxide. At least one oxidation state of the metal in the base oxide is preferably different than at least one oxidation sate of the dopant. The ionic radius of the dopant and the ionic radius of the metal may be selected to be close to each other. Annealing and oxidation operations may be performed on the resistive switching metal oxides. Bistable metal oxides with relatively large resistivities and large high-state-to-low state resistivity ratios may be produced.
摘要翻译：提供具有电阻开关金属氧化物的非易失性存储元件。非易失性存储元件可以由电阻式开关金属氧化物层形成。金属氧化物层可以使用相对低的溅射功率，相对低的占空比和较高的溅射气体压力的溅射沉积形成。掺杂剂可以以小于基底氧化物中的掺杂剂的溶解度极限的原子浓度结合到基底氧化物层中。基底氧化物中金属的至少一种氧化态优选不同于掺杂剂的至少一种氧化态。可以选择掺杂剂的离子半径和金属的离子半径彼此接近。可以对电阻式开关金属氧化物进行退火和氧化操作。可以制造具有相对较大的电阻率和大的高 - 低 - 电阻率比的双稳态金属氧化物。

73. 发明授权

US07658790B1 Concentrated electroless solution for selective deposition of cobalt-based capping/barrier layers 失效
标题翻译：用于选择性沉积钴基封端/阻挡层的集中化学镀溶液
公开(公告)号：US07658790B1
公开(公告)日：2010-02-09
申请号：US11773316
申请日：2007-07-03
申请人： Alexander Gorer , Tony Chiang , Chi-I Lang
发明人： Alexander Gorer , Tony Chiang , Chi-I Lang
IPC分类号： C23C18/34
CPC分类号： C23C18/34 , C23C18/50
摘要： An electroless solution for deposition of a cobalt-based alloy on a substrate is provided. The electroless solution may be formed by mixing first and second solutions, with the first and second solutions being prepared from concentrated precursors. In one embodiment, the first solution contains a cobalt (Co) ion source and a complexing and deposition selectivity agent. In one embodiment, the cobalt concentration in the first solution is at least 90 millimoles per liter. The second solution contains a reducing agent. In one embodiment, the reducing agent is dimethylamineborane (DMAB) having a concentration of at least 10 grams per liter. In other embodiments, the first solution also contains a tungsten (W) ion source, and either the first or second solution also contains a phosphorous (P) ion source.
摘要翻译：提供了一种用于在基底上沉积钴基合金的无电溶液。化学溶液可以通过混合第一和第二溶液形成，第一和第二溶液由浓缩的前体制备。在一个实施方案中，第一溶液含有钴（Co）离子源和络合和沉积选择剂。在一个实施方案中，第一溶液中的钴浓度为至少90毫摩尔/升。第二种溶液含有还原剂。在一个实施方案中，还原剂是浓度为至少10克/升的二甲胺硼烷（DMAB）。在其它实施方案中，第一溶液还含有钨（W）离子源，并且第一或第二溶液也含有磷（P）离子源。

74. 发明申请

US20090278110A1 NON-VOLATILE RESISTIVE-SWITCHING MEMORIES FORMED USING ANODIZATION 失效
标题翻译：使用阳极化形成的非易失性电阻开关存储器
公开(公告)号：US20090278110A1
公开(公告)日：2009-11-12
申请号：US12463319
申请日：2009-05-08
申请人： Alexander Gorer , Prashant Phatak , Tony Chiang , Igor Ivanov
发明人： Alexander Gorer , Prashant Phatak , Tony Chiang , Igor Ivanov
IPC分类号： H01L47/00 , H01L21/16
CPC分类号： H01L45/10 , H01L27/2463 , H01L45/1233 , H01L45/146 , H01L45/1633
摘要： Non-volatile resistive-switching memories formed using anodization are described. A method for forming a resistive-switching memory element using anodization includes forming a metal containing layer, anodizing the metal containing layer at least partially to form a resistive switching metal oxide, and forming a first electrode over the resistive switching metal oxide. In some examples, an unanodized portion of the metal containing layer may be a second electrode of the memory element.
摘要翻译：描述了使用阳极氧化形成的非易失性电阻式开关存储器。一种使用阳极氧化形成电阻式开关存储元件的方法包括形成含金属层，至少部分地阳极氧化含金属层以形成电阻式开关金属氧化物，以及在电阻式开关金属氧化物上形成第一电极。在一些实例中，含金属层的未渐变部分可以是存储元件的第二电极。

75. 发明申请

US20090275210A1 COMBINATORIAL PLASMA ENHANCED DEPOSITION TECHNIQUES 有权
标题翻译：组合等离子体增强沉积技术
公开(公告)号：US20090275210A1
公开(公告)日：2009-11-05
申请号：US12433842
申请日：2009-04-30
申请人： Sunil Shanker , Tony Chiang
发明人： Sunil Shanker , Tony Chiang
IPC分类号： H01L21/30
CPC分类号： C23C16/047 , C23C16/04 , C23C16/45536 , C23C16/45551 , C23C16/45565 , C23C16/45574 , C23C16/45591 , C23C16/4583 , C23C16/46 , C23C16/50 , C23C16/5096 , C23C16/52 , H01J37/32357 , H01J37/32366
摘要： Combinatorial plasma enhanced deposition techniques are described, including designating multiple regions of a substrate, providing a precursor to at least a first region of the multiple regions, and providing a plasma to the first region to deposit a first material on the first region formed using the first precursor, wherein the first material is different from a second material formed on a second region of the substrate.
摘要翻译：描述组合等离子体增强沉积技术，包括指定衬底的多个区域，为多个区域的至少第一区域提供前体，以及向第一区域提供等离子体，以将第一材料沉积在使用第一前体，其中所述第一材料不同于形成在所述基底的第二区域上的第二材料。

76. 发明申请

US20090272959A1 Non-Volatile Resistive-Switching Memories 有权
标题翻译：非易失性电阻开关存储器
公开(公告)号：US20090272959A1
公开(公告)日：2009-11-05
申请号：US12255109
申请日：2008-10-21
申请人： Prashant Phatak , Tony Chiang , Pragati Kumar , Michael Miller
发明人： Prashant Phatak , Tony Chiang , Pragati Kumar , Michael Miller
IPC分类号： H01L47/00 , H01L21/00
CPC分类号： H01L45/146 , G11C13/0007 , G11C2213/32 , G11C2213/55 , G11C2213/72 , H01L27/2409 , H01L27/2463 , H01L29/8615 , H01L45/08 , H01L45/10 , H01L45/122 , H01L45/1233 , H01L45/1253 , H01L45/1616 , H01L45/1625 , H01L45/1641 , H01L45/165 , H01L45/1658 , H01L47/00
摘要： Non-volatile resistive-switching memories are described, including a memory element having a first electrode, a second electrode, a metal oxide between the first electrode and the second electrode. The metal oxide switches using bulk-mediated switching, has a bandgap greater than 4 electron volts (eV), has a set voltage for a set operation of at least one volt per one hundred angstroms of a thickness of the metal oxide, and has a leakage current density less than 40 amps per square centimeter (A/cm2) measured at 0.5 volts (V) per twenty angstroms of the thickness of the metal oxide.
摘要翻译：描述了非易失性电阻式切换存储器，包括在第一电极和第二电极之间具有第一电极，第二电极，金属氧化物的存储元件。使用大容量介导的开关的金属氧化物开关具有大于4电子伏特（eV）的带隙，具有用于金属氧化物的厚度每100埃至少一伏特的设定操作的设定电压，并且具有漏电流密度小于每平方厘米40安培（A / cm2），每0.5伏（V），金属氧化物厚度每20埃测得。

77. 发明申请

US20090075095A1 METHODS FOR PROCESSING A SUBSTRATE HAVING A BACKSIDE LAYER 审中-公开
标题翻译：用于处理具有背层的基板的方法
公开(公告)号：US20090075095A1
公开(公告)日：2009-03-19
申请号：US12208865
申请日：2008-09-11
申请人： Igor Ivanov , Tony Chiang , Chi-I Lang
发明人： Igor Ivanov , Tony Chiang , Chi-I Lang
IPC分类号： B32B27/30 , B32B9/00 , B44C1/22 , B05D1/18 , C25D5/02
CPC分类号： C25D5/028 , C25D5/34 , C25D7/12 , H01L21/6835 , Y10T428/31855
摘要： Methods for processing a substrate utilizing a backside layer are presented including: receiving a substrate, the substrate including a front side and a backside; forming the backside layer on the backside of the substrate; and performing at least one processing operation on the front side of the substrate, wherein the backside layer protects the backside of the substrate during the performing the at least one processing operation. In some embodiments, methods further include cross-linking the backside layer such that the backside layer is stabilized. In some embodiments, methods further include: functionalizing the backside layer, where the functionalizing alters a chemical characteristic of the backside layer, and where the functionalizing includes a functional group such as: a hydroxyl group, an amino group, a mercapto group, a fluorine group, a chlorine group, an alkene group, an aryle group, and a carboxy group.
摘要翻译：提供了利用背面层处理衬底的方法，包括：接收衬底，所述衬底包括正面和背面; 在衬底的背面形成背面层; 以及在所述基板的前侧执行至少一个处理操作，其中所述背面层在执行所述至少一个处理操作期间保护所述基板的背面。在一些实施方案中，方法还包括交联背面层，使得背侧层是稳定的。在一些实施方案中，方法还包括：功能化背面层，其中官能化改变背面层的化学特性，并且官能化包括官能团如羟基，氨基，巯基，氟基团，氯基团，烯烃基团，芳基基团和羧基基团。

78. 发明申请

US20090053888A1 Method of depositing a diffusion barrier layer which provides an improved interconnect 审中-公开
标题翻译：沉积扩散阻挡层的方法，其提供改进的互连
公开(公告)号：US20090053888A1
公开(公告)日：2009-02-26
申请号：US12288540
申请日：2008-10-20
申请人： Peijun Ding , Zheng Xu , Hong Zhang , Xianmin Tang , Praburam Gopalraja , Suraj Rengarajan , John C. Forster , Jianming Fu , Tony Chiang , Gongda Yao , Fusen E. Chen , Barry L. Chin , Gene Y. Kohara
发明人： Peijun Ding , Zheng Xu , Hong Zhang , Xianmin Tang , Praburam Gopalraja , Suraj Rengarajan , John C. Forster , Jianming Fu , Tony Chiang , Gongda Yao , Fusen E. Chen , Barry L. Chin , Gene Y. Kohara
IPC分类号： H01L21/4763 , H01L21/31
CPC分类号： H01L21/02183 , C23C14/0641 , C23C14/165 , C23C14/541 , C23C14/5806 , H01L21/02266 , H01L21/2855 , H01L21/318 , H01L21/76846 , H01L21/76856 , H01L21/76862 , H01L21/76876
摘要： A method of depositing a duffusion barrier layer with overlying conductive layer or fill which lowers resistivity of a semiconductor device interconnect. The lower resistivity is achieved by inducing the formation of alpha tantalum within a tantalum-comprising barrier layer.
摘要翻译：一种用覆盖的导电层或填充物沉积具有降低半导体器件互连电阻率的渗透阻挡层的方法。通过诱导在含钽隔离层内形成α钽来实现较低的电阻率。

79. 发明申请

US20080220601A1 Methods for forming nonvolatile memory elements with resistive-switching metal oxides 有权
标题翻译：用电阻式开关金属氧化物形成非易失性存储元件的方法
公开(公告)号：US20080220601A1
公开(公告)日：2008-09-11
申请号：US11714334
申请日：2007-03-05
申请人： Nitin Kumar , Jinhong Tong , Chi-I Lang , Tony Chiang , Prashant B. Phatak
发明人： Nitin Kumar , Jinhong Tong , Chi-I Lang , Tony Chiang , Prashant B. Phatak
IPC分类号： H01L21/20 , H01L21/4763
CPC分类号： H01L45/04 , H01L27/2463 , H01L45/1233 , H01L45/1253 , H01L45/146 , H01L45/1608
摘要： Nonvolatile memory elements are provided that have resistive switching metal oxides. The nonvolatile memory elements may be formed by depositing a metal-containing material on a silicon-containing material. The metal-containing material may be oxidized to form a resistive-switching metal oxide. The silicon in the silicon-containing material reacts with the metal in the metal-containing material when heat is applied. This forms a metal silicide lower electrode for the nonvolatile memory element. An upper electrode may be deposited on top of the metal oxide. Because the silicon in the silicon-containing layer reacts with some of the metal in the metal-containing layer, the resistive-switching metal oxide that is formed is metal deficient when compared to a stoichiometric metal oxide formed from the same metal.
摘要翻译：提供具有电阻开关金属氧化物的非易失性存储元件。非易失性存储元件可以通过将含金属的材料沉积在含硅材料上而形成。含金属材料可以被氧化以形成电阻式开关金属氧化物。当施加热量时，含硅材料中的硅与含金属材料中的金属反应。这形成用于非易失性存储元件的金属硅化物下电极。上部电极可以沉积在金属氧化物的顶部。由于含硅层中的硅与含金属层中的一些金属反应，与由相同金属形成的化学计量的金属氧化物相比，形成的电阻 - 开关金属氧化物是金属缺陷的。

80. 发明申请

US20070241458A1 Metal / metal nitride barrier layer for semiconductor device applications 失效
标题翻译：用于半导体器件应用的金属/金属氮化物阻挡层
公开(公告)号：US20070241458A1
公开(公告)日：2007-10-18
申请号：US11809153
申请日：2007-05-30
申请人： Peijun Ding , Zheng Xu , Hong Zhang , Xianmin Tang , Praburam Gopalraja , Suraj Rengarajan , John Forster , Jianming Fu , Tony Chiang , Gongda Yao , Fusen Chen , Barry Chin , Gene Kohara
发明人： Peijun Ding , Zheng Xu , Hong Zhang , Xianmin Tang , Praburam Gopalraja , Suraj Rengarajan , John Forster , Jianming Fu , Tony Chiang , Gongda Yao , Fusen Chen , Barry Chin , Gene Kohara
IPC分类号： H01L23/48
CPC分类号： H01L21/02183 , C23C14/024 , C23C14/046 , C23C14/0641 , C23C14/165 , C23C14/541 , C23C14/5806 , H01L21/022 , H01L21/02266 , H01L21/02271 , H01L21/02362 , H01L21/2855 , H01L21/318 , H01L21/76846 , H01L21/76856 , H01L21/76862 , H01L21/76876 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： A metal/metal nitride barrier layer for semiconductor device applications. The barrier layer is particularly useful in contact vias where high conductivity of the via is important, and a lower resistivity barrier layer provides improved overall via conductivity.
摘要翻译：用于半导体器件应用的金属/金属氮化物阻挡层。阻挡层在通孔的高导电性很重要的接触孔中特别有用，并且较低电阻率的阻挡层提供改进的整体通孔导电性。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式