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71. 发明申请

US20050275589A1 Thermal management system and method for thin membrane type antennas 有权
标题翻译：薄膜型天线热管理系统及方法
公开(公告)号：US20050275589A1
公开(公告)日：2005-12-15
申请号：US10869183
申请日：2004-06-15
申请人： James Wilson
发明人： James Wilson
IPC分类号： H01L23/427 , H05K7/20 , H01Q1/38 , G06F1/16
CPC分类号： H01L23/427 , H01L2924/0002 , H01L2924/00
摘要： According to an embodiment of the present invention, a thermal management system for electronic components includes a plurality of spacers disposed between a first flexible substrate and a second flexible substrate to form a plurality of heat transfer regions each having a plurality of capillary pumping regions, a two-phase fluid disposed between at least one pair of adjacent spacers, and a plurality of electronic components coupled to a mounting surface of the first flexible substrate.
摘要翻译：根据本发明的实施例，用于电子部件的热管理系统包括设置在第一柔性基板和第二柔性基板之间的多个间隔件，以形成多个传热区域，每个传热区域具有多个毛细管抽吸区域，设置在至少一对相邻间隔件之间的两相流体和耦合到第一柔性基板的安装表面的多个电子部件。

72. 发明申请

US20050226705A1 Tire-detecting wheel chock apparatus 失效
标题翻译：轮胎检测轮轴承装置
公开(公告)号：US20050226705A1
公开(公告)日：2005-10-13
申请号：US10798708
申请日：2004-03-11
申请人： James Wilson
发明人： James Wilson
IPC分类号： B60T3/00 , B65F9/00 , B65G69/00
CPC分类号： B60T3/00 , B65G69/005 , B65G2203/042
摘要： A wheel chock apparatus includes a chock body for chocking a tire of a vehicle such as a semi-trailer prior to loading or unloading the trailer by a towmotor at a docking bay. When properly positioned, the chock body prevents movement of the vehicle away from the docking bay during the loading or unloading operation. Such movement poses a possible hazard to the cargo being loaded or unloaded, to the equipment performing the loading/unloading operations, and to the operator of such equipment. The chock body includes a sensor mounted on or embedded in the body, which is capable of detecting a properly chocked tire. The sensor is electrically connected to a microcontroller programmed to control an indicator, such as a visual light or audible alarm, that will alert an equipment operator on the docking bay as to whether the driver of the vehicle has properly chocked the tires.
摘要翻译：车轮轴承装置包括用于在通过对接间隔件的拖车装载或卸载拖车之前，将半挂车等车辆的轮胎堵塞的轴承座。当正确定位时，轴承座体在加载或卸载操作期间防止车辆远离对接舱的运动。这种运动对于装载或卸载的货物，进行装载/卸载操作的设备以及这种设备的操作者构成可能的危险。轴承座体包括安装在或嵌入在主体中的传感器，其能够检测正确地堵塞的轮胎。传感器电连接到被编程为控制诸如视觉光或声音报警器的指示器的微控制器，该指示器将警告设备操作者对接舱，以确定车辆的驾驶员是否正确地堵塞了轮胎。

73. 发明申请

US20050182840A1 Managing access to a network 失效
公开(公告)号：US20050182840A1
公开(公告)日：2005-08-18
申请号：US11103273
申请日：2005-04-11
申请人： James Wilson
发明人： James Wilson
IPC分类号： H04L29/06 , H04L29/08 , G06F15/16
CPC分类号： H04L67/14 , H04L69/18 , H04L69/329
摘要： A network connection on a processor-based system may be managed by a software layer that accommodates for a variety of different types or characteristics of network connections. In effect, the software layer abstracts the characteristics of a variety of different connections and enables the client on the processor-based system to connect without concern for the particular characteristics of the resident connection. In addition, the software layer may determine when to release a connection to the Internet. This may reduce the disruption that may occur when multiple clients use the same connection and one of those clients disconnects the connection, thereby terminating the access to the connection by one or more other clients.

74. 外观设计

USD506976S1 Uninterruptable power supply 失效
公开(公告)号：USD506976S1
公开(公告)日：2005-07-05
申请号：US29185518
申请日：2003-06-27
申请人： Joseph Dechene , Ron Catanzaro , Michael Manganese , Jane Morgan , Andrew Chase , James Wilson
设计人： Joseph Dechene , Ron Catanzaro , Michael Manganese , Jane Morgan , Andrew Chase , James Wilson

75. 发明申请

US20050091025A1 Methods and systems for improved integrated circuit functional simulation 审中-公开
标题翻译：改进集成电路功能模拟的方法和系统
公开(公告)号：US20050091025A1
公开(公告)日：2005-04-28
申请号：US10927810
申请日：2004-08-26
申请人： James Wilson , Kenneth Imboden , David Gold
发明人： James Wilson , Kenneth Imboden , David Gold
IPC分类号： G06F17/50 , H01L20060101
CPC分类号： G06F17/504
摘要： Methods and systems for performing symbolic simulation, including techniques for translating a conventional simulation into a symbolic simulation, for handling wait and delay states, and for performing temporally out-of-order simulations. Additional techniques for extracting a signal graph from an HDL representation of a device, for representing signal values as functions of time using binary decision diagrams, and for computing minimal signal sets for accurate simulation. Techniques and methods for improving waveform dumping, reducing the waveform database, and for combining out-of-order simulation or reduced time steps with conventional time-based simulation.
摘要翻译：用于执行符号仿真的方法和系统，包括用于将常规仿真转换为符号仿真的技术，用于处理等待和延迟状态以及用于执行时间上无序的仿真。用于从设备的HDL表示提取信号图形的附加技术，用于使用二进制判定图将信号值表示为时间的函数，以及用于计算用于精确模拟的最小信号集。用于改进波形倾倒，减少波形数据库以及通过传统的基于时间的模拟结合无序模拟或缩短时间步长的技术和方法。

76. 外观设计

USD495355S1 Video presenter 失效
标题翻译：视频演示者
公开(公告)号：USD495355S1
公开(公告)日：2004-08-31
申请号：US29193157
申请日：2003-11-04
申请人： Alan Chrisopher Mudd , Michel Arney , James Wilson , Joo Bok Kim , Hee Myoung Yi
设计人： Alan Chrisopher Mudd , Michel Arney , James Wilson , Joo Bok Kim , Hee Myoung Yi

77. 发明授权

US06177728B1 Integrated circuit chip device having balanced thermal expansion 失效
标题翻译：具有平衡热膨胀的集成电路芯片器件
公开(公告)号：US06177728B1
公开(公告)日：2001-01-23
申请号：US09067707
申请日：1998-04-28
申请人： Robin A. Susko , James Wilson
发明人： Robin A. Susko , James Wilson
IPC分类号： H01L2348
CPC分类号： H01L21/563 , H01L23/293 , H01L23/3737 , H01L23/49894 , H01L24/29 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2224/83102 , H01L2224/92125 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01027 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01061 , H01L2924/01087 , H01L2924/10253 , H01L2924/14 , H01L2924/15311 , H01L2924/00 , H01L2924/3512 , H01L2224/05599
摘要： CTE differentials between chips and organic dielectric carriers, boards or other substrates to which the chips are attached are accommodated with a layer of a thermoplastic material, preferably a thermotropic polymer whose physical properties can be altered by extrusion or other physical processes, such as liquid crystalline polyesters, that modifies the thermal expansion of at least one component of the package and thereby reduces CTE differentials. The material may be applied to the entire surface of a chip carrier, printed circuit or other substrate, or form an interior layer of a multi-layered structure. It may also be applied to selected regions or areas on the surface of a carrier or other substrate where adjustment is required.
摘要翻译：芯片与有机电介质载体，芯片或其它芯片所连接的其它基板之间的CTE差异容纳有一层热塑性材料，优选一种热致变性聚合物，其物理性能可以通过挤出或其它物理过程如液晶聚酯，其改变包装的至少一种组分的热膨胀，从而降低CTE差异。该材料可以施加到芯片载体，印刷电路或其它基底的整个表面，或者形成多层结构的内层。还可以将其应用于需要调整的载体或其他基板的表面上的选定区域或区域。

78. 发明授权

US06040793A Switched-capacitor sigma-delta analog-to-digital converter with input voltage overload protection 失效
标题翻译：具有输入电压过载保护的开关电容Σ-Δ模数转换器
公开(公告)号：US06040793A
公开(公告)日：2000-03-21
申请号：US40620
申请日：1998-03-18
申请人： Paul F. Ferguson, Jr. , James Wilson
发明人： Paul F. Ferguson, Jr. , James Wilson
IPC分类号： H03M3/02 , H03M3/00 , H03M1/12
CPC分类号： H03M3/44 , H03M3/43
摘要： A sigma-delta analog-to-digital converter includes an integrator having an input and an output and an integrator capacitor connected between the input and output. A switched-capacitor input circuit includes at least one input capacitor, an input sampling switching circuit and an input delivery switching circuit. The input sampling switching circuit includes at least one input sampling switch operable to connect the input capacitor to be charged by an input voltage at a sampling rate. The input delivery switching circuit includes at least one input delivery switch operable to connect the input capacitor to transfer charge to the integrator capacitor at a first transfer rate. A switched-capacitor feedback circuit is connected in a feedback path between the input and output of the integrator. The feedback circuit includes at least one feedback capacitor, a feedback sampling switching circuit and a feedback delivery switching circuit. The feedback sampling switching circuit includes at least one feedback sampling switch operable to connect the feedback capacitor to be charged by a feedback reference voltage at the sampling rate. The feedback delivery switching circuit includes at least one feedback delivery switch operable to connect the feedback capacitor to transfer charge to the integrator capacitor at a second transfer rate. The second transfer rate is a predetermined factor greater than the first transfer rate such that the sampled feedback reference voltage charge is transferred to the integrator capacitor at a greater rate than the transfer of the sampled input voltage charge to prevent modulator instability due to an input overload condition.
摘要翻译： Σ-Δ模数转换器包括具有输入和输出的积分器以及连接在输入和输出之间的积分电容器。开关电容器输入电路包括至少一个输入电容器，输入采样开关电路和输入输出切换电路。输入采样开关电路包括至少一个输入采样开关，其可操作以以采样率将输入电容器连接到输入电压。输入传送切换电路包括至少一个输入传送开关，其可操作以连接输入电容器，以第一传送速率将电荷传送到积分器电容器。开关电容反馈电路连接在积分器的输入和输出之间的反馈路径中。反馈电路包括至少一个反馈电容器，反馈采样开关电路和反馈传递切换电路。反馈采样开关电路包括至少一个反馈采样开关，其可操作以以采样率将反馈电容器连接到反馈参考电压。反馈传送切换电路包括至少一个反馈传递开关，其可操作以连接反馈电容器以以第二传送速率将电荷传递到积分器电容器。第二传送速率是大于第一传送速率的预定因子，使得采样的反馈参考电压电荷以比采样的输入电压电荷的传送更大的速率传送到积分器电容器，以防止调制器由于输入过载引起的不稳定条件。

79. 发明授权

US5712635A Digital to analog conversion using nonuniform sample rates 失效
标题翻译：使用不均匀采样率进行数模转换
公开(公告)号：US5712635A
公开(公告)日：1998-01-27
申请号：US612944
申请日：1996-08-29
申请人： James Wilson , Ronald A. Cellini , James M. Sobol
发明人： James Wilson , Ronald A. Cellini , James M. Sobol
IPC分类号： H03M1/66 , H03H17/06 , H03L7/08 , H03L7/093 , H03L7/099 , H03M3/02 , H03M7/36
CPC分类号： H03H17/06 , H03H17/0614 , H03H17/0628 , H03L7/08 , H03L7/093 , H03L7/0992 , H03M3/372 , H03L2207/50 , H03M3/50
摘要： A method and apparatus for digital to analog conversion using sigma-delta modulation of the temporal spacing between digital samples. The method and apparatus of the present invention provides for sigma-delta modulation of the time base such that errors produced by nonuniform sampling are frequency-shaped to a region (i.e., shifted to higher frequencies) where they can be removed by conventional filtering techniques In one embodiment, the digital data is interpolated by a fixed ratio and then decimated under control of a sigma-delta modulated frequency selection signal that represents, on average, the data rate of the incoming digital data stream. In another embodiment, the digital data is interpolated under control of a sigma-delta modulated frequency selection signal that represents, on average, the data rate of the incoming digital data stream and then decimated by a fixed ratio. The frequency signal selection number is modulated using an n-th order m-bit sigma-delta modulator. Data thus emerges from the interpolation/decimation process at the clock rate of the n-th order m-bit sigma-delta modulator. The method and apparatus converts the data rate of the incoming digital data stream to the data rate of the n-th order m-bit sigma-delta modulator.
摘要翻译： PCT No.PCT / US94 / 10269 Sec。 371日期：1996年8月29日 102（e）日期1996年8月29日PCT 1994年9月13日PCT公布。公开号WO95 / 08221 日期1995年3月23日一种使用Σ-Δ调制数字样本之间的时间间隔进行数模转换的方法和装置。本发明的方法和装置提供了时基的Σ-Δ调制，使得由不均匀采样产生的误差是频率形状的区域（即，转移到较高频率），其中它们可以通过常规滤波技术在一个实施例中，数字数据以固定比例内插，然后在Σ-Δ调制频率选择信号的控制下抽取，该Σ-Δ调制频率选择信号平均表示输入数字数据流的数据速率。在另一个实施例中，数字数据在Σ-Δ调制频率选择信号的控制下进行内插，该Σ-Δ调制频率选择信号平均表示输入数字数据流的数据速率，然后以固定比率抽取。使用第n级m位Σ-Δ调制器来调制频率信号选择数。因此，数据因此在第n级m位Σ-Δ调制器的时钟速率下从内插/抽取处理中出现。该方法和装置将输入的数字数据流的数据速率转换为第n阶m位Σ-Δ调制器的数据速率。

80. 发明授权

US5619202A Variable sample rate ADC 失效
公开(公告)号：US5619202A
公开(公告)日：1997-04-08
申请号：US343713
申请日：1994-11-22
申请人： James Wilson , Ronald A. Cellini , James M. Sobol
发明人： James Wilson , Ronald A. Cellini , James M. Sobol
IPC分类号： H03M3/02 , H03M1/00
CPC分类号： H03M3/372 , H03M3/50
摘要： A method and apparatus for analog-to-digital conversion using sigma-delta modulation of the temporal spacing between digital samples are provided. The method and apparatus include sigma-delta modulation of the time-base such that errors produced by non-uniform sampling are frequency-shaped to a high frequency region where they are reduced by conventional digital filtering techniques. In one embodiment, a sigma-delta ADC receives an analog input signal and converts the analog input signal to digital samples at an oversampling rate. A decimator, coupled to the sigma-delta ADC, receives the digital samples and decimates the digital samples to produce the digital samples at a preselected output sample rate, less than the oversampling rate. An ADC sample rate control circuit, coupled to the ADC, receives a frequency select signal representing the preselected output sample rate, and produces a noise-shaped clock signal for controlling operation of the ADC at the oversampling rate. The control circuit includes a sigma-delta modulator for sigma-delta modulating the frequency select signal. A randomizer/suppressor circuit, under control of the output of the sigma-delta modulator, receives an input clock signal and adjusts the frequency of the clock signal to produce a noise-shaped clock signal for controlling the oversampling rate of the ADC.

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