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71. 发明授权

US5857364A Two-way lock mechanism with cam action 失效
标题翻译：带凸轮动作的双向锁定机构
公开(公告)号：US5857364A
公开(公告)日：1999-01-12
申请号：US863164
申请日：1997-05-27
申请人： Peter Hsu , TB Tsai , William Chang
发明人： Peter Hsu , TB Tsai , William Chang
IPC分类号： E05B63/14 , E05B65/00 , G06F1/18
CPC分类号： E05B65/0003 , E05B63/14 , G06F1/181 , Y10T70/527 , Y10T70/5279
摘要： A computer enclosure has a front bezel with two doors and a two-way lock mechanism controlling the locking of the doors. The swinging ends of the doors meet at a central portion of the bezel where the lock mechanism is located. The lock mechanism includes a guide plate located at the rear of the bezel having two guide channels that receive the bolts of the lock mechanism. A lock extends through the guide plate, and its rotatable barrel attaches to a cam plate at the rear of the bezel. The cam plate has two slots, each engaging one of the bolts. The bolts slide between withdrawn and extended positions in response to urging forces from the edges of the slots as the cam plate rotates in response to the turning of the lock, thus locking and unlocking the doors.
摘要翻译：计算机外壳具有带有两个门的前挡板和控制门锁定的双向锁定机构。门的摆动端在锁定机构所在的边框的中心部分相交。锁定机构包括位于挡板后部的引导板，其具有接收锁定机构的螺栓的两个引导通道。锁延伸穿过引导板，并且其可旋转的筒附接到挡板后部的凸轮板。凸轮板具有两个槽，每个接合一个螺栓。当凸轮板响应于锁的转动而旋转时，螺栓响应于槽的边缘的推动力而在退出和延伸位置之间滑动，从而锁定和解锁门。

72. 发明授权

US5844970A Multi-user personal message transmitting and receiving system 失效
公开(公告)号：US5844970A
公开(公告)日：1998-12-01
申请号：US965220
申请日：1997-11-06
申请人： Peter Hsu
发明人： Peter Hsu
IPC分类号： H04M1/652 , H04N1/00 , H04N1/32 , H04N1/44 , H04M11/00
CPC分类号： H04N1/32363 , H04M1/652 , H04N1/00127 , H04N1/32379 , H04N1/4413 , H04N1/444 , H04N1/32117 , H04N2201/3205 , H04N2201/3278 , H04N2201/3288 , H04N2201/3297
摘要： A multi-user personal message transmitting and receiving system utilizing a conventional facsimile machine, a conventional facsimile machine having line connections to the input/output port of a computer, a conventional paperless facsimile machine with memory for document storage, a MODEM equipped computer, or a conventional answering machine with mass memory for message storage. A dual tone multi-frequency decoder (DTMF receiver) is connected to the telephone network of the machine or computer utilized and a voice synthesizer is connected to the telephone network advising the caller on the telephone line concerning the personal information codes of the users of the system or advising the caller to enter the personal information code of the particular user prior to transmitting the message. A coding system is built into the central processing unit of the machine or computer utilized for setting and storing the individual user personal information codes and corresponding personal confidential codes and recognizing the incoming code preceding an incoming message. When the incoming code is recognized as one of the stored personal information codes, the coding system controls the automatic reception and storage of the incoming message in the respective code area of the memory which can be retrieved by the respective user by entering the respective personal confidential code.

73. 发明授权

US5604909A Apparatus for processing instructions in a computing system 失效
标题翻译：用于在计算系统中处理指令的装置
公开(公告)号：US5604909A
公开(公告)日：1997-02-18
申请号：US168744
申请日：1993-12-15
申请人： Chandra Joshi , Paul Rodman , Peter Hsu , Monica R. Nofal
发明人： Chandra Joshi , Paul Rodman , Peter Hsu , Monica R. Nofal
IPC分类号： G06F9/32 , G06F9/38 , G06F9/00
CPC分类号： G06F9/3885 , G06F9/322 , G06F9/3802 , G06F9/3806 , G06F9/3814 , G06F9/3844
摘要： A computing system has first and second instruction storing circuits, each instruction storing circuit storing N instructions for parallel output. An instruction dispatch circuit, coupled to the first instruction storing circuit dispatches L instructions stored in the first instruction storing circuit, wherein L is less than or equal to N. An instruction loading circuit, coupled to the instruction dispatch circuit and to the first and second instruction storing circuits, loads L instructions from the second instruction storing circuit into the first instruction storing circuit after the L instructions are dispatched from the first instruction storing circuit and before further instructions are dispatched from the first instruction storing circuit. A bypass circuit for bypassing the second instruction storing circuit is also provided.
摘要翻译：计算系统具有第一和第二指令存储电路，每个指令存储电路存储用于并行输出的N个指令。耦合到第一指令存储电路的指令调度电路调度存储在第一指令存储电路中的L指令，其中L小于或等于N.一个指令加载电路，耦合到指令调度电路和第一和第二指令指令存储电路，在从第一指令存储电路发出L指令之后并且从第一指令存储电路调度进一步的指令之前，将来自第二指令存储电路的L指令加载到第一指令存储电路中。还提供了用于绕过第二指令存储电路的旁路电路。

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