会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 71. 发明申请
    • SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD OF DESIGNING THE SAME
    • 半导体集成电路及其设计方法
    • US20080028343A1
    • 2008-01-31
    • US11779366
    • 2007-07-18
    • Hironori SatoTakeshi Kitahara
    • Hironori SatoTakeshi Kitahara
    • H03L7/00G06F17/50
    • G06F17/5072
    • A semiconductor integrated circuit comprising: a clock gating cell to which an enable signal and a clock signal are input, so as to output a gated clock signal generated by output-controlling said clock signal according to said enable signal; a first flip-flop circuit to which a first input data signal and said gated clock signal are input, so as to retain and output said first input data signal as a first output data signal in synchronization with said gated clock signal; and a second flip-flop circuit to which a second input data signal is input, so as to retain and output said second input data signal as a second output data signal in synchronization with said clock signal if the logical values of said second input data signal and said second output data signal differ from each other, or so as to retain said second output data signal if the logical values of said second input data signal and said second output data signal are the same.
    • 一种半导体集成电路,包括:时钟门控单元,其中输入有使能信号和时钟信号,以便根据所述使能信号输出通过输出控制所述时钟信号产生的选通时钟信号; 输入第一输入数据信号和所述选通时钟信号的第一触发器电路,以便与所述门控时钟信号同步地保持并输出所述第一输入数据信号作为第一输出数据信号; 以及第二触发器电路,输入第二输入数据信号,以便如果所述第二输入数据信号的逻辑值与所述时钟信号同步地保持并输出所述第二输入数据信号作为第二输出数据信号 并且所述第二输出数据信号彼此不同,或者如果所述第二输入数据信号和所述第二输出数据信号的逻辑值相同,则保持所述第二输出数据信号。