专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

71. 发明申请

US20070065999A1 Method for manufacturing semiconductor memory device using asymmetric junction ion implantation 失效
标题翻译：使用不对称结离子注入制造半导体存储器件的方法
公开(公告)号：US20070065999A1
公开(公告)日：2007-03-22
申请号：US11450816
申请日：2006-06-09
申请人： Min Lee , Kyoung Rouh , Seung Jin
发明人： Min Lee , Kyoung Rouh , Seung Jin
IPC分类号： H01L21/338 , H01L21/8234 , H01L21/336
CPC分类号： H01L27/10855 , H01L27/10876 , H01L27/10888 , H01L29/1037 , H01L29/66621 , H01L29/66659
摘要： A method for manufacturing a semiconductor memory device using asymmetric junction ion implantation, including performing ion implantation for adjusting a threshold voltage to a semiconductor substrate, forming a gate stack on the semiconductor substrate to define a storage node junction region and a bit line junction region, implanting a first conductive impurity ion and a second conductive impurity ion using a mask layer pattern covering the storage node junction region while exposing the bit line junction region, forming a gate spacer layer at both sides of the gate stack, and implanting the first conductive impurity ion using the gate stack and the gate spacer layer as an ion implantation mask layer to form a storage node junction region and a bit line junction region having different impurity concentrations, and different junction depths from each other.
摘要翻译：一种制造使用非对称结离子注入的半导体存储器件的方法，包括执行用于调整对半导体衬底的阈值电压的离子注入，在半导体衬底上形成栅叠层以限定存储节点结区域和位线结区域，使用覆盖存储节点结区域的掩模层图案注入第一导电杂质离子和第二导电杂质离子，同时暴露位线结区域，在栅极堆叠的两侧形成栅极间隔层，以及注入第一导电杂质使用栅极堆叠和栅极间隔层作为离子注入掩模层，以形成具有不同杂质浓度和不同结深度的存储节点结区域和位线结区域。

72. 发明申请

US20070004159A1 Method of manufacturing semiconductor device using gate-through ion implantation 有权
标题翻译：使用栅极通过离子注入制造半导体器件的方法
公开(公告)号：US20070004159A1
公开(公告)日：2007-01-04
申请号：US11272542
申请日：2005-11-10
申请人： Seung Jin , Min Lee , Kyoung Rouh
发明人： Seung Jin , Min Lee , Kyoung Rouh
IPC分类号： H01L21/336
CPC分类号： H01L21/2652 , H01L21/823807 , H01L21/823814 , H01L21/823892 , H01L29/105 , H01L29/6659
摘要： Disclosed herein is a method of manufacturing a semiconductor device via gate-through ion implantation, comprising forming a gate stack on a semiconductor substrate and performing ion implantation for control of the threshold voltage and junction ion implantation for formation of source/drain regions, on the entire surface of the semiconductor substrate having the gate stack formed thereon. In accordance with the present invention, since ion implantation is carried out after formation of the gate stack involving a thermal process, there are no changes in concentrations of implanted dopants due to heat treatment upon formation of the gate stack.
摘要翻译：本文公开了一种通过栅极通过离子注入制造半导体器件的方法，包括在半导体衬底上形成栅极堆叠并执行离子注入以控制用于形成源极/漏极区域的阈值电压和结离子注入半导体衬底的整个表面上形成有栅极叠层。根据本发明，由于在形成包括热处理的栅叠层之后进行离子注入，所以在形成栅叠层时，由于热处理，注入的掺杂剂的浓度没有变化。

73. 发明申请

US20060211226A1 Partial implantation method for semiconductor manufacturing 有权
标题翻译：半导体制造部分植入法
公开(公告)号：US20060211226A1
公开(公告)日：2006-09-21
申请号：US11197091
申请日：2005-08-04
申请人： Kyoung Rouh , Yong Sohn , Min Lee
发明人： Kyoung Rouh , Yong Sohn , Min Lee
IPC分类号： H01L21/00 , H01L21/425
CPC分类号： H01L21/265 , H01L21/26513
摘要： Disclosed herein is a partial implantation method for manufacturing semiconductor devices. The method involves implantation of dopant ions at different densities into a plurality of wafer regions, including first and second regions, defined in a wafer by means of a boundary line. In the method, first, second and third implantation zones are defined. The first implantation zone is the remaining part of the first region except for a specific part of the first region close to the boundary line, the second implantation zone is the remaining part of the second region except for a specific part of the second region close to the boundary line, and the third implantation zone is the remaining part of the wafer except for the first and second implantation zones. Then, dopant ions are implanted into the first implantation zone at a first density, into the second implantation zone at a second density different from the first density, and into the third implantation zone at a third density that is a midway value between the first and second densities.
摘要翻译：这里公开了用于制造半导体器件的部分注入方法。该方法包括将不同密度的掺杂剂离子注入到通过边界线限定在晶片中的多个晶片区域，包括第一和第二区域。在该方法中，限定了第一，第二和第三植入区。第一植入区域是第一区域的剩余部分，除了靠近边界线的第一区域的特定部分之外，第二植入区域是第二区域的剩余部分，除了靠近第二区域的第二区域的特定部分边界线和第三植入区域是除了第一和第二植入区域之外的晶片的剩余部分。然后，掺杂剂离子以第一密度注入第一注入区，以不同于第一密度的第二密度注入第二注入区，并以第三密度进入第三注入区，第三密度是第一和第第二密度。

74. 发明申请

US20060139358A1 3D graphic engine and method of providing graphics in mobile communication terminal 审中-公开
标题翻译： 3D图形引擎和在移动通信终端中提供图形的方法
公开(公告)号：US20060139358A1
公开(公告)日：2006-06-29
申请号：US11320868
申请日：2005-12-28
申请人： Hang Cho , Min Lee
发明人： Hang Cho , Min Lee
IPC分类号： G06T1/20
CPC分类号： A63F13/52 , A63F13/10 , A63F2300/66 , G06T15/60
摘要： A graphic engine is provided. The graphic engine includes an object analysis module, a mesh extraction module, a mesh control module, and an algorithm applying module. The object analysis module extracts an array for 3D data and the mesh extracting module has a plurality of meshes and selects a mesh according to the array. The mesh control module controls the size of the mesh according to a bounding box that constitutes an outer contour of the array, and the algorithm applying module applies a shadow algorithm to the size-controlled mesh.
摘要翻译：提供图形引擎。图形引擎包括对象分析模块，网格抽取模块，网格控制模块和算法应用模块。对象分析模块提取3D数据的阵列，网格提取模块具有多个网格，并根据阵列选择网格。网格控制模块根据构成阵列外部轮廓的边界框来控制网格的大小，算法应用模块将一个阴影算法应用于大小控制的网格。

75. 发明申请

US20060079517A1 Reverse-turn mimetics and methods relating thereto 审中-公开
公开(公告)号：US20060079517A1
公开(公告)日：2006-04-13
申请号：US11292611
申请日：2005-12-02
申请人： Jan Urban , Hiroshi Nakanishi , Min Lee
发明人： Jan Urban , Hiroshi Nakanishi , Min Lee
IPC分类号： A61K31/5415 , A61K31/498
CPC分类号： C07D487/04 , C07D487/14
摘要： Conformationally constrained compounds which mimic the secondary structure of reverse-turn regions of biologically active peptides and proteins having the following structure are disclosed: wherein A, B, X, R1, and R5 are as defined herein. Such compounds have utility over a wide range of fields, including use as diagnostic and therapeutic agents. In particular, compounds of this invention are useful in pharmaceutical compositions as anti-inflammatory agents as well as inhibitors of central nervous disorders. Libraries containing the compounds of this invention are also disclosed, as well as methods for screening the same to identify biologically active members.

76. 发明申请

US20050266240A1 High tensile nonmagnetic stainless steel wire for overhead electric conductor, low loss overhead electric conductor using the wire, and method of manufacturing the wire and overhead electric conductor 有权
标题翻译：用于架空电导体的高强度非磁性不锈钢丝，使用该导线的低损耗高架导体导体，以及制造导线和架空电导体的方法
公开(公告)号：US20050266240A1
公开(公告)日：2005-12-01
申请号：US10853080
申请日：2004-05-25
申请人： Byung Kim , Shang Kim , Byung Woo , Hee Lee , Ju Park , Yong Jeong , Min Lee , Sun Ahn
发明人： Byung Kim , Shang Kim , Byung Woo , Hee Lee , Ju Park , Yong Jeong , Min Lee , Sun Ahn
IPC分类号： H01B5/08 , H01B5/10
CPC分类号： H01B5/104 , Y10T428/2913 , Y10T428/2933 , Y10T428/294
摘要： Provided are the high tensile nonmagnetic stainless steel wire for an low loss overhead electric conductor, the low loss overhead electric conductor using the high tensile nonmagnetic stainless steel wire as its core, and a manufacturing method of them respectively. The high tensile nonmagnetic stainless steel wire reduces a core loss and eddy current loss and minimizes effective electric resistance of the conductor by using the nonmagnetic stainless steel wire, that is a non-magnetic material, rather than a high carbon steel wire, that is a strong magnetic material. In addition, an overall power transmission loss is minimized by strengthening the tensile strength of and reducing a sectional area of the steel wire, making an aluminium-welded layer thicker, and increasing the sectional area of an aluminium conductor.
摘要翻译：提供了一种用于低损耗架空导体的高拉伸非磁性不锈钢丝，以高强度非磁性不锈钢丝为核心的低损耗塔顶导体及其制造方法。高强度非磁性不锈钢丝通过使用作为非磁性材料的非磁性不锈钢丝而不是高碳钢丝来降低铁芯损耗和涡流损耗并最小化导体的有效电阻，即，强磁性材料。此外，通过增强钢丝的拉伸强度和减小钢丝的截面面积，使铝焊接层变厚，并增加铝导体的截面积，从而使整体动力传递损失最小化。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式