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    • 76. 发明申请
    • Metal gasket
    • 金属垫片
    • US20100025940A1
    • 2010-02-04
    • US12311713
    • 2007-12-27
    • Kenji UchidaToru TakasuKazuya Yoshijima
    • Kenji UchidaToru TakasuKazuya Yoshijima
    • F02F11/00
    • F16J15/0825F16J2015/085F16J2015/0862F16J2015/0868F16J2015/0875
    • The effective utilization of the elasticity of a full bead is prevented from being interfered by a thickness portion of the shim plate by providing a shim plate inside a full bead, thereby a lowering of the follow-up performance to head amplitude at the time of combustion is prevented, and the improvement of the sealability is achieved.A metal gasket 10 includes a pair of bead plates 14 and 14 having a cylinder hole 12 corresponding to a cylinder bore and a full bead 22 surrounding the cylinder hole, a first intermediate plate 18 interposed between the pair of bead plates, and a shim plate 16 interposed between the first intermediate plate and one bead plate in an area around the cylinder hole. The shim plate 16 is disposed to overlap with the full bead 22, and the thickness of a contact portion 19 to contact the shim plate 16 of the first intermediate plate changes in the peripheral direction of the cylinder hole.
    • 通过在整个焊道内部设置垫板,防止整个焊道的弹性的有效利用被垫片的厚度部分所干扰,从而降低燃烧时的磁头振幅的跟踪性能 并且可以实现密封性的提高。 金属垫圈10包括一对胎圈板14和14,其具有对应于缸孔的缸孔12和围绕缸孔的全胎22,夹在一对胎圈板之间的第一中间板18和垫板 16插入在第一中间板和一个胎圈板之间的区域中。 垫板16设置成与整个胎圈22重叠,并且接触第一中间板的垫板16的接触部分19的厚度在缸孔的周向方向上变化。
    • 80. 发明申请
    • Coding circuit and coding apparatus
    • 编码电路和编码装置
    • US20070075880A1
    • 2007-04-05
    • US11527546
    • 2006-09-27
    • Kenji Uchida
    • Kenji Uchida
    • H03M7/34
    • H04L27/2096H04L27/2075
    • Disclosed is a coding circuit including: a data delay unit to delay a second signal as a third signal, the second signal comprising one of two data produced by splitting a data for cording, a first signal comprising the other data; a first arithmetic unit to calculate a logic product of the first signal and a first clock signal as a fourth signal; a second arithmetic unit to calculate the logic product of the third signal and an inverted signal of the first clock signal as a fifth signal; a first holding signal inversion unit to invert an output signal as a sixth signal according to the fourth signal; a second holding signal inversion unit to invert an output signal as a seventh signal according to the fifth signal; and an exclusive OR operation unit to calculate an exclusive OR of the sixth signal and the seventh signal.
    • 公开了一种编码电路,包括:数据延迟单元,用于将第二信号延迟为第三信号,所述第二信号包括通过分割用于线路的数据产生的两个数据之一,包括其他数据的第一信号; 第一算术单元,用于计算第一信号和第一时钟信号的逻辑积作为第四信号; 第二运算单元,计算第三信号的逻辑积和第一时钟信号的反相信号作为第五信号; 第一保持信号反转单元,用于根据第四信号将作为第六信号的输出信号反相; 第二保持信号反转单元,用于根据第五信号将作为第七信号的输出信号反相; 以及用于计算第六信号和第七信号的异或的异或运算单元。