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71. 发明申请

US20110079854A1 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110079854A1
公开(公告)日：2011-04-07
申请号：US12572498
申请日：2009-10-02
申请人： Chun-Hsien Lin
发明人： Chun-Hsien Lin
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7843 , H01L21/28088 , H01L21/28114 , H01L21/823807 , H01L21/82385 , H01L21/823864 , H01L29/42376 , H01L29/4966 , H01L29/66545 , H01L29/7833
摘要： A semiconductor device and a method for fabricating the same are described. A polysilicon layer is formed on a substrate. The polysilicon layer is doped with an N-type dopant. A portion of the polysilicon layer is then removed to form a plurality of dummy patterns. Each dummy pattern has a top, a bottom, and a neck arranged between the top and the bottom, where the width of the neck is narrower than that of the top. A dielectric layer is formed on the substrate to cover the substrate disposed between adjacent dummy patterns, and the top of each dummy pattern is exposed. Thereafter, the dummy patterns are removed to form a plurality of trenches in the dielectric layer. A plurality of gate structures is formed in the trenches, respectively.
摘要翻译：对半导体装置及其制造方法进行说明。在基板上形成多晶硅层。多晶硅层掺杂有N型掺杂剂。然后去除多晶硅层的一部分以形成多个虚拟图案。每个虚拟图案具有布置在顶部和底部之间的顶部，底部和颈部，其中颈部的宽度比顶部的宽度窄。在基板上形成电介质层以覆盖设置在相邻的虚设图案之间的基板，并且暴露每个虚设图案的顶部。此后，去除虚拟图案以在电介质层中形成多个沟槽。在沟槽中分别形成多个栅极结构。

72. 发明申请

US20110070702A1 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20110070702A1
公开(公告)日：2011-03-24
申请号：US12563388
申请日：2009-09-21
申请人： Chin-Cheng Chien , Chun-Hsien Lin , Chiu-Hsien Yeh
发明人： Chin-Cheng Chien , Chun-Hsien Lin , Chiu-Hsien Yeh
IPC分类号： H01L21/8238 , H01L21/28
CPC分类号： H01L29/66636 , H01L21/28088 , H01L21/28194 , H01L21/823807 , H01L21/823842 , H01L21/823857 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/6659 , H01L29/7833 , H01L29/7843 , H01L29/7848
摘要： A method for fabricating a semiconductor device is provided. A high dielectric constant (high-k) layer and a work function metal layer are formed in sequence on a substrate. A hard mask layer is formed on the work function metal layer, where the material of the hard mask layer is lanthanum oxide. The work function metal layer is patterned by using the hard mask layer as a mask. The hard mask layer is then removed. Afterwards, a gate structure is formed on the substrate.
摘要翻译：提供一种制造半导体器件的方法。在基板上依次形成高介电常数（高k）层和功函数金属层。在功函数金属层上形成硬掩模层，其中硬掩模层的材料是氧化镧。通过使用硬掩模层作为掩模来对功函数金属层进行图案化。然后去除硬掩模层。之后，在基板上形成栅极结构。

73. 发明申请

US20090135195A1 Liquid Crystal Display and Method for Adjusting Backlight Brightness Thereof 审中-公开
标题翻译：液晶显示器和调整背光亮度的方法
公开(公告)号：US20090135195A1
公开(公告)日：2009-05-28
申请号：US12180236
申请日：2008-07-25
申请人： Chin-Lung CHEN , Chun-Hsien Lin , Po-Chin Huang
发明人： Chin-Lung CHEN , Chun-Hsien Lin , Po-Chin Huang
IPC分类号： G09G3/36
CPC分类号： G09G3/3426 , G09G2320/0238 , G09G2320/0646
摘要： A liquid crystal display includes a scaler module, a field-programmable gate array (FPGA) module, a buffer, a backlight module and a LCD module. The FPGA module includes a regional peak detector, a backlight control unit and a pixel value control unit. The regional peak detector is configured for detecting a maximum pixel value of each image region of each image. The backlight control unit is configured for selectively adjusting the backlight brightness of one or more image regions of each image. The pixel value control unit is configured for adjusting pixel values of the one or more image regions of each image by shifting binary pixel values to compensate for the influence of backlight adjustment. A method for adjusting backlight brightness of a liquid crystal display is also provided.
摘要翻译：液晶显示器包括缩放器模块，现场可编程门阵列（FPGA）模块，缓冲器，背光模块和LCD模块。 FPGA模块包括区域峰值检测器，背光控制单元和像素值控制单元。区域峰值检测器被配置用于检测每个图像的每个图像区域的最大像素值。背光控制单元被配置为选择性地调整每个图像的一个或多个图像区域的背光亮度。像素值控制单元被配置为通过移位二进制像素值来调整每个图像的一个或多个图像区域的像素值，以补偿背光调整的影响。还提供了一种用于调节液晶显示器的背光亮度的方法。

74. 发明授权

US07534725B2 Advanced process control for semiconductor processing 有权
标题翻译：先进的半导体处理过程控制
公开(公告)号：US07534725B2
公开(公告)日：2009-05-19
申请号：US11689050
申请日：2007-03-21
申请人： Hsueh Chi Shen , Chun-Hsien Lin
发明人： Hsueh Chi Shen , Chun-Hsien Lin
IPC分类号： H01L21/302
CPC分类号： G05B15/02 , G05B2219/37576
摘要： An advanced process control (APC) method for semiconductor fabrication is provided. A first substrate and a second substrate are provided. The first substrate and the second substrate include a dielectric layer. A first etch process parameter for the first substrate is determined. A trench is etched in the dielectric layer of the first substrate using the first etch process parameter. At least one aspect of the etched trench of the first substrate is measured. A second etch process parameter for the second substrate is determined using the measured aspect of the etched trench of the first substrate. A planarization process parameter for the first substrate is determined also using the measured aspect of the etched trench of the first substrate.
摘要翻译：提供了一种用于半导体制造的先进工艺控制（APC）方法。提供第一基板和第二基板。第一基板和第二基板包括电介质层。确定第一衬底的第一蚀刻工艺参数。使用第一蚀刻工艺参数在第一衬底的介电层中蚀刻沟槽。测量第一衬底的蚀刻沟槽的至少一个方面。使用第一衬底的蚀刻沟槽的测量方面来确定用于第二衬底的第二蚀刻工艺参数。还使用第一衬底的蚀刻沟槽的测量方面来确定第一衬底的平坦化处理参数。

75. 发明申请

US20090000769A1 Temperature Controlled Loadlock Chamber 有权
标题翻译：温控负荷箱
公开(公告)号：US20090000769A1
公开(公告)日：2009-01-01
申请号：US11769589
申请日：2007-06-27
申请人： Chun-Hsien Lin , Jyh-Cherng Sheu , Ming-Feng Yoo , Kewei Zuo
发明人： Chun-Hsien Lin , Jyh-Cherng Sheu , Ming-Feng Yoo , Kewei Zuo
IPC分类号： F28F7/00
CPC分类号： H01L21/67201 , H01L21/67248
摘要： A temperature controlled loadlock chamber for use in semiconductor processing is provided. The temperature controlled loadlock chamber may include one or more of an adjustable fluid pump, mass flow controller, one or more temperature sensors, and a controller. The adjustable fluid pump provides fluid having a predetermined temperature to a temperature-controlled plate. The mass flow controller provides gas flow into the chamber that may also aid in maintaining a desired temperature. Additionally, one or more temperature sensors may be combined with the adjustable fluid pump and/or the mass flow controller to provide feedback and to provide a greater control over the temperature. A controller may be added to control the adjustable fluid pump and the mass flow controller based upon temperature readings from the one or more temperature sensors.
摘要翻译：提供了一种用于半导体处理的温度控制负载锁定室。温度控制的负载锁定室可以包括可调节流体泵，质量流量控制器，一个或多个温度传感器和控制器中的一个或多个。可调节流体泵向温度控制板提供具有预定温度的流体。质量流量控制器提供气体进入腔室，这也有助于维持所需的温度。此外，一个或多个温度传感器可以与可调节流体泵和/或质量流量控制器组合以提供反馈并且提供对温度的更大控制。可以基于来自一个或多个温度传感器的温度读数来添加控制器来控制可调节流体泵和质量流量控制器。

76. 发明申请

US20080316823A1 STORAGE DEVICE AND CIRCUIT ELEMENT SWITCHING METHOD THEREOF 审中-公开
标题翻译：存储器件和电路元件切换方法
公开(公告)号：US20080316823A1
公开(公告)日：2008-12-25
申请号：US11781957
申请日：2007-07-24
申请人： Tzu-Shen Chen , Chun-Hsien Lin , Ming-Hsien Huang
发明人： Tzu-Shen Chen , Chun-Hsien Lin , Ming-Hsien Huang
IPC分类号： G11C11/34
CPC分类号： G11C8/12 , G11C8/18
摘要： The present invention discloses a storage device and a circuit element switching method thereof. The storage device includes: a plurality of memory modules, wherein each of the plurality of memory modules includes a plurality of chip enable terminals; a memory control unit that includes a plurality of bank selection terminals; and a switch module that is coupled between the plurality of memory modules and the memory control unit, and utilized for dispersedly coupling the plurality of bank selection terminals to the plurality of chip enable terminals of each of the plurality of memory modules. The circuit element switching method applied to the storage device includes: providing a memory control unit including a plurality of bank selection terminals; and dispersedly coupling the plurality of bank selection terminals to a plurality of chip enable terminals of each of the plurality of memory modules.
摘要翻译：本发明公开了一种存储装置及其电路元件切换方法。存储装置包括：多个存储器模块，其中多个存储器模块中的每一个包括多个芯片使能端子; 存储器控制单元，其包括多个存储体选择终端; 以及耦合在所述多个存储器模块和所述存储器控制单元之间的开关模块，并且用于将所述多个存储体选择端子分散地耦合到所述多个存储器模块中的每一个的所述多个芯片使能端子。应用于存储装置的电路元件切换方法包括：提供包括多个存储体选择端的存储器控制单元; 并且将多个存储体选择端分散地耦合到多个存储模块中的每一个的多个芯片使能端子。

77. 发明申请

US20080305563A1 Method and system for controlling copper chemical mechanical polish uniformity 有权
标题翻译：控制铜化学机械抛光均匀性的方法和系统
公开(公告)号：US20080305563A1
公开(公告)日：2008-12-11
申请号：US11810720
申请日：2007-06-07
申请人： Francis Ko , Chun-Hsien Lin , Jean Wang , Chih-Wei Lai , Ping-Hsu Chen , Henry Lo
发明人： Francis Ko , Chun-Hsien Lin , Jean Wang , Chih-Wei Lai , Ping-Hsu Chen , Henry Lo
IPC分类号： H01L21/306
CPC分类号： H01L22/20 , H01L21/3212 , H01L22/12 , H01L2924/0002 , H01L2924/00
摘要： A system and method for controlling resistivity uniformity in a Copper trench structure by controlling the CMP process is provided. A preferred embodiment comprises a system and a method in which a plurality of CMP process recipes may be created comprising at least a slurry arm position. A set of metrological data for at least one layer of the semiconductor substrate may be estimated, and an optimum CMP process recipe may be selected based on the set of metrological data. The optimum CMP process recipe may be implemented on the semiconductor substrate.
摘要翻译：提供了一种通过控制CMP工艺来控制铜沟槽结构中的电阻率均匀性的系统和方法。优选实施例包括系统和方法，其中可以创建包括至少浆料臂位置的多个CMP工艺配方。可以估计用于至少一层半导体衬底的一组计量数据，并且可以基于该组计量数据来选择最佳CMP工艺配方。可以在半导体衬底上实现最佳CMP工艺配方。

78. 发明申请

US20080275676A1 METHODOLOGY TO ENABLE WAFER RESULT PREDICTION OF BATCH TOOLS 有权
标题翻译：使用批量工具的波形结果预测方法
公开(公告)号：US20080275676A1
公开(公告)日：2008-11-06
申请号：US11941518
申请日：2007-11-16
申请人： Chun-Hsien Lin , Amy Wang , Francis Ko , Jean Wang
发明人： Chun-Hsien Lin , Amy Wang , Francis Ko , Jean Wang
IPC分类号： G06N7/00
CPC分类号： G05B19/41875 , G05B2219/32187 , G05B2219/32188 , G05B2219/32194 , Y02P90/22 , Y10S430/146
摘要： A method to enable wafer result prediction from a batch processing tool, includes collecting manufacturing data from a batch of wafers processed in batch in the batch processing tool, to form a batch processing result; defining a degree of freedom of the batch processing result based on the manufacturing data; and performing an optimal curve fitting by trial and error for an optimal function model of the batch processing result based on the batch processing result.
摘要翻译：一种能够从批量处理工具中进行晶片结果预测的方法包括从批量处理工具中批量处理的一批晶片收集制造数据，以形成批处理结果; 基于制造数据定义批量处理结果的自由度; 并根据批次处理结果对批处理结果的最优函数模型进行试验和误差拟合。

79. 发明申请

US20050282396A1 Micro-etching method to replicate alignment marks for semiconductor wafer photolithography 有权
标题翻译：用于复制半导体晶片光刻的对准标记的微蚀刻方法
公开(公告)号：US20050282396A1
公开(公告)日：2005-12-22
申请号：US10872238
申请日：2004-06-18
申请人： Yu-Liang Lin , Henry Lo , Chung-Long Chang , Gorge Huang , Tony Lu , Gnesh Yeh , Candy Liang , Chun-Hsien Lin , Mei Sheng Zhou , Sunny Wu , Ai-Sen Liu , Cheng-Lin Huang , Li-Jui Chen , Shih Wang
发明人： Yu-Liang Lin , Henry Lo , Chung-Long Chang , Gorge Huang , Tony Lu , Gnesh Yeh , Candy Liang , Chun-Hsien Lin , Mei Sheng Zhou , Sunny Wu , Ai-Sen Liu , Cheng-Lin Huang , Li-Jui Chen , Shih Wang
IPC分类号： H01L21/00 , H01L21/302 , H01L21/311 , H01L21/336 , H01L21/461 , H01L23/544
CPC分类号： H01L23/544 , H01L21/31111 , H01L21/67282 , H01L2223/5442 , H01L2223/54426 , H01L2223/54453 , H01L2223/5446 , H01L2924/0002 , H01L2924/00
摘要： A method and apparatus for locally etching a substrate area the method including providing a substrate comprising a process surface; depositing a material layer over the process surface; and, applying a wet etchant to cover a targeted etching portion of the process surface while excluding an adjacent surrounding area to selectively etch the material layer overlying the targeted etching portion.
摘要翻译：一种用于局部蚀刻衬底区域的方法和装置，该方法包括提供包含工艺表面的衬底; 在工艺表面上沉积材料层; 以及施加湿蚀刻剂以覆盖所述工艺表面的目标蚀刻部分，同时排除相邻的周围区域以选择性地蚀刻覆盖所述目标蚀刻部分的所述材料层。

80. 发明申请

US20050189001A1 Method for cleaning substrates using supercritical fluids 审中-公开
标题翻译：使用超临界流体清洗基材的方法
公开(公告)号：US20050189001A1
公开(公告)日：2005-09-01
申请号：US10791247
申请日：2004-03-01
申请人： Chun-Hsien Lin
发明人： Chun-Hsien Lin
IPC分类号： B08B7/00 , C11D11/00 , C23G5/00 , H01L21/02 , H01L21/306 , C23G1/00
CPC分类号： H01L21/02065 , B08B7/0021 , C11D11/0047 , C23G5/00 , H01L21/02052 , H01L21/02074 , H01L21/02101
摘要： A method for cleaning substrates typically after a CMP process is carried out thereon. The method includes providing a cleaning chamber, providing a substrate to be cleaned in the cleaning chamber, providing the chamber at temperature and pressure conditions favorable for formation of a supercritical cleaning fluid therein, and introducing the liquid or gaseous fluid into the chamber to form the supercritical cleaning fluid therein. The supercritical fluid removes particles and residues from the substrate without causing the formation of voltage potentials which may otherwise cause galvanic corrosion of metal lines or other device features on the substrates in the case of wet-cleaning applications.
摘要翻译：通常在CMP工艺之后进行清洁基板的方法。该方法包括提供清洁室，在清洁室中提供要清洁的基底，在有利于在其中形成超临界清洁流体的温度和压力条件下提供腔室，并将液体或气体流体引入腔室以形成超临界清洗液。超临界流体从衬底中除去颗粒和残留物，而不会形成电压电位，否则在湿法清洁应用的情况下可能会导致金属线或基板上的其它器件特征的电偶腐蚀。

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