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71. 发明申请

US20120168931A1 CARBON NANOTUBE STRUCTURES FOR ENHANCEMENT OF THERMAL DISSIPATION FROM SEMICONDUCTOR MODULES 有权
标题翻译：用于增强半导体模块散热的碳纳米管结构
公开(公告)号：US20120168931A1
公开(公告)日：2012-07-05
申请号：US13418454
申请日：2012-03-13
申请人： Veeraraghavan S. Basker , Toshiharu Furukawa , Mark C. Hakey , Steven J. Holmes , Charles W. Koburger, III , Krishna V. Singh
发明人： Veeraraghavan S. Basker , Toshiharu Furukawa , Mark C. Hakey , Steven J. Holmes , Charles W. Koburger, III , Krishna V. Singh
IPC分类号： H01L23/36 , H01L21/50 , B82Y99/00 , B82Y40/00
CPC分类号： H01L23/373 , B82Y10/00 , B82Y40/00 , H01L21/6835 , H01L23/3157 , H01L23/433 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/27 , H01L24/81 , H01L24/94 , H01L29/0657 , H01L2221/6835 , H01L2221/68377 , H01L2224/0401 , H01L2224/05026 , H01L2224/05186 , H01L2224/05561 , H01L2224/05564 , H01L2224/05571 , H01L2224/05655 , H01L2224/05657 , H01L2224/0566 , H01L2224/10135 , H01L2224/113 , H01L2224/11845 , H01L2224/13021 , H01L2224/13076 , H01L2224/131 , H01L2224/13147 , H01L2224/13184 , H01L2224/13187 , H01L2224/13193 , H01L2224/16221 , H01L2224/1703 , H01L2224/17515 , H01L2224/274 , H01L2224/73253 , H01L2224/81139 , H01L2224/81191 , H01L2224/81193 , H01L2224/81493 , H01L2924/00014 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01022 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01073 , H01L2924/01074 , H01L2924/04941 , H01L2924/14 , H01L2924/04953 , H01L2224/05552
摘要： Disclosed are embodiments of an improved semiconductor wafer structure having protected clusters of carbon nanotubes (CNTs) on the back surface and a method of forming the improved semiconductor wafer structure. Also disclosed are embodiments of a semiconductor module with exposed CNTs on the back surface for providing enhanced thermal dissipation in conjunction with a heat sink and a method of forming the semiconductor module using the disclosed semiconductor wafer structure.
摘要翻译：公开了在后表面上具有碳纳米管（CNT）的保护簇的改进的半导体晶片结构的实施方案和形成改进的半导体晶片结构的方法。还公开了在后表面上具有暴露的CNT的半导体模块的实施例，用于与散热器一起提供增强的散热以及使用所公开的半导体晶片结构形成半导体模块的方法。

72. 发明授权

US08124525B1 Method of forming self-aligned local interconnect and structure formed thereby 失效
标题翻译：形成自对准局部互连和由此形成的结构的方法
公开(公告)号：US08124525B1
公开(公告)日：2012-02-28
申请号：US12913143
申请日：2010-10-27
申请人： Charles W. Koburger, III , David V. Horak , Shom Pomoth , Chih-Chao Yang , Su Chen Fan , Sivananda K. Kanakasabapathy
发明人： Charles W. Koburger, III , David V. Horak , Shom Pomoth , Chih-Chao Yang , Su Chen Fan , Sivananda K. Kanakasabapathy
IPC分类号： H01L21/4763
CPC分类号： H01L21/76885 , H01L21/7682 , H01L21/76895 , H01L21/76897 , H01L23/528 , H01L2924/0002 , H01L2924/00
摘要： Embodiments of the present invention provide a method of forming local interconnect for semiconductor devices. The method includes depositing a blanket layer of conductive material over one or more semiconductor devices; creating a pattern of local interconnect covering a portion of the blanket layer of conductive material; removing rest of the blanket layer of conductive material that is not covered by the pattern of local interconnect; forming the local interconnect by the portion of the blanket layer of conductive material to connect the one or more semiconductor devices.
摘要翻译：本发明的实施例提供一种形成用于半导体器件的局部互连的方法。该方法包括在一个或多个半导体器件上沉积导电材料的覆盖层; 产生覆盖导电材料的覆盖层的一部分的局部互连图案; 去除未被局部互连图案覆盖的导电材料的覆盖层的其余部分; 通过导电材料的覆盖层的部分形成局部互连以连接一个或多个半导体器件。

73. 发明授权

US08030202B1 Temporary etchable liner for forming air gap 有权
标题翻译：用于形成气隙的临时可蚀刻衬垫
公开(公告)号：US08030202B1
公开(公告)日：2011-10-04
申请号：US12964831
申请日：2010-12-10
申请人： David V. Horak , Elbert E. Huang , Charles W. Koburger, III , Shom Ponoth
发明人： David V. Horak , Elbert E. Huang , Charles W. Koburger, III , Shom Ponoth
IPC分类号： H01L21/4763 , H01L21/44
CPC分类号： H01L21/7682 , H01L23/5222 , H01L2221/1063 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要： An exemplary method lines the sidewalls of a first opening with a sacrificial material and then fills the first opening with a metallic conductor in a manner such that the metallic conductor contacts the substrate. Next, the method selectively removes the sacrificial material, to create at least one “second” opening along the metallic conductor within the first opening. The method selectively removes portions of the first insulator layer through the second opening to leave at least one air gap between the metallic conductor and the first insulator layer in the lower region of the second opening.
摘要翻译：示例性方法用牺牲材料排列第一开口的侧壁，然后以金属导体接触基板的方式用金属导体填充第一开口。接下来，该方法选择性地去除牺牲材料，以在第一开口内沿着金属导体产生至少一个“第二”开口。所述方法通过所述第二开口选择性地去除所述第一绝缘体层的部分，以在所述第二开口的下部区域中留下所述金属导体和所述第一绝缘体层之间的至少一个气隙。

74. 发明授权

US07834384B2 Simultaneous conditioning of a plurality of memory cells through series resistors 有权
标题翻译：通过串联电阻同时调节多个存储单元
公开(公告)号：US07834384B2
公开(公告)日：2010-11-16
申请号：US12060922
申请日：2008-04-02
申请人： Toshijaru Furukawa , Mark C. Hakey , Steven J. Holmes , David V. Horak , Charles W. Koburger, III , Chung H. Lam , Gerhard I. Meijer
发明人： Toshijaru Furukawa , Mark C. Hakey , Steven J. Holmes , David V. Horak , Charles W. Koburger, III , Chung H. Lam , Gerhard I. Meijer
IPC分类号： H01L27/00
CPC分类号： H01L27/0629 , H01L27/101 , H01L27/24
摘要： Disclosed are a semiconductor structure and a method that allow for simultaneous voltage/current conditioning of multiple memory elements in a nonvolatile memory device with multiple memory cells. The structure and method incorporate the use of a resistor connected in series with the memory elements to limit current passing through the memory elements. Specifically, the method and structure incorporate a blanket temporary series resistor on the wafer surface above the memory cells and/or permanent series resistors within the memory cells. During the conditioning process, these resistors protect the transition metal oxide in the individual memory elements from damage (i.e., burn-out), once it has been conditioned.
摘要翻译：公开了一种半导体结构和方法，其允许在具有多个存储器单元的非易失性存储器件中同时对多个存储器元件进行电压/电流调节。该结构和方法结合使用与存储器元件串联连接的电阻器来限制电流通过存储器元件。具体地，该方法和结构在存储器单元上方的晶片表面上和/或存储器单元内的永久串联电阻器上并入一个橡皮布暂时串联电阻器。在调节过程中，一旦调节了这些电阻，这些电阻就可以保护各个存储元件中的过渡金属氧化物免受损坏（即烧坏）。

75. 发明授权

US07521735B2 Multiple layer and crystal plane orientation semiconductor substrate 有权
标题翻译：多层和晶面取向半导体衬底
公开(公告)号：US07521735B2
公开(公告)日：2009-04-21
申请号：US11969320
申请日：2008-01-04
申请人： Toshiharu Furukawa , David V. Horak , Charles W. Koburger, III , Leathen Shi
发明人： Toshiharu Furukawa , David V. Horak , Charles W. Koburger, III , Leathen Shi
IPC分类号： H01L27/118
CPC分类号： H01L29/045 , H01L21/76254 , H01L21/823807 , H01L27/1203
摘要： A semiconductor on insulator substrate and a method of fabricating the substrate. The substrate including: a first crystalline semiconductor layer and a second crystalline semiconductor layer; and an insulating layer bonding a bottom surface of the first crystalline semiconductor layer to a top surface of the second crystalline semiconductor layer, a first crystal direction of the first crystalline semiconductor layer aligned relative to a second crystal direction of the second crystalline semiconductor layer, the first crystal direction different from the second crystal direction.
摘要翻译：绝缘体上半导体衬底及其制造方法。所述基板包括：第一晶体半导体层和第二晶体半导体层; 以及将所述第一晶体半导体层的底面与所述第二结晶半导体层的顶面接合的绝缘层，所述第一结晶半导体层相对于所述第二结晶半导体层的第二晶体方向排列的第一晶体方向，第一晶体方向与第二晶体方向不同。

76. 发明申请

US20090014767A1 CARBON NANOTUBE CONDUCTOR FOR TRENCH CAPACITORS 有权
标题翻译：用于TRENCH电容器的碳纳米管导体
公开(公告)号：US20090014767A1
公开(公告)日：2009-01-15
申请号：US10596022
申请日：2003-12-18
申请人： Toshiharu Furukawa , Mark C. Hakey , Steven J. Holmes , David V. Horak , Charles W. Koburger, III , Larry A. Nesbit
发明人： Toshiharu Furukawa , Mark C. Hakey , Steven J. Holmes , David V. Horak , Charles W. Koburger, III , Larry A. Nesbit
IPC分类号： H01L27/108
CPC分类号： H01L27/10864 , B82Y10/00 , H01L27/10861 , Y10S977/936 , Y10S977/943 , Y10S977/948
摘要： A trench-type storage device includes a trench in a substrate (100), with bundles of carbon nanotubes (202) lining the trench and a trench conductor (300) filling the trench. A trench dielectric (200) may be formed between the carbon nanotubes and the sidewall of the trench. The bundles of carbon nanotubes form an open cylinder structure lining the trench. The device is formed by providing a carbon nanotube catalyst structure on the substrate and patterning the trench in the substrate; the carbon nanotubes are then grown down into the trench to line the trench with the carbon nanotube bundles, after which the trench is filled with the trench conductor.
摘要翻译：沟槽式存储装置包括在衬底（100）中的沟槽，具有衬在沟槽上的碳纳米管（202）的束和填充沟槽的沟槽导体（300）。可以在碳纳米管和沟槽的侧壁之间形成沟槽电介质（200）。碳纳米管束形成在沟槽内衬的开放圆筒结构。该器件通过在衬底上提供碳纳米管催化剂结构并对衬底中的沟槽进行图案化而形成; 然后将碳纳米管向下生长到沟槽中以与碳纳米管束对准沟槽，然后用沟槽导体填充沟槽。

77. 发明授权

US07378717B2 Semiconductor optical sensors 有权
标题翻译：半导体光学传感器
公开(公告)号：US07378717B2
公开(公告)日：2008-05-27
申请号：US11164217
申请日：2005-11-15
申请人： Toshiharu Furukawa , Steven J. Holmes , David V. Horak , Charles W. Koburger, III
发明人： Toshiharu Furukawa , Steven J. Holmes , David V. Horak , Charles W. Koburger, III
IPC分类号： H01L27/14 , H01L31/00
CPC分类号： H01L31/101 , H01L27/14647 , H01L31/1804 , Y02E10/547 , Y02P70/521
摘要： An optical sensor and method for forming the same. The optical sensor structure includes (a) a semiconductor substrate, (b) first, second, third, fourth, fifth, and sixth electrodes and (c) first, second, and third semiconducting regions. The first and fourth electrodes are at a first depth. The second and fifth electrodes are at a second depth. The third and sixth electrodes are at a third depth. The first depth is greater than the second depth, and the second depth is greater than the third depth. The first, second, and third semiconducting regions are disposed between and in contact with the first and fourth electrodes, second and fifth electrodes, and third and sixth electrodes, respectively. The first, second, and third semiconducting regions are in contact with each other.
摘要翻译：一种光学传感器及其形成方法。光学传感器结构包括（a）半导体衬底，（b）第一，第二，第三，第四，第五和第六电极以及（c）第一，第二和第三半导电区域。第一和第四电极处于第一深度。第二和第五电极处于第二深度。第三和第六电极处于第三深度。第一深度大于第二深度，第二深度大于第三深度。第一，第二和第三半导体区域分别设置在第一和第四电极，第二和第五电极以及第三和第六电极之间并与之接触。第一，第二和第三半导体区域彼此接触。

78. 发明授权

US07271079B2 Method of doping a gate electrode of a field effect transistor 失效
标题翻译：掺杂场效应晶体管的栅电极的方法
公开(公告)号：US07271079B2
公开(公告)日：2007-09-18
申请号：US10907569
申请日：2005-04-06
申请人： Toshiharu Furukawa , Mark C. Hakey , Steven J. Holmes , David V. Horak , Charles W. Koburger, III
发明人： Toshiharu Furukawa , Mark C. Hakey , Steven J. Holmes , David V. Horak , Charles W. Koburger, III
IPC分类号： H01L21/425
CPC分类号： H01L29/4983 , H01L29/4908 , H01L29/6656 , H01L29/6659 , H01L29/66772 , H01L29/7833 , H01L29/78621 , Y10S977/742 , Y10S977/847
摘要： A method of fabricating a structure and fabricating related semiconductor transistors and novel semiconductor transistor structures. The method of fabricating the structure includes: providing a substrate having a top surface; forming an island on the top surface of the substrate, a top surface of the island parallel to the top surface of the substrate, a sidewall of the island extending between the top surface of the island and the top surface of the substrate; forming a plurality of carbon nanotubes on the sidewall of the island; and performing an ion implantation, the ion implantation penetrating into the island and blocked from penetrating into the substrate in regions of the substrate masked by the island and the carbon nanotubes.
摘要翻译：一种制造结构并制造相关半导体晶体管和新型半导体晶体管结构的方法。制造该结构的方法包括：提供具有顶表面的基底; 在所述基板的顶表面上形成岛，所述岛的顶表面平行于所述基底的顶表面，所述岛的侧壁在所述岛的顶表面和所述基底的顶表面之间延伸; 在岛的侧壁上形成多个碳纳米管; 并且进行离子注入，所述离子注入在所述岛状体和所述碳纳米管所掩盖的基板的区域中贯穿所述岛并阻止其侵入到所述基板内。

79. 发明授权

US07256415B2 Memory device and method of manufacturing the device by simultaneously conditioning transition metal oxide layers in a plurality of memory cells 有权
标题翻译：存储器件以及通过同时调节多个存储单元中的过渡金属氧化物层来制造器件的方法
公开(公告)号：US07256415B2
公开(公告)日：2007-08-14
申请号：US11140780
申请日：2005-05-31
申请人： Toshijaru Furukawa , Mark C. Hakey , Steven J. Holmes , David V. Horak , Charles W. Koburger, III , Chung H. Lam , Gerhard I. Meijer
发明人： Toshijaru Furukawa , Mark C. Hakey , Steven J. Holmes , David V. Horak , Charles W. Koburger, III , Chung H. Lam , Gerhard I. Meijer
IPC分类号： H01L47/00
CPC分类号： H01L27/101 , H01L27/115 , H01L27/2409 , H01L27/2463 , H01L45/04 , H01L45/1233 , H01L45/147 , Y10S438/90
摘要： Disclosed are non-volatile memory devices that incorporate a series of single or double memory cells. The single memory cells are essentially “U” shaped. The double memory cells comprise two essentially “U” shaped memory cells. Each memory cell comprises a memory element having a bi-stable layer sandwiched between two conductive layers. A temporary conductor may be applied to a series of cells and used to bulk condition the bi-stable layers of the cells. Also, due to the “U” shape of the cells, a cross point wire array may be used to connect a series of cells. The cross point wire array allows the memory elements of each cell to be individually identified and addressed for storing information and also allows for the information stored in the memory elements in all of the cells in the series to be simultaneously erased using a block erase process.
摘要翻译：公开了包含一系列单个或双重存储器单元的非易失性存储器件。单个存储器单元基本上是“U”形的。双重存储单元包括两个基本上“U”形的存储单元。每个存储单元包括具有夹在两个导电层之间的双稳态层的存储元件。临时导体可以应用于一系列的电池并且用于批量地调节电池的双稳态层。此外，由于电池的“U”形状，可以使用交叉点线阵列来连接一系列电池。交叉点线阵列允许每个单元的存储元件被单独识别和寻址用于存储信息，并且还允许使用块擦除处理同时擦除存储在串联中的所有单元中的存储器元件中的信息。

80. 发明授权

US07026259B2 Liquid-filled balloons for immersion lithography 有权
标题翻译：用于浸没式光刻的充满液体的气球
公开(公告)号：US07026259B2
公开(公告)日：2006-04-11
申请号：US10707894
申请日：2004-01-21
申请人： Mark C. Hakey , David V. Horak , Charles W. Koburger, III , Peter H. Mitchell
发明人： Mark C. Hakey , David V. Horak , Charles W. Koburger, III , Peter H. Mitchell
IPC分类号： H01L21/26 , G06F17/50 , G03B27/42
CPC分类号： G03F7/70341 , Y10S438/947
摘要： A liquid-filled balloon may be positioned between a workpiece, such as a semiconductor structure covered with a photoresist, and a lithography light source. The balloon includes a thin membrane that exhibits good optical and physical properties. Liquid contained in the balloon also exhibits good optical properties, including a refractive index higher than that of air. Light from the lithography light source passes through a mask, through a top layer of the balloon membrane, through the contained liquid, through a bottom layer of the balloon membrane, and onto the workpiece where it alters portions of the photoresist. As the liquid has a low absorption and a higher refractive index than air, the liquid-filled balloon system enhances resolution. Thus, the balloon provides optical benefits of liquid immersion without the complications of maintaining a liquid between (and in contact with) a lithographic light source mechanism and workpiece.
摘要翻译：液体填充的球囊可以位于诸如被光致抗蚀剂覆盖的半导体结构的工件和光刻光源之间。气球包括显示出良好的光学和物理性质的薄膜。包含在气囊中的液体也表现出良好的光学性能，包括折射率高于空气的折射率。来自光刻光源的光通过球囊膜的顶层通过所包含的液体通过球囊膜的底层，并穿过其上改变部分光致抗蚀剂的工件。由于液体具有比空气低的吸收和较高的折射率，所以充满液体的球囊系统提高了分辨率。因此，气囊提供液体浸没的光学优点，而没有在平版印刷光源机构和工件之间（并与之接触）之间保持液体的并发症。

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