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    • 77. 发明授权
    • Semiconductor memory device having a single input terminal to select a buffer and method of testing the same
    • 具有用于选择缓冲器的单个输入端子的半导体存储器件及其测试方法
    • US07779315B2
    • 2010-08-17
    • US11624651
    • 2007-01-18
    • Seung-Hoon LeeDong-Hak Shin
    • Seung-Hoon LeeDong-Hak Shin
    • G11C29/00G11C7/00
    • G11C29/1201G11C8/16G11C29/48
    • A semiconductor memory device has a single input terminal to select a buffer and includes input-output terminals, input-output buffers, a memory core, and a buffer selecting unit. The input-output terminals include address input terminals, data input-output terminals and an input terminal to select a buffer. The input-output buffers are coupled to the data input-output terminals respectively. The memory core is coupled to the input-output buffers through input-output lines. The buffer selecting unit generates a parallel buffer select signal based on an expected signal having a pulse stream, wherein the expected signal is provided via the input terminal to select a buffer in a test mode, and applies the parallel buffer select signal to the plurality of input-output buffers to select a corresponding input-output buffer. Hence, the semiconductor memory device may increase efficiency of a pin in a test device.
    • 半导体存储器件具有用于选择缓冲器的单个输入端子,并且包括输入 - 输出端子,输入 - 输出缓冲器,存储器核心和缓冲器选择单元。 输入输出端子包括地址输入端子,数据输入输出端子和用于选择缓冲器的输入端子。 输入输出缓冲器分别耦合到数据输入 - 输出端。 存储器内核通过输入 - 输出线耦合到输入 - 输出缓冲器。 缓冲器选择单元基于具有脉冲流的预期信号产生并行缓冲器选择信号,其中经由输入端子提供期望信号以在测试模式中选择缓冲器,并将并行缓冲器选择信号施加到多个 输入 - 输出缓冲区来选择相应的输入 - 输出缓冲区。 因此,半导体存储器件可以提高测试装置中的引脚的效率。
    • 78. 发明授权
    • Voltage boosting circuit and method of generating boosting voltage, capable of alleviating effects of high voltage stress
    • 升压电路及产生升压电压的方法,能够缓解高压应力的影响
    • US07102423B2
    • 2006-09-05
    • US10732826
    • 2003-12-09
    • Seung-Hoon LeeJae-Yoon Sim
    • Seung-Hoon LeeJae-Yoon Sim
    • G05F1/10
    • H02M3/07
    • A voltage boosting circuit and a method of generating a boosting voltage alleviate deterioration of a driver transistor caused by high voltage stress when the level of an external supply voltage is high. The voltage boosting circuit includes boosting capacitors and switches. The boosting capacitors include a first boosting capacitor connected to a driving node and a last boosting capacitor that outputs the boosting voltage. The switches connect the boosting capacitors in series in response to a control signal. The boosting voltage increases or decreases as the voltage level at the driving node changes according to the logic state of a boosting level control signal. The boosting level control signal is responsive to the external supply voltage level. An external supply voltage detector detects the level of external supply voltage level and generates the boosting level control signal.
    • 当外部电源电压高时,升压电路和产生升压电压的方法缓解由高电压应力引起的驱动晶体管的劣化。 升压电路包括升压电容器和开关。 升压电容器包括连接到驱动节点的第一升压电容器和输出升压电压的最后一个升压电容器。 开关响应于控制信号串联升压电容器。 随着驱动节点的电压电平根据升压电平控制信号的逻辑状态而改变,升压电压增加或减小。 升压电平控制信号响应于外部电源电压电平。 外部电源电压检测器检测外部电源电平的电平,并产生升压电平控制信号。
    • 79. 发明申请
    • Circuits that generate an internal supply voltage and semiconductor memory devices that include those circuits
    • 产生内部电源电压的电路和包括那些电路的半导体存储器件
    • US20060181937A1
    • 2006-08-17
    • US11172256
    • 2005-06-30
    • Sung-Ho ChoiJun-Ho ShinSeung-Hoon Lee
    • Sung-Ho ChoiJun-Ho ShinSeung-Hoon Lee
    • G11C7/00
    • G11C7/12G11C5/147
    • An internal supply voltage generation circuit is provided that is within a semiconductor memory device, and that is configured to generate an internal supply voltage to a memory array in the semiconductor memory device. The internal supply voltage generation circuit includes an internal driving unit, an internal transmission unit, and an internal sensing unit. The internal driving unit is configured to generate a driving current and a preliminary voltage responsive to an external supply voltage that is supplied from external to the semiconductor memory device, and it varies a magnitude of the driving current responsive to a driving control signal. The internal transmission unit is configured to generate the internal supply voltage responsive to the preliminary voltage from the internal driving unit, and to vary a level of the internal supply voltage to be at least a defined voltage difference less than a boosted voltage. The boosted voltage is greater than the external supply voltage. The internal sensing unit is configured to generate the driving control signal responsive to the internal supply voltage so that the internal supply voltage is maintained at a constant level.
    • 提供内部电源电压生成电路,其在半导体存储器件内,并且被配置为向半导体存储器件中的存储器阵列产生内部电源电压。 内部电源电压产生电路包括内部驱动单元,内部传输单元和内部感测单元。 内部驱动单元被配置为响应于从外部向半导体存储器件提供的外部电源电压产生驱动电流和初始电压,并且响应于驱动控制信号而改变驱动电流的大小。 内部传输单元被配置为响应于来自内部驱动单元的初步电压而产生内部电源电压,并且将内部电源电压的电平改变为至少一个小于升压电压的限定电压差。 升压电压大于外部电源电压。 内部感测单元被配置为响应于内部电源电压产生驱动控制信号,使得内部电源电压保持在恒定水平。