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71. 发明授权

US08534563B2 Interface IC and memory card including the same 有权
标题翻译：接口IC和存储卡包括相同
公开(公告)号：US08534563B2
公开(公告)日：2013-09-17
申请号：US12923928
申请日：2010-10-14
申请人： Yasutaka Nakashiba , Hiroaki Ohkubo , Mitsuji Okada , Shigeharu Nakata , Shuuichi Kagawa
发明人： Yasutaka Nakashiba , Hiroaki Ohkubo , Mitsuji Okada , Shigeharu Nakata , Shuuichi Kagawa
IPC分类号： G06K19/06
CPC分类号： G06K19/073 , G11C7/24 , H03K19/017509
摘要： An exemplary aspect of the present invention is a memory card that includes: a memory that stores data; a driver that modulates the data stored in the memory; a transmitter that transmits the data modulated by the driver to a receiver provided in an external main unit; and an IC chip having the driver and the transmitter formed therein.
摘要翻译：本发明的示例性方面是存储卡，其包括：存储数据的存储器; 调制存储在存储器中的数据的驱动程序; 将由所述驱动器调制的数据发送到设置在外部主单元中的接收机的发射机; 以及其中形成有驱动器和发送器的IC芯片。

72. 发明授权

US08233063B2 Solid state image pick-up device for imaging an object placed thereon 有权
标题翻译：用于使放置在其上的物体成像成像的固态图像拾取装置
公开(公告)号：US08233063B2
公开(公告)日：2012-07-31
申请号：US11268812
申请日：2005-11-07
申请人： Hiroaki Ohkubo , Yasutaka Nakashiba
发明人： Hiroaki Ohkubo , Yasutaka Nakashiba
IPC分类号： H04N3/14 , H01L31/062 , H01L27/00
CPC分类号： G06K9/0004 , G06K9/00053
摘要： The solid state image pick-up device comprises a chip wherein an object to be photographed is put directly on the back surface of the chip, a light incident on the object enters the inner portion of the chip, signal electric charges generated in the inner portion of the chip by the light, the signal electric charges are collected in a photo detective region and the photo detective region has a barrier diffusion layer adjacent thereto so as to collect the signal electric charges effectively. The above-mentioned structure of the solid state image pick-up device can provide superior features that the chip of the solid state image pick-up device is protected from the deterioration of elements included in the chip and the destruction of the elements by Electro Static Discharge, resulting in the reliability improvement of the chip.
摘要翻译：固体摄像装置包括芯片，其中要拍摄的物体直接放置在芯片的背面上，入射到物体上的光进入到芯片的内部，在内部产生信号电荷通过光将信号电荷收集在光检测区域中，并且光检测区域具有与其相邻的阻挡扩散层，从而有效地收集信号电荷。固态摄像装置的上述结构可以提供优异的特征，即可以保护固态摄像装置的芯片免受芯片中包含的元件的损坏和电静电破坏元件放电，导致芯片的可靠性提高。

73. 发明授权

US08130297B2 Solid state imaging device including a light receiving portion with a silicided surface 有权
标题翻译：固态成像装置包括具有硅化物表面的光接收部分
公开(公告)号：US08130297B2
公开(公告)日：2012-03-06
申请号：US12805711
申请日：2010-08-16
申请人： Hiroaki Ohkubo , Yasutaka Nakashiba
发明人： Hiroaki Ohkubo , Yasutaka Nakashiba
IPC分类号： H04N5/335
CPC分类号： H01L27/14643 , H01L27/14603 , H01L27/14609 , H01L27/1462 , H01L27/14623 , H01L27/14625 , H01L27/14629 , H01L27/1464
摘要： A solid state imaging device having a light receiving region on a first surface side of a semiconductor substrate, incident light from an object to be imaged being illuminated on a second surface side of the semiconductor substrate, the solid state imaging device including an impurity diffusion layer formed on the first surface side of the semiconductor substrate, a surface of the impurity diffusion layer being silicided, and a gate electrode formed on the first surface side of the semiconductor substrate. The impurity diffusion layer includes the light receiving region disposed on the first surface side of the semiconductor substrate, a surface of the light receiving region being silicided, and the impurity diffusion layer includes at least a surface adjacent to the gate electrode.
摘要翻译：一种固体摄像器件，其具有在半导体衬底的第一表面侧上的受光区域，来自被成像对象的入射光被照射在所述半导体衬底的第二表面侧上，所述固态成像器件包括杂质扩散层形成在半导体衬底的第一表面侧，杂质扩散层的表面被硅化，以及形成在半导体衬底的第一表面侧上的栅电极。杂质扩散层包括设置在半导体衬底的第一表面侧的光接收区域，光接收区域的表面被硅化，并且杂质扩散层至少包括与栅电极相邻的表面。

74. 发明申请

US20110089247A1 Interface IC and memory card including the same 有权
标题翻译：接口IC和存储卡包括相同
公开(公告)号：US20110089247A1
公开(公告)日：2011-04-21
申请号：US12923928
申请日：2010-10-14
申请人： Yasutaka Nakashiba , Hiroaki Ohkubo , Mitsuji Okada , Shigeharu Nakata , Shuuichi Kagawa
发明人： Yasutaka Nakashiba , Hiroaki Ohkubo , Mitsuji Okada , Shigeharu Nakata , Shuuichi Kagawa
IPC分类号： G06K19/073 , H03B1/00
CPC分类号： G06K19/073 , G11C7/24 , H03K19/017509
摘要： An exemplary aspect of the present invention is a memory card that includes: a memory that stores data; a driver that modulates the data stored in the memory; a transmitter that transmits the data modulated by the driver to a receiver provided in an external main unit; and an IC chip having the driver and the transmitter formed therein.
摘要翻译：本发明的示例性方面是存储卡，其包括：存储数据的存储器; 调制存储在存储器中的数据的驱动程序; 将由所述驱动器调制的数据发送到设置在外部主单元中的接收机的发射机; 以及其中形成有驱动器和发送器的IC芯片。

75. 发明申请

US20100308387A1 Solid state imaging device 有权
标题翻译：固态成像装置
公开(公告)号：US20100308387A1
公开(公告)日：2010-12-09
申请号：US12805711
申请日：2010-08-16
申请人： Hiroaki Ohkubo , Yasutaka Nakashiba
发明人： Hiroaki Ohkubo , Yasutaka Nakashiba
IPC分类号： H01L31/14
CPC分类号： H01L27/14643 , H01L27/14603 , H01L27/14609 , H01L27/1462 , H01L27/14623 , H01L27/14625 , H01L27/14629 , H01L27/1464
摘要： A solid state imaging device having a light receiving region on a first surface side of a semiconductor substrate, incident light from an object to be imaged being illuminated on a second surface side of the semiconductor substrate, the solid state imaging device including an impurity diffusion layer formed on the first surface side of the semiconductor substrate, a surface of the impurity diffusion layer being silicided, and a gate electrode formed on the first surface side of the semiconductor substrate. The impurity diffusion layer includes the light receiving region disposed on the first surface side of the semiconductor substrate, a surface of the light receiving region being silicided, and the impurity diffusion layer includes at least a surface adjacent to the gate electrode.
摘要翻译：一种固体摄像器件，其具有在半导体衬底的第一表面侧上的受光区域，来自被成像对象的入射光被照射在所述半导体衬底的第二表面侧上，所述固态成像器件包括杂质扩散层形成在半导体衬底的第一表面侧，杂质扩散层的表面被硅化，以及形成在半导体衬底的第一表面侧上的栅电极。杂质扩散层包括设置在半导体衬底的第一表面侧的光接收区域，光接收区域的表面被硅化，并且杂质扩散层至少包括与栅电极相邻的表面。

76. 发明授权

US07579673B2 Semiconductor device having electrical fuse 有权
标题翻译：具有电熔丝的半导体装置
公开(公告)号：US07579673B2
公开(公告)日：2009-08-25
申请号：US11506860
申请日：2006-08-21
申请人： Hiroaki Ohkubo , Yasutaka Nakashiba
发明人： Hiroaki Ohkubo , Yasutaka Nakashiba
IPC分类号： H01L23/58
CPC分类号： H01L23/5252 , H01L23/5256 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes a semiconductor substrate, and an electrical fuse provided on the semiconductor substrate. The electrical fuse includes a first fuse link and a second fuse link mutually connected in series, a first current inlet/outlet terminal (first terminal) and a second current inlet/outlet terminal (second terminal) respectively provided at an end and the other end of the first fuse link, and a third current inlet/outlet terminal (second terminal) and a fourth current inlet/outlet terminal (third terminal) provided at an end and the other end of the second fuse link.
摘要翻译：半导体器件包括半导体衬底和设置在半导体衬底上的电熔丝。电熔丝包括分别相互连接的第一熔断体和第二熔断体，分别设置在端部和另一端的第一电流入口/出口端子（第一端子）和第二电流入口/出口端子（第二端子）以及设置在第二熔断体的端部和另一端的第三电流入口/出口端子（第二端子）和第四电流入口/出口端子（第三端子）。

77. 发明授权

US07417277B2 Semiconductor integrated circuit and method of manufacturing the same 失效
标题翻译：半导体集成电路及其制造方法
公开(公告)号：US07417277B2
公开(公告)日：2008-08-26
申请号：US11607000
申请日：2006-12-01
申请人： Hiroaki Ohkubo , Yasutaka Nakashiba
发明人： Hiroaki Ohkubo , Yasutaka Nakashiba
IPC分类号： H01L27/108
CPC分类号： H01L27/0811 , H01L27/0629 , H01L29/7833
摘要： Conventional capacitors constituted of a FET incur degradation in frequency response. A semiconductor integrated circuit includes a semiconductor substrate, an N-type FET, a P-type FET, and capacitors. The N-type FET includes N-type impurity diffusion layers, a P-type impurity-implanted region, a gate insulating layer, and a gate electrode. The P-type FET includes P-type impurity diffusion layers, an N-type impurity-implanted region, a gate insulating layer, and a gate electrode. The capacitor includes N-type impurity diffusion layers, an N-type impurity-implanted region, a capacitance insulating layer, and an upper electrode. The capacitor includes P-type impurity diffusion layers, a P-type impurity-implanted region, a capacitance insulating layer, and an upper electrode.
摘要翻译：由FET构成的传统电容器频率响应降低。半导体集成电路包括半导体衬底，N型FET，P型FET和电容器。 N型FET包括N型杂质扩散层，P型杂质注入区域，栅极绝缘层和栅极电极。 P型FET包括P型杂质扩散层，N型杂质注入区域，栅极绝缘层和栅极电极。电容器包括N型杂质扩散层，N型杂质注入区，电容绝缘层和上电极。电容器包括P型杂质扩散层，P型杂质注入区，电容绝缘层和上电极。

78. 发明申请

US20070045783A1 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20070045783A1
公开(公告)日：2007-03-01
申请号：US11506860
申请日：2006-08-21
申请人： Hiroaki Ohkubo , Yasutaka Nakashiba
发明人： Hiroaki Ohkubo , Yasutaka Nakashiba
IPC分类号： H01L23/62
CPC分类号： H01L23/5252 , H01L23/5256 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes a semiconductor substrate, and an electrical fuse provided on the semiconductor substrate. The electrical fuse includes a first fuse link and a second fuse link mutually connected in series, a first current inlet/outlet terminal (first terminal) and a second current inlet/outlet terminal (second terminal) respectively provided at an end and the other end of the first fuse link, and a third current inlet/outlet terminal (second terminal) and a fourth current inlet/outlet terminal (third terminal) provided at an end and the other end of the second fuse link.
摘要翻译：半导体器件包括半导体衬底和设置在半导体衬底上的电熔丝。电熔丝包括分别相互连接的第一熔断体和第二熔断体，分别设置在端部和另一端的第一电流入口/出口端子（第一端子）和第二电流入口/出口端子（第二端子）以及设置在第二熔断体的端部和另一端的第三电流入口/出口端子（第二端子）和第四电流入口/出口端子（第三端子）。

79. 发明申请

US20050221573A1 Integrated circuit device, method of manufacturing the same and method of forming vanadium oxide film 失效
标题翻译：集成电路器件及其制造方法以及形成氧化钒膜的方法
公开(公告)号：US20050221573A1
公开(公告)日：2005-10-06
申请号：US11086743
申请日：2005-03-23
申请人： Naoyoshi Kawahara , Hiroshi Murase , Hiroaki Ohkubo , Yasutaka Nakashiba , Naoki Oda , Tokuhito Sasaki , Nobukazu Ito
发明人： Naoyoshi Kawahara , Hiroshi Murase , Hiroaki Ohkubo , Yasutaka Nakashiba , Naoki Oda , Tokuhito Sasaki , Nobukazu Ito
IPC分类号： H01L21/3065 , H01L21/02 , H01L21/316 , H01L21/3213 , H01L21/822 , H01L21/8234 , H01L23/522 , H01L27/04 , H01L37/00 , H01L47/00
CPC分类号： H01L21/02192 , H01L21/022 , H01L21/31604 , H01L23/5228 , H01L28/24 , H01L37/00 , H01L2924/0002 , H01L2924/00
摘要： A vanadium oxide film is formed on an interlayer insulating layer, and a silicon oxide film and a silicon nitride film are formed on the vanadium oxide film in this order. With a resist pattern used as a mask, the silicon nitride film is patterned. Then, the resist pattern is removed using a stripping solution or oxygen plasma ashing. Next, with the patterned silicon nitride film used as a mask, the silicon oxide film and the vanadium oxide film are etched to form a resistor film of vanadium oxide.
摘要翻译：在层间绝缘层上形成氧化钒膜，依次在氧化钒膜上形成氧化硅膜和氮化硅膜。用抗蚀剂图案作为掩模，对氮化硅膜进行图案化。然后，使用剥离溶液或氧等离子体灰化除去抗蚀剂图案。接下来，利用图案化的氮化硅膜作为掩模，氧化硅膜和氧化钒膜被蚀刻以形成氧化钒的电阻膜。

80. 发明申请

US20050189602A1 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US20050189602A1
公开(公告)日：2005-09-01
申请号：US11066534
申请日：2005-02-28
申请人： Ryota Yamamoto , Yasutaka Nakashiba
发明人： Ryota Yamamoto , Yasutaka Nakashiba
IPC分类号： H01L21/76 , H01L21/761 , H01L21/765 , H01L21/822 , H01L23/58 , H01L27/04 , H01L29/00 , H01L29/06 , H01L29/51 , H01L29/74 , H01L31/111
CPC分类号： H01L21/765 , H01L21/761 , H01L29/0619 , H01L2924/0002 , H01L2924/00
摘要： An insulating film is provided in a region surrounding a circuit region on a p type silicon substrate, and a frame-shaped electrode is provided to surround the circuit region on the insulating film. The region directly under the electrode at the surface of the p type silicon substrate is formed as a non-doped region with no impurity implanted. Then, a positive power supply potential is applied to the electrode. In this way, a depletion layer is formed directly under the electrode at the surface of the p type silicon substrate. Consequently, the substrate noise is shielded.
摘要翻译：在p型硅衬底上的电路区域周围的区域中设置绝缘膜，并且设置框状电极以围绕绝缘膜上的电路区域。在p型硅衬底的表面的正下方的区域形成为没有杂质注入的非掺杂区域。然后，向电极施加正电源电位。以这种方式，在p型硅衬底的表面下方的电极正下方形成耗尽层。因此，衬底噪声被屏蔽。

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