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71. 发明申请

US20080204135A1 METHOD AND SYSTEM FOR LOW NOISE AMPLIFIER (LNA) GAIN ADJUSTMENT THROUGH NARROWBAND RECEIVED SIGNAL STRENGTH INDICATOR (NRSSI) 有权
标题翻译：低噪声放大器（LNA）通过窄带接收信号强度指示器（NRSSI）的增益调整方法和系统
公开(公告)号：US20080204135A1
公开(公告)日：2008-08-28
申请号：US12115263
申请日：2008-05-05
申请人： Hooman Darabi , Henrik T. Jensen , Brima Ibrahim
发明人： Hooman Darabi , Henrik T. Jensen , Brima Ibrahim
IPC分类号： H03G5/16
CPC分类号： H03G1/007 , H03G3/3063 , H03G2201/103 , H03G2201/202 , H03G2201/307
摘要： A method for processing a plurality of signals may include amplifying an input signal and generating a wideband signal from the amplified input signal. The method may further include bandpass filtering the generated wideband signal to generate a narrowband signal, and adjusting amplification of the input signal based on a narrowband received signal strength indication of the generated narrowband signal, and/or a wideband received signal strength indication of the generated wideband signal. The amplified input signal may be downconverted to generate the wideband signal. The amplified input signal may be downconverted to an intermediate frequency (IF) and/or to a baseband signal to generate the wideband signal. At least one blocker signal may be bandpass filtered from the amplified input signal.
摘要翻译：用于处理多个信号的方法可以包括放大输入信号并从放大的输入信号产生宽带信号。该方法还可以包括对生成的宽带信号进行带通滤波以产生窄带信号，以及基于所生成的窄带信号的窄带接收信号强度指示和/或所生成的宽带信号强度指示来调整输入信号的放大宽带信号。放大的输入信号可以被下变频以产生宽带信号。放大的输入信号可以下变频到中频（IF）和/或基带信号以产生宽带信号。至少一个阻塞信号可以从放大的输入信号进行带通滤波。

72. 发明授权

US07405630B2 Frequency synthesizer with improved spurious performance 有权
标题翻译：具有改善杂散性能的频率合成器
公开(公告)号：US07405630B2
公开(公告)日：2008-07-29
申请号：US11242432
申请日：2005-09-30
申请人： Henrik T. Jensen
发明人： Henrik T. Jensen
IPC分类号： H03L7/00
CPC分类号： H03L7/1976 , H03L7/0891 , H03L7/093
摘要： A loop filter for use in a frequency synthesizer provides improved spurious performance using switched capacitors. The loop filter includes a first switched capacitor having a first capacitance value and which is operable to charge to a first voltage corresponding to a current pulse indicative of a difference in phase or frequency between a reference signal and a feedback signal. The loop filter further includes a second switched capacitor having a second capacitance value and which is operable to charge to a second voltage from the first voltage and produce a control voltage based upon the second voltage. The loop filter has a bandwidth determined by a ratio of the second capacitance value to the first capacitance value.
摘要翻译：用于频率合成器的环路滤波器使用开关电容器提供改进的杂散性能。环路滤波器包括具有第一电容值的第一开关电容器，其可操作以对与指示参考信号和反馈信号之间的相位或频率差异的电流脉冲相对应的第一电压充电。环路滤波器还包括具有第二电容值的第二开关电容器，其可操作以从第一电压充电到第二电压，并且基于第二电压产生控制电压。环路滤波器具有由第二电容值与第一电容值的比率确定的带宽。

73. 发明授权

US07394862B2 Multi-mode wireless polar transmitter architecture 有权
标题翻译：多模无线极性发射机架构
公开(公告)号：US07394862B2
公开(公告)日：2008-07-01
申请号：US11019338
申请日：2004-12-21
申请人： Henrik T. Jensen , Ahmadreza (Reza) Rofougaran
发明人： Henrik T. Jensen , Ahmadreza (Reza) Rofougaran
IPC分类号： H04L27/10
CPC分类号： H04L27/0008 , H04L25/03834 , H04L27/361 , H04L27/367
摘要： A radio transmitter within a transceiver includes a digital processor and analog circuitry for modulating and transmitting an outgoing digital signal in multiple modes of operation. The digital processor digitally modulates the outgoing digital signal to produce one of a constant envelope modulated digital signal and a variable envelope modulated digital signal based on the particular modulation scheme being used to modulate the outgoing digital signal. In addition, the digital processor filters the outgoing digital signal using filter values selected based on the signal bandwidth of the outgoing digital signal. The analog circuitry converts digital envelope and phase signals of the modulated digital signal to analog envelope and phase signals, and up-converts the analog phase signal from an IF signal to an RF signal, using a loop filter that is programmable based on the signal bandwidth of the outgoing digital signal.
摘要翻译：收发器内的无线电发射机包括数字处理器和模拟电路，用于在多种操作模式下调制和发送输出数字信号。数字处理器基于用于调制输出数字信号的特定调制方案对输出数字信号进行数字调制以产生恒定包络调制数字信号和可变包络调制数字信号之一。此外，数字处理器使用基于输出数字信号的信号带宽选择的滤波器值对输出的数字信号进行滤波。模拟电路将调制数字信号的数字包络和相位信号转换为模拟包络和相位信号，并使用基于信号带宽可编程的环路滤波器将模拟相位信号从IF信号上转换为RF信号的输出数字信号。

74. 发明申请

US20080151974A1 Digital compensation for nonlinearities in a polar transmitter 有权
标题翻译：极地发射机的非线性数字补偿
公开(公告)号：US20080151974A1
公开(公告)日：2008-06-26
申请号：US11643266
申请日：2006-12-21
申请人： Henrik T. Jensen , Hooman Darabi , Alireza Zolfaghari
发明人： Henrik T. Jensen , Hooman Darabi , Alireza Zolfaghari
IPC分类号： H03C3/00
CPC分类号： H04B1/0475 , H03C5/00 , H03F1/0222 , H03F1/3241
摘要： A polar transmitter includes a digital processor coupled to receive a complex modulated digital signal and a feedback signal produced from the complex modulated digital signal and that is operable to compare the complex modulated digital signal to the feedback signal to determine an error signal indicative of a difference between the complex modulated digital signal and the feedback signal. The digital processor is further operable to produce a correction signal from the error signal and to add the correction signal to the complex modulated digital signal to produce a corrected complex modulated digital signal.
摘要翻译：极性发射器包括耦合以接收复调制数字信号的数字处理器和从复调制数字信号产生的反馈信号，其可操作以将复调制数字信号与反馈信号进行比较，以确定指示差分的误差信号在复调制数字信号与反馈信号之间。数字处理器还可操作以从误差信号产生校正信号，并将校正信号添加到复调制数字信号以产生经校正的复数调制数字信号。

75. 发明申请

US20080007346A1 Two-point modulation polar transmitter architecture and method for performance enhancement 失效
标题翻译：两点调制极性发射机架构和方法进行性能提升
公开(公告)号：US20080007346A1
公开(公告)日：2008-01-10
申请号：US11471147
申请日：2006-06-20
申请人： Henrik T. Jensen , Brima B. Ibrahim
发明人： Henrik T. Jensen , Brima B. Ibrahim
IPC分类号： H03L7/00
CPC分类号： H03L7/1976 , H03C3/0925 , H03C3/0933 , H03C3/0941 , H03C3/095 , H03C3/0991 , H03L7/093
摘要： A polar transmitter includes a two-point modulation phase-locked loop (PLL) for producing an RF signal with a wide bandwidth. The PLL includes a first input for receiving a phase signal of a variable-envelope modulated signal and providing the phase signal along a first signal path to produce a first frequency modulation signal and a second input for receiving the phase signal and providing the phase signal along a second signal path to produce a second frequency modulation signal. The PLL further includes a voltage controlled oscillator (VCO) having two modulation points, one for receiving the first frequency modulation signal and the other for receiving the second frequency modulation signal. The VCO is controlled by an aggregate of the first frequency modulation signal and the second frequency modulation signal to up-convert the phase signal from an IF to an RF to produce the RF signal with a wide bandwidth.
摘要翻译：极性发射机包括用于产生宽带宽的RF信号的两点调制锁相环（PLL）。 PLL包括用于接收可变包络调制信号的相位信号并沿着第一信号路径提供相位信号以产生第一频率调制信号的第一输入端和用于接收相位信号并提供相位信号的第二输入端用于产生第二频率调制信号的第二信号路径。 PLL还包括具有两个调制点的压控振荡器（VCO），一个用于接收第一频率调制信号，另一个用于接收第二频率调制信号。 VCO由第一频率调制信号和第二频率调制信号的集合控制，以将来自IF的相位信号上变频到RF以产生具有宽带宽的RF信号。

76. 发明授权

US06466147B1 Method and apparatus for randomized dynamic element matching DAC 失效
标题翻译：随机动态元件匹配DAC的方法和装置
公开(公告)号：US06466147B1
公开(公告)日：2002-10-15
申请号：US09427195
申请日：1999-10-25
申请人： Henrik T. Jensen , Joseph F. Jensen
发明人： Henrik T. Jensen , Joseph F. Jensen
IPC分类号： H03M166
CPC分类号： H03M1/0673 , H03M1/74
摘要： A method and apparatus for digital-to-analog conversion utilizing randomized dynamic element matching for the attenuation of harmonic distortion during the conversion process due to non-ideal circuit behavior is presented. The present invention introduces a new DEM approach that results in a simplified DAC architecture relative to previous DACs, while preserving optimal spurious-free dynamic range (SFDR). The particular topology utilized involves the use of a bank of DAC-elements, preferably 1-bit DAC elements, the outputs of which are summed to yield a single multiple-level DAC. During each conversion cycle, random selection is used to determine the addresses of the DAC-elements used in order to “scramble” the DAC noise arising from each individual 1-bit DAC.
摘要翻译：提出了一种使用随机动态元件匹配的数模转换方法和装置，用于由于非理想电路特性而导致的转换过程中的谐波失真衰减。本发明引入了一种新的DEM方法，其相对于先前的DAC产生简化的DAC架构，同时保持了最佳的无杂散动态范围（SFDR）。所使用的特定拓扑包括使用一组DAC元件，优选地是1位DAC元件，其输出相加以产生单个多电平DAC。在每个转换周期期间，随机选择用于确定所使用的DAC元件的地址，以便“扰乱”每个单独1位DAC产生的DAC噪声。

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