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    • 75. 发明专利
    • Control arithmetic unit
    • 控制算术单元
    • JPS6162102A
    • 1986-03-31
    • JP18364484
    • 1984-09-04
    • Hitachi Ltd
    • MIYAHARA YOJIROKAMIYAMA KENZOAZUSAWA NOBORU
    • G05B13/00G05B11/42G05B13/02
    • G05B13/02
    • PURPOSE:To realize control operation which minimize overshoot volume and adjustment time by separating delayed/advanced operation into proportional constant operation and first order time lag operation, and placing internal limiter in the first order time lag operation. CONSTITUTION:A delayed/advanced operation part 6 with internal limiter is composed of a proportional constant operation part 9 and a first order time lag operation part 11. In this constitution, the operation part 9 calculates the ratio of advanced time constant T2 and delayed time constant 11 against the output signal issued from a proportional operation part 5. An operation part 10 calculates the difference between output signal of the operation part 5 and an output signal x1 of the operation part 9, and the calculated result is delivered to the operation part 11 as an input signal li. The first order time lag operation part of the operation part 11 calculates the time lag of the signal li, and the limiter reset the initial value (last time value) to the same limit value when the output of the time lag calculation and limit calculation is passed to the limiter. By this method, the control operation is realized to minimize overshoot volume and adjustment time.
    • 目的:实现通过将延迟/高级操作分为比例常数运算和一阶时滞运算来最小化过冲量和调整时间的控制操作,并将内部限幅器置于一阶时滞运算。 构成:具有内部限制器的延迟/高级操作部分6由比例常数运算部分9和一阶时间延迟运算部分11组成。在该结构中,运算部分9计算提前时间常数T2和延迟时间的比率 运算部10计算运算部5的输出信号与运算部9的输出信号x1之间的差,将运算结果输出到运算部 11作为输入信号li。 运算部11的一阶时滞运算部分计算信号li的时间滞后,并且限幅器将时间延迟计算和极限计算的输出为 传递给限制器。 通过这种方法,实现了控制操作,以最小化过冲量和调整时间。
    • 77. 发明专利
    • Phase detector
    • 相位检测器
    • JPS59196477A
    • 1984-11-07
    • JP7187683
    • 1983-04-22
    • Hitachi Ltd
    • AZUSAWA NOBORUYOKU YURIO
    • G01R25/00H02H3/38
    • PURPOSE: To enable a continuous detection of phase with a better flowing property by switching the polarity of a potential difference signal to be inputted into V/F converter between the times of increasing and decreasing a sine wave signal obtained from a counter for counting an output of the V/F converter.
      CONSTITUTION: An AC input signal e
      u is inputted into a divider 21 and divided by an amplitude V thereof e
      u to obtain a cosine wave signal COSθ. On the other hand, an output pulse of a V/F converter 25 is inputted into a counter 26 and a saw tooth digital phase detection signal θ
      1 is converted into a cosine wave signal COSθ
      1 with a cosine conversion circuit 27. This cosine signal COSθ
      1 is inputted into a subtractor 22 through a D/A converter 28 to be subtracted from the cosine wave signal COSθ. Then, a phase difference signal Δθ is inputted into a plurality switching circuit 23 and then, inputted into an integrator 24 with inversion of the polarity while the phase detection signal θ
      1 ranges from 0W 180° in the electric angle and without inversion thereof when it ranges from 180W360°. Then, the integration output is inputted into the V/F converter 25.
      COPYRIGHT: (C)1984,JPO&Japio
    • 目的:通过在增加和减少从用于计数输出的计数器的计数器获得的正弦波信号的时间之间切换要输入到V / F转换器的电位差信号的极性,能够连续检测具有更好流动特性的相位 的V / F转换器。 构成:将AC输入信号eu输入到除法器21中,除以其eu的振幅V,得到余弦波信号COSθ。 另一方面,V / F转换器25的输出脉冲被输入到计数器26中,锯齿数字相位检测信号θ1用余弦变换电路27转换成余弦波信号COStheta1。该余弦信号COStheta1是 通过D / A转换器28输入到减法器22中以从余弦波信号COSθ中减去。 然后,将相位差信号DELTAtata输入到多个开关电路23中,然后在相位检测信号θ1的范围为0-180度时输入到具有极性反转的积分器24中。 在180-360度的范围内,以电角度而不反转。然后,积分输出被输入到V / F转换器25中。
    • 78. 发明专利
    • Pwm pulse generator
    • PWM脉冲发生器
    • JPS59144396A
    • 1984-08-18
    • JP1603983
    • 1983-02-04
    • Hitachi Ltd
    • AZUSAWA NOBORUSHIRAISHI HISANORI
    • H02M7/48H02M7/527H02M7/5395H02P8/14H02P8/18H02P21/00H02P27/04H03K7/08
    • H02M7/527H02P21/09
    • PURPOSE:To eliminate the disorder of the pulse width of a PWM pulse even when a phase is abruptly varied by using a sinusoidal wave signal as a carrier. CONSTITUTION:A counter 20 outputs a counted value (t) via an F/R signal. A multiplier 21 multiplies the angular frequency (w) of the carrier by the counted value (t) and outputs wt. The wt is added by an adder 22 to the output theta of an adder 23 to produce wt+theta. This value is converted by a sinusoidal wave converter 27 to a sinusoidal carrier signal sin(wt+theta), and converted to a sinusoidal modulation signal Asin1/n(wt+theta) by a multiplier 25, a sinusoidal wave converter 26 and a multiplier 28. The sinusoidal modulation signal and the sinusoidal carrier signal are compared by a comparator 29, which outputs a PWM pulse becoming ''1'' when the sinusoidal modulation signal is large.
    • 目的:即使通过使用正弦波信号作为载波,相位突然变化,也可消除PWM脉冲的脉冲宽度紊乱。 构成:计数器20通过F / R信号输出计数值(t)。 乘法器21将载波的角频率(w)乘以计数值(t),并输出重量。 wt由加法器22加到加法器23的输出θ以产生wt + theta。 该值由正弦波转换器27转换为正弦载波信号sin(wt + theta),并通过乘法器25,正弦波转换器26和乘法器转换成正弦调制信号Asin1 / n(wt + theta) 正弦调制信号和正弦载波信号通过比较器29进行比较,比较器29在正弦调制信号较大时输出PWM脉冲变为“1”。
    • 79. 发明专利
    • Thyristor leonard device
    • THYRISTOR LEONARD设备
    • JPS5967891A
    • 1984-04-17
    • JP17622882
    • 1982-10-08
    • Hitachi Ltd
    • TACHIKAWA MAKOTOKAMIYAMA KENZOUOOMAE TSUTOMUAZUSAWA NOBORU
    • H02P7/292
    • H02P7/293
    • PURPOSE:To improve the response of controlling a thyristor Leonard device by correcting a control delay angle signal by an attenuation signal becoming maximum when the output current or voltage becomes zero and becoming zero when the prescribed value. CONSTITUTION:A current controller 4 outputs a deviation between a current signal IDF and a current command signal IR from a filter 9c, and a current rate controller 14 outputs a control delay angle signal alpha2 in response to the deviation between an instantaneous current value iDF digitized by an A/D converter 9e and the output of the controller 4. A function generator 6 outputs an attenuation signal DELTAalpha1 becoming maximum when the signal IDF is zero and zero when the prescribed value. A coefficient unit 16 multiplies a coefficient K by the attenuation signal DELTAalpha1 and outputs a correction control delay angle signal DELTAalpha2. A gate pulse generator 5 controls a thyristor converter 2 in response to the signal alpha corrected by the correction control delay angle signal DELTAalpha2.
    • 目的:通过在输出电流或电压变为零时通过衰减信号变为最大的方式校正控制延迟角信号来提高控制晶闸管Leonard器件的响应,并在规定值时变为零。 构成:电流控制器4从滤波器9c输出电流信号IDF和电流指令信号IR之间的偏差,电流速率控制器14响应于瞬时电流值iDF数字化 通过A / D转换器9e和控制器4的输出。当信号IDF为零时,函数发生器6输出衰减信号DELTAalpha1变为最大值,而当规定值时为零。 系数单元16将系数K乘以衰减信号DELTAalpha1,并输出校正控制延迟角信号DELTAalpha2。 门脉冲发生器5响应由校正控制延迟角信号DELTAalpha2校正的信号α来控制晶闸管转换器2。
    • 80. 发明专利
    • Speed controller for induction motor
    • 感应电动机速度控制器
    • JPS58179192A
    • 1983-10-20
    • JP23167682
    • 1982-12-27
    • Hitachi Ltd
    • OKUYAMA TOSHIAKIHORI KOUSEIAZUSAWA NOBORUYABU HIROAKI
    • H02P25/32H02P21/00H02P27/04H02P27/06
    • H02P27/06H02P27/047H02P27/048H02P2207/01
    • PURPOSE:To control the speed of an induction motor in stable and rapid response over a wide range by correcting the frequency command signal to suppress the variation in the magnetic flux upon change of a load of the motor. CONSTITUTION:The actual voltage value detected by a voltage detector 17 is compared with a voltage command value of a voltage instruction circuit 18, the deviation signal amplified by a voltage deviation amplifier 19 is added to the speed signal of a speed detector 5 and applied to a frequency command amplifier 20. The amplifier 20 applies a primary frequency command obtained by adding the rotating frequency and the slip frequency signal in response to the voltage deviation applied from the amplifier 19 to a voltage/frequency converter 13, thereby controlling the output frequency of a power inverter 3.
    • 目的:通过校正频率指令信号来抑制电机负载变化时磁通量的变化,来控制感应电动机在宽范围内稳定,快速响应的速度。 构成:将电压检测器17检测出的实际电压值与电压指令电路18的电压指令值进行比较,由电压偏差放大器19放大的偏差信号与速度检测器5的速度信号相加,并施加到 频率指令放大器20.放大器20响应于从放大器19施加到电压/频率转换器13的电压偏差而加上旋转频率和转差频率信号而获得的主频率指令,由此控制输出频率 电力逆变器3。