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71. 发明申请

US20080178159A1 METHODS, SYSTEMS AND PROGRAM PRODUCTS FOR ANNOTATING SYSTEM TRACES WITH CONTROL PROGRAM INFORMATION AND PRESENTING ANNOTATED SYSTEM TRACES 失效
标题翻译：用控制程序信息提供系统跟踪的方法，系统和程序产品，并呈现已提及的系统跟踪
公开(公告)号：US20080178159A1
公开(公告)日：2008-07-24
申请号：US12057829
申请日：2008-03-28
申请人： Wolfgang Roesner , Derek Edward Williams
发明人： Wolfgang Roesner , Derek Edward Williams
IPC分类号： G06F9/455
CPC分类号： G06F11/3664 , G06F11/3636
摘要： The signal state that a signal of interest within a system under test has during each of a plurality of cycles of operation of the system under test is stored in a trace file. In association with the signal state, information regarding a requested access to the signal state by a control program during a particular cycle among the plurality of cycles is also stored. From the trace files a presentation is generated that presents, for at least a signal of interest within the system under test, a plurality of signal state indications, each indicating a respective state that the signal had during a one of a plurality of cycles of operation of the system under test. The presentation also indicates, in a graphically distinctive manner, at least one cycle of operation during which a control program requested access to a state of the signal, so that the influence of the control program on the state of the system under test is visually apparent.
摘要翻译：被测系统中感兴趣的信号在被测系统的多个操作周期中的每一个期间的信号状态被存储在跟踪文件中。与信号状态相关联，还存储关于在多个周期中的特定周期期间由控制程序请求的访问信号状态的信息。从跟踪文件中产生一个演示文稿，对于至少在被测系统内感兴趣的信号，呈现多个信号状态指示，每个信号状态指示各自表示信号在多个操作周期之一中具有的状态的被测系统。演示文稿还以图形上独特的方式指示至少一个操作周期，在该周期期间控制程序请求访问信号的状态，使得控制程序对被测系统的状态的影响在视觉上是明显的。

72. 发明授权

US07392501B2 Method, system and program product providing a configuration specification language supporting arbitrary mapping functions for configuration constructs 有权
标题翻译：提供配置规范语言的方法，系统和程序产品，支持用于配置结构的任意映射功能
公开(公告)号：US07392501B2
公开(公告)日：2008-06-24
申请号：US11408583
申请日：2006-04-21
申请人： Wolfgang Roesner , Derek Edward Williams
发明人： Wolfgang Roesner , Derek Edward Williams
IPC分类号： G06F17/50 , G06F9/44 , G06F15/177
CPC分类号： G06F17/505 , G06F17/5022
摘要： A method is disclosed of associating a mapping function with a configuration construct of a digital design defined by one or more hardware description language (HDL) files. According to the method, in the HDL files, a configuration latch is specified within a design entity forming at least a portion of the digital design. In addition, a Dial is specified that defines a relationship between each of a plurality of input values and a respective one of a plurality of different output values. The HDL files also include a statement that instantiates an instance of the Dial in association with the configuration latch such that a one-to-one correspondence exists between a value contained within the configuration latch and an input value of the instance of the Dial. The HDL files further include a statement associating the Dial with a mapping function that applies a selected transformation to values read from or written to the instance of the Dial.
摘要翻译：公开了一种将映射函数与由一个或多个硬件描述语言（HDL）文件定义的数字设计的配置结构相关联的方法。根据该方法，在HDL文件中，在形成数字设计的至少一部分的设计实体内指定配置锁存器。此外，指定了一个Dial，其定义了多个输入值中的每一个与多个不同输出值中的相应的一个之间的关系。 HDL文件还包括一个语句，用于与配置锁存器相关联地实例化Dial的实例，使得在配置锁存器中包含的值与Dial的实例的输入值之间存在一一对应的对应关系。 HDL文件还包括将Dial与将映射功能相关联的语句，该映射函数将选择的变换应用于从Dial的实例读取或写入的值。

73. 发明授权

US07392169B2 Method, system and program product for defining and recording minimum and maximum event counts of a simulation utilizing a high level language 有权
标题翻译：用于使用高级语言定义和记录模拟的最小和最大事件计数的方法，系统和程序产品
公开(公告)号：US07392169B2
公开(公告)日：2008-06-24
申请号：US10970469
申请日：2004-10-21
申请人： Carol Ivash Gabele , Wolfgang Roesner , Derek Edward Williams
发明人： Carol Ivash Gabele , Wolfgang Roesner , Derek Edward Williams
IPC分类号： G06F17/50
CPC分类号： G06F17/5022
摘要： According to one method of simulation processing, instrumentation code, such as an runtime executive (rtx), receives one or more statements describing an count event and identifying the count event as an outlying count event. While simulating a design utilizing the HDL simulation model, occurrences of the outlying count event are counted to obtain a count event value. Simulation result data obtained from simulating the design is then received and processed. In the processing, the count event value is recorded within a data storage subsystem responsive to a determination of whether or not the count event value of the outlying count event exceeds a previously recorded count event value.
摘要翻译：根据模拟处理的一种方法，诸如运行时执行程序（rtx）的仪器代码接收描述计数事件的一个或多个语句，并将计数事件识别为外部计数事件。在使用HDL仿真模型模拟设计的同时，计算出外部计数事件以获得计数事件值。然后接收并处理从模拟设计获得的仿真结果数据。在处理中，响应于确定偏移计数事件的计数事件值是否超过先前记录的计数事件值，将计数事件值记录在数据存储子系统内。

74. 发明授权

US07366999B2 Method, system and program product providing a configuration specification language supporting arbitrary mapping functions for configuration constructs 有权
公开(公告)号：US07366999B2
公开(公告)日：2008-04-29
申请号：US11408835
申请日：2006-04-21
申请人： Wolfgang Roesner , Derek Edward Williams
发明人： Wolfgang Roesner , Derek Edward Williams
IPC分类号： G06F17/50
CPC分类号： G06F17/505 , G06F17/5022
摘要： A method is disclosed of associating a mapping function with a configuration construct of a digital design defined by one or more hardware description language (HDL) files. According to the method, in the HDL files, a configuration latch is specified within a design entity forming at least a portion of the digital design. In addition, a Dial is specified that defines a relationship between each of a plurality of input values and a respective one of a plurality of different output values. The HDL files also include a statement that instantiates an instance of the Dial in association with the configuration latch such that a one-to-one correspondence exists between a value contained within the configuration latch and an input value of the instance of the Dial. The HDL files further include a statement associating the Dial with a mapping function that applies a selected transformation to values read from or written to the instance of the Dial.

75. 发明授权

US07356568B2 Method, processing unit and data processing system for microprocessor communication in a multi-processor system 失效
标题翻译：用于多处理器系统中微处理器通信的方法，处理单元和数据处理系统
公开(公告)号：US07356568B2
公开(公告)日：2008-04-08
申请号：US10318514
申请日：2002-12-12
申请人： Ravi Kumar Arimilli , Robert Alan Cargnoni , Derek Edward Williams , Kenneth Lee Wright
发明人： Ravi Kumar Arimilli , Robert Alan Cargnoni , Derek Edward Williams , Kenneth Lee Wright
IPC分类号： G06F13/00
CPC分类号： G06F9/30101
摘要： A processor communication register (PCR) contained in each processor within a multiprocessor system provides enhanced processor communication. Each PCR stores identical processor communication information that is useful in pipelined or parallel multi-processing. Each processor has exclusive rights to store to a sector within each PCR and has continuous access to read the contents of its own PCR. Each processor updates its exclusive sector within all of the PCRs, instantly allowing all of the other processors to see the change within the PCR data, and bypassing the cache subsystem. Efficiency is enhanced within the multiprocessor system by providing processor communications to be immediately transferred into all processors without momentarily restricting access to the information or forcing all the processors to be continually contending for the same cache line, and thereby overwhelming the interconnect and memory system with an endless stream of load, store and invalidate commands.
摘要翻译：包含在多处理器系统内的每个处理器中的处理器通信寄存器（PCR）提供增强的处理器通信。每个PCR存储在流水线或并行多处理中有用的相同的处理器通信信息。每个处理器具有存储在每个PCR内的扇区的专有权利，并且具有连续访问以读取其自己的PCR的内容。每个处理器在所有PCR中更新其独占扇区，立即允许所有其他处理器查看PCR数据中的更改，并绕过缓存子系统。通过提供处理器通信以立即转移到所有处理器中而不会立即限制对信息的访问或迫使所有处理器连续地竞争相同的高速缓存行，从而将互连和存储系统压倒在一起，从而在多处理器系统中提高效率无限流的加载，存储和无效命令。

76. 发明授权

US07092868B2 Annealing harvest event testcase collection within a batch simulation farm 失效
公开(公告)号：US07092868B2
公开(公告)日：2006-08-15
申请号：US09997845
申请日：2001-11-30
申请人： Carol Ivash Gabele , Wolfgang Roesner , Derek Edward Williams
发明人： Carol Ivash Gabele , Wolfgang Roesner , Derek Edward Williams
IPC分类号： G06F9/45 , G06F17/50
CPC分类号： G01R31/318357 , G01R31/318314 , G01R31/318364 , G06F17/5022
摘要： A method and system for resolving testcase collection inconsistencies between a testcase list which includes testcases that have triggered harvest events within a simulation model, and a harvest hit table which records harvest events that have been triggered during simulation of the simulation model. First, the harvest hit table is updated from a simulation client to include a harvest event triggered by a testcase during simulation of the simulation model. The testcase is then collected within the testcase list. Finally, testcases identified within the testcase list are compared to testcases identified within the harvest hit table to determine inconsistencies therebetween.

77. 发明授权

US07062746B2 Method, system and program product that utilize a configuration database to configure a hardware digital system having multiple access methods 失效
标题翻译：使用配置数据库来配置具有多种访问方式的硬件数字系统的方法，系统和程序产品
公开(公告)号：US07062746B2
公开(公告)日：2006-06-13
申请号：US10425089
申请日：2003-04-28
申请人： Wolfgang Roesner , Derek Edward Williams
发明人： Wolfgang Roesner , Derek Edward Williams
IPC分类号： G06F17/50
CPC分类号： G06F17/5022 , G06F17/5045
摘要： In a configuration database, at least one latch data structure is created that corresponds to a hardware latch in a hardware system to be configured. The at least one latch data structure includes a method field indicating which of a plurality of different access methods can be used to access the hardware latch. In addition, the latch data structure includes at least one Dial data structure defining an instance of a Dial entity controlling which of a plurality of different possible latch values is placed in the hardware latch in response to each of a plurality of Dial settings. The configuration database further includes an association between the instance of the Dial entity and the hardware latch. The configuration database can then be referenced to set the hardware latch utilizing an access method indicated by the at least one latch data structure.
摘要翻译：在配置数据库中，创建与要配置的硬件系统中的硬件锁存相对应的至少一个锁存数据结构。所述至少一个锁存数据结构包括指示可以使用多个不同访问方法中的哪一个访问硬件锁存器的方法字段。此外，锁存数据结构包括至少一个拨号数据结构，其响应于多个拨号设置中的每一个，定义了拨号实体的实例，其控制多个不同的可能锁存值中的哪一个被放置在硬件锁存器中。配置数据库还包括Dial实例的实例与硬件锁存器之间的关联。然后可以参考配置数据库，以利用由至少一个锁存器数据结构指示的访问方法来设置硬件锁存器。

78. 发明授权

US07017031B2 Method, apparatus and system for managing released promotion bits 失效
标题翻译：用于管理已发布晋升位的方法，装置和系统
公开(公告)号：US07017031B2
公开(公告)日：2006-03-21
申请号：US10268740
申请日：2002-10-10
申请人： Ravi Kumar Arimilli , Derek Edward Williams
发明人： Ravi Kumar Arimilli , Derek Edward Williams
IPC分类号： G06F9/30
CPC分类号： G06F12/0815 , G06F9/3004 , G06F9/30072 , G06F9/30087 , G06F12/0811
摘要： A data processing system includes a global promotion facility containing a plurality of promotion bit fields, an interconnect, and a plurality of processing units coupled to the global promotion facility and to the interconnect. A first processing unit includes an instruction sequencing unit, an execution unit that executes an acquisition instruction to acquire a particular promotion bit field within the global promotion facility, and a promotion awareness facility. In response to the first processing unit snooping a request by a second processing unit for the particular promotion bit field, the first processing unit records an association between the second processing unit and the particular promotion bit field in the global promotion facility. After the request and release of the particular promotion bit field by the first processing unit, the first processing unit checks the promotion awareness facility for an association for the particular promotion bit and responsive to the checking, pushes the particular promotion bit field to the second processing unit utilizing an unsolicited operation on the interconnect such that no additional request by the second processing unit is required.
摘要翻译：数据处理系统包括包含多个升级位字段的全球推广设施，互连以及耦合到全球促销设施和互连的多个处理单元。第一处理单元包括指令排序单元，执行单元，执行获取指令以获取全球促销设施内的特定促销位字段，以及促销意识设施。响应于第一处理单元窥探特定促销位字段的第二处理单元的请求，第一处理单元在全局推广设备中记录第二处理单元和特定促销位字段之间的关联。在由第一处理单元请求和释放特定促销位字段之后，第一处理单元检查促销感知设施以获得针对特定促销位的关联并且响应于检查，将特定促销位字段推送到第二处理在所述互连上使用非请求操作的单元，使得不需要所述第二处理单元的附加请求。

79. 发明授权

US06941527B2 Method, system and program product for reducing a size of a configuration database utilized to configure a hardware digital system 失效
标题翻译：用于减少用于配置硬件数字系统的配置数据库的大小的方法，系统和程序产品
公开(公告)号：US06941527B2
公开(公告)日：2005-09-06
申请号：US10425072
申请日：2003-04-28
申请人： Wolfgang Roesner , Derek Edward Williams
发明人： Wolfgang Roesner , Derek Edward Williams
IPC分类号： G06F17/50
CPC分类号： G06F17/5045 , G06F17/5022
摘要： A method of constructing a compact configuration database is disclosed. The configuration database originally includes a plurality of Dial instance data structures each corresponding to a respective one of a plurality of Dial instances utilized to control the latch values of one or more latches within a digital design. According to the method, a determination is made of which of the plurality of Dial instance data structures are accessed during initialization of the digital design. In response to the determination, at least one first Dial instance data structure that is not accessed during initialization of the digital design is removed from the configuration database to reduce a size of the configuration database. In one embodiment, at least one second Dial instance data structure corresponding to a Dial instance that is set to only a single setting is also removed from the configuration database. Thereafter, the configuration database is stored.
摘要翻译：公开了一种构造紧凑型配置数据库的方法。配置数据库最初包括多个Dial实例数据结构，每个Dial实例数据结构各自对应于用于控制数字设计中的一个或多个锁存器的锁存值的多个Dial实例中的相应一个。根据该方法，确定在数字设计的初始化期间多个Dial实例数据结构中的哪一个被访问。响应于该确定，在数字设计的初始化期间不被访问的至少一个第一拨号实例数据结构从配置数据库中移除以减小配置数据库的大小。在一个实施例中，对应于仅被设置为单个设置的拨号实例的至少一个第二拨号实例数据结构也从配置数据库中移除。此后，存储配置数据库。

80. 发明授权

US06430586B1 Controllable bit stream generator 失效
标题翻译：可控位流发生器
公开(公告)号：US06430586B1
公开(公告)日：2002-08-06
申请号：US09328304
申请日：1999-06-08
申请人： Derek Edward Williams
发明人： Derek Edward Williams
IPC分类号： G06F102
CPC分类号： G06F11/2215 , G01R31/318385 , G06F7/58
摘要： A controllable bit stream generator for providing a random bit source with a desired probability. The controllable bit stream generator comprises a digital component which generates a pseudo-random bit sequence, a variable probability conditioner coupled to the digital component and which accepts the pseudo-random bit sequence and outputs a corresponding controlled output, and a register coupled to the variable probability conditioner. The register is utilized to send a control signal to the variable probability conditioner. The controllable bit stream generator creates a random output bit sequence for the controlled output utilizing the variable probability conditioner and the control signal of the register.
摘要翻译：一种可控比特流发生器，用于提供具有所需概率的随机比特源。可控比特流生成器包括产生伪随机比特序列的数字分量，耦合到数字分量的可变概率调节器，并接收伪随机比特序列并输出对应的受控输出，以及耦合到该变量的寄存器概率调理剂该寄存器用于向可变概率调节器发送控制信号。可控位流发生器利用可变概率调节器和寄存器的控制信号来产生用于受控输出的随机输出位序列。

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