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    • 73. 发明申请
    • Method for reduction of gap fill defects
    • 减少间隙填充缺陷的方法
    • US20060183321A1
    • 2006-08-17
    • US11238886
    • 2005-09-27
    • Bulent Basol
    • Bulent Basol
    • H01L21/44
    • H01L21/76873H01L21/2885H01L21/76877
    • A method of electrodepositing a conductor to form a defect-free conductor layer on a wafer surface including features. The wafer surface including the features is lined with a nucleation film. The conductor is electrodeposited onto the nucleation layer from a process solution having an additive that adsorbs strongly on the already deposited conductor and weakly on the exposed portions of the nucleation layer. As a result, the conductor selectively deposits on the still exposed portions of the nucleation layer and covers them with the conductor, thereby forming the defect-free conductor layer on the wafer surface.
    • 一种电沉积导体以在晶片表面上形成无缺陷导体层的方法,包括特征。 包括特征的晶片表面衬有成核膜。 将导体从具有添加剂的处理溶液电沉积到成核层上,所述添加剂强烈地吸附在已经沉积的导体上,并且弱地在成核层的暴露部分上沉积。 结果,导体选择性地沉积在成核层的静态暴露部分上并用导体覆盖它们,从而在晶片表面上形成无缺陷的导体层。
    • 75. 发明申请
    • Defect-free thin and planar film processing
    • 无缺陷的薄和平面薄膜加工
    • US20060009033A1
    • 2006-01-12
    • US11226511
    • 2005-09-13
    • Bulent BasolCyprian Uzoh
    • Bulent BasolCyprian Uzoh
    • H01L21/461C25D17/00
    • C25D17/001C25D7/123H01L21/2885H01L21/32125H01L21/7684H01L21/76877
    • The process of the present invention forms copper interconnects in a semiconductor wafer surface. During the process, initially, narrow and large features are provided in the top surface of the wafer, and then a primary copper layer is deposited by employing an electrochemical deposition process. The primary copper layer completely fills the features and forms a planar surface over the narrow feature and a non-planar surface over the large feature. By employing an electrochemical mechanical deposition process, a secondary copper layer is deposited onto the primary copper layer to form a planar copper layer over the narrow and large features. After this process step, the thickness of the planar copper layer is reduced using an electropolishing process.
    • 本发明的方法在半导体晶片表面中形成铜互连。 在该过程中,最初,在晶片的顶表面中提供窄且大的特征,然后通过使用电化学沉积工艺沉积初级铜层。 初级铜层完全填满了特征,并在狭窄的特征上形成一个平坦的表面,在大的特征上形成一个非平面的表面。 通过采用电化学机械沉积工艺,将二次铜层沉积在初级铜层上,以形成窄和大特征上的平面铜层。 在该工艺步骤之后,使用电解抛光工艺来减小平面铜层的厚度。
    • 79. 发明申请
    • FILLING DEEP FEATURES WITH CONDUCTORS IN SEMICONDUCTOR MANUFACTURING
    • 在半导体制造中填充导体的深度特征
    • US20070293040A1
    • 2007-12-20
    • US11742302
    • 2007-04-30
    • Ismail EmeshChantal ArenaBulent Basol
    • Ismail EmeshChantal ArenaBulent Basol
    • H01L21/4763
    • H01L21/76898H01L21/288
    • A method of filling a conductive material in a three dimensional integration feature formed on a surface of a wafer is disclosed. The feature is optionally lined with dielectric and/or adhesion/barrier layers and then filled with a liquid mixture containing conductive precursor, such as a solution with dissolved ruthenium precursor or a dispersion or suspension with conductive particles (e.g., gold, silver, copper), and the substrate is rotated while the mixture is on its surface. Then, the liquid carrier is dried from the feature, leaving a conductive layer in the feature. These two steps are optionally repeated until the feature is filled up with the conductor. Then, the conductor is annealed in the feature, thereby forming a dense conductive plug in the feature.
    • 公开了一种在晶片表面形成的三维积分特征中填充导电材料的方法。 该特征可选地衬有介电和/或粘附/阻挡层,然后填充含有导电前体的液体混合物,例如具有溶解的钌前体的溶液或具有导电颗粒(例如金,银,铜)的分散体或悬浮液, 并且当混合物在其表面上时基板旋转。 然后,从特征中干燥液体载体,在该特征中留下导电层。 可选地重复这两个步骤,直到特征被导体填满。 然后,导体在特征中退火,从而在该特征中形成致密的导电插塞。