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71. 发明授权

US06261977B1 Method for preventing an electrostatic chuck from being corroded during a cleaning process 失效
标题翻译：防止静电卡盘在清洗过程中被腐蚀的方法
公开(公告)号：US06261977B1
公开(公告)日：2001-07-17
申请号：US09391357
申请日：1999-09-08
申请人： Cheng-Yuan Tsai , Chih-Chien Liu , Juan-Yuan Wu
发明人： Cheng-Yuan Tsai , Chih-Chien Liu , Juan-Yuan Wu
IPC分类号： H01L21324
CPC分类号： H01L21/67069 , H01L21/6831 , H01L21/6833 , Y10S438/905 , Y10S438/906 , Y10S438/907
摘要： The present invention relates to a method for preventing an electrostatic chuck positioned at the bottom of a plasma vacuum chamber from being corroded during a cleaning process. The electrostatic chuck comprises a conductive substrate functioned as a lower electrode in a plasma process, and an insulating layer on the conductive substrate to electrically isolate the semiconductor wafer and the conductive substrate. The cleaning process involves a plasma process in which a fluorine-contained gas is injected into the plasma vacuum chamber to remove the chemical layer on the inner wall of the plasma vacuum chamber. A ceramic shutter made of SiC material is reposed on the electrostatic chuck and a high DC voltage is applied to the conductive substrate and the ceramic shutter which causes the ceramic shutter and the electrostatic chuck tightly stick together due to an electrostatic reaction. By doing so, the fluorine-contained gas cannot corrode the insulating layer under the ceramic shutter through the gap between the ceramic shutter and the electrostatic chuck.
摘要翻译：本发明涉及一种防止位于等离子体真空室底部的静电卡盘在清洗过程中被腐蚀的方法。静电卡盘包括在等离子体工艺中用作下电极的导电基板和导电基板上的绝缘层，以电绝缘半导体晶片和导电基板。清洗过程涉及等离子体处理，其中将含氟气体注入到等离子体真空室中以除去等离子体真空室的内壁上的化学层。由SiC材料制成的陶瓷快门被放置在静电卡盘上，并且高导电性基板和陶瓷快门上施加高的直流电压，导致陶瓷快门和静电卡盘由于静电反应紧紧地粘在一起。通过这样做，含氟气体不能通过陶瓷快门和静电卡盘之间的间隙腐蚀陶瓷快门下面的绝缘层。

72. 发明授权

US06248644B1 Method of fabricating shallow trench isolation structure 有权
标题翻译：制造浅沟槽隔离结构的方法
公开(公告)号：US06248644B1
公开(公告)日：2001-06-19
申请号：US09301210
申请日：1999-04-28
申请人： Gwo-Shii Yang , Hsueh-Hao Shih , Chih-Chien Liu , Tri-Rung Yew
发明人： Gwo-Shii Yang , Hsueh-Hao Shih , Chih-Chien Liu , Tri-Rung Yew
IPC分类号： H01L2176
CPC分类号： H01L21/76235
摘要： A method of fabricating a shallow trench isolation structure is described. A preserve layer is formed on a substrate. A trench is formed in the substrate and the preserve layer. An oxide layer is formed over the substrate to fill the trench. A wet densification step is performed in a moist environment. A planarization step is performed until the preserve layer is exposed. A shallow trench isolation structure is formed.
摘要翻译：描述了制造浅沟槽隔离结构的方法。在基板上形成保护层。在衬底和保护层中形成沟槽。在衬底上形成氧化物层以填充沟槽。在潮湿的环境中进行湿致密化步骤。进行平坦化步骤直到保护层被暴露。形成浅沟槽隔离结构。

73. 发明授权

US06239018B1 Method for forming dielectric layers 有权
标题翻译：电介质层形成方法
公开(公告)号：US06239018B1
公开(公告)日：2001-05-29
申请号：US09241326
申请日：1999-02-01
申请人： Chih-Chien Liu , Juan-Yuan Wu , Water Lur
发明人： Chih-Chien Liu , Juan-Yuan Wu , Water Lur
IPC分类号： H01L21316
CPC分类号： H01L21/02112 , C23C16/50 , H01L21/02107 , H01L21/02274 , H01L21/02304 , H01L21/31612
摘要： A method for forming dielectric layers is described. Wiring lines are formed on a provided semiconductor substrate. Spacers are formed on the sidewalls of the wiring lines. A liner layer is formed on the wiring lines and on the spacers by a first HDPCVD step, such as unbiased, unclamped HDPCVD. A dielectric layer is formed on the liner layer to cover the wiring lines and to fill gaps between the wiring lines by a second HDPCVD step.
摘要翻译：描述形成电介质层的方法。配线在所提供的半导体衬底上形成。间隔件形成在布线的侧壁上。通过第一HDPCVD步骤，例如无偏压，未夹紧的HDPCVD，在布线和间隔物上形成衬垫层。在衬垫层上形成介电层以覆盖布线，并通过第二HDPCVD步骤填充布线之间的间隙。

74. 发明授权

US06214691B1 Method for forming shallow trench isolation 失效
标题翻译：形成浅沟槽隔离的方法
公开(公告)号：US06214691B1
公开(公告)日：2001-04-10
申请号：US09228932
申请日：1999-01-12
申请人： Gwo-Shii Yong , Chih-Chien Liu , Tri-Rung Yew , Water Lur
发明人： Gwo-Shii Yong , Chih-Chien Liu , Tri-Rung Yew , Water Lur
IPC分类号： H01L2176
CPC分类号： H01L21/76224
摘要： A method for forming shallow trench isolation is disclosed. The method includes forming a trench in a semiconductor substrate, and then blanket depositing a silicon oxide layer over the semiconductor substrate by a plasma process, thereby substantially refilling the trench. Thereafter, a photoresist layer is formed on the plasma deposited silicon oxide layer, followed by etching back a portion of the photoresist layer. The plasma deposited silicon oxide layer is then isotropically etched, and the photoresist layer is then finally removed.
摘要翻译：公开了一种用于形成浅沟槽隔离的方法。该方法包括在半导体衬底中形成沟槽，然后通过等离子体工艺在半导体衬底上覆盖氧化硅层，从而基本上重新填充沟槽。此后，在等离子体沉积的氧化硅层上形成光致抗蚀剂层，然后蚀刻光致抗蚀剂层的一部分。然后等离子体沉积的氧化硅层被各向同性地蚀刻，然后最终去除光致抗蚀剂层。

75. 发明授权

US06203863B1 Method of gap filling 有权
标题翻译：间隙填充方法
公开(公告)号：US06203863B1
公开(公告)日：2001-03-20
申请号：US09200893
申请日：1998-11-27
申请人： Chih-Chien Liu , Juan-Yuan Wu , Water Lur , Shih-Wei Sun
发明人： Chih-Chien Liu , Juan-Yuan Wu , Water Lur , Shih-Wei Sun
IPC分类号： B05D306
CPC分类号： H01L21/02164 , C23C16/045 , C23C16/50 , H01L21/02211 , H01L21/02274 , H01L21/02304 , H01L21/31612 , H01L21/76834 , H01L21/76837
摘要： A method of gap filling by using HDPCVD. On a substrate having a conductive structure, a first oxide layer is formed to protect the conductive structure. While forming the first oxide layer no bias is applied. An argon flow with a high speed of etching/deposition is provided to form a second oxide layer. While forming the second oxide layer a triangular or trapezium profile is formed due to an etching effect to the corner. An argon flow with a low speed of etching/deposition is provided to form a third oxide layer. The gap filling is completed.
摘要翻译：使用HDPCVD的间隙填充方法。在具有导电结构的基板上形成第一氧化物层以保护导电结构。当形成第一氧化物层时，不施加偏压。提供具有高速蚀刻/沉积的氩气流以形成第二氧化物层。在形成第二氧化物层的同时，由于对拐角的蚀刻效果，形成三角形或梯形轮廓。提供具有低速蚀刻/沉积的氩气流以形成第三氧化物层。间隙填充完成。

76. 发明授权

US06174793B1 Method for enhancing adhesion between copper and silicon nitride 有权
标题翻译：提高铜和氮化硅之间粘附性的方法
公开(公告)号：US06174793B1
公开(公告)日：2001-01-16
申请号：US09415798
申请日：1999-10-11
申请人： Cheng-Yuan-Chen Tsai , Chih-Chien Liu , Juan-Yuan Wu
发明人： Cheng-Yuan-Chen Tsai , Chih-Chien Liu , Juan-Yuan Wu
IPC分类号： H01L213205
CPC分类号： H01L21/76867 , H01L21/76838 , H01L21/7685 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： A method for enhancing adhesion ability between copper and silicon nitride is disclosed. The present method comprises following steps: first, provide a substrate and then form a copper layer on the substrate; second, form a copper phosphide layer on the copper layer; and finally, form a silicon nitride layer on the copper phosphide layer. Herein, the copper phosphide layer is formed by a plasma enhanced chemical vapor deposition process. Therefore, any copper oxide layer that covers copper layer is replaced by the silicon phosphide layer and then adhesion between copper and silicon nitride is improved. Moreover, the silicon phosphide comprises two advantages: low resistance than copper oxide and efficiently prevent copper diffuses into surrounding dielectric layer.
摘要翻译：公开了一种提高铜和氮化硅之间粘附能力的方法。本发明方法包括以下步骤：首先提供衬底，然后在衬底上形成铜层; 第二，在铜层上形成磷化铜层; 最后在磷化铜层上形成氮化硅层。这里，通过等离子体增强化学气相沉积工艺形成磷化铜层。因此，覆盖铜层的任何铜氧化物层被磷化硅层代替，然后提高铜和氮化硅之间的粘附。此外，磷化硅具有两个优点：电阻低于铜氧化物，并有效地防止铜扩散到周围的电介质层。

77. 发明授权

US09971504B2 Management method of hybrid storage unit and electronic apparatus having the hybrid storage unit 有权
公开(公告)号：US09971504B2
公开(公告)日：2018-05-15
申请号：US14631870
申请日：2015-02-26
申请人： Chih-Chien Liu , Chun-Sheng Chen , Sheng-Hung Lee , Chin-Kuo Huang , Chin-Liang Hsu
发明人： Chih-Chien Liu , Chun-Sheng Chen , Sheng-Hung Lee , Chin-Kuo Huang , Chin-Liang Hsu
IPC分类号： G06F3/06
CPC分类号： G06F3/0604 , G06F3/0625 , G06F3/0634 , G06F3/0635 , G06F3/068 , Y02D10/154
摘要： A management method of a hybrid storage unit and an electronic apparatus of the hybrid storage unit are provided. The electronic apparatus includes a hybrid storage unit. The hybrid storage unit includes a first storage unit and a second storage unit. The second storage unit includes a first storage area and a second storage area. If a relationship between the electronic apparatus and an external apparatus is detected as being an undocked relationship, the first storage unit is disabled by a controller of the hybrid storage unit, and the second storage area serves to simulate and replace the first storage unit. The controller reports a storage unit status change notification to an operating system, so as to allow the operating system to re-enumerate the hybrid storage unit.

78. 发明授权

US09715267B2 Method for switching operating systems and electronic apparatus 有权
公开(公告)号：US09715267B2
公开(公告)日：2017-07-25
申请号：US14228269
申请日：2014-03-28
申请人： Chih-Chien Liu , Chun-Sheng Chen
发明人： Chih-Chien Liu , Chun-Sheng Chen
IPC分类号： G06F1/32 , G06F9/44
CPC分类号： G06F1/3234 , G06F9/4406 , G06F9/441 , G06F9/4418 , Y02D10/44
摘要： A method for switching operating systems and an electronic apparatus are provided. A first operating system (OS) is notified to enter a power saving mode when a switching signal is received in case of running the first OS. In the power saving mode, a first running data of the first OS is stored to a first dump area of a storage unit from a system memory, a second OS is loaded to the system memory such that the second OS enters a normal operating mode.

79. 发明授权

US09559189B2 Non-planar FET 有权
标题翻译：非平面FET
公开(公告)号：US09559189B2
公开(公告)日：2017-01-31
申请号：US13447286
申请日：2012-04-16
申请人： Chin-Cheng Chien , Chun-Yuan Wu , Chih-Chien Liu , Chin-Fu Lin , Chia-Lin Hsu
发明人： Chin-Cheng Chien , Chun-Yuan Wu , Chih-Chien Liu , Chin-Fu Lin , Chia-Lin Hsu
IPC分类号： H01L29/76 , H01L29/66 , H01L29/78 , H01L29/165
CPC分类号： H01L29/7853 , H01L29/0653 , H01L29/0847 , H01L29/165 , H01L29/66795
摘要： The present invention provides a non-planar FET which includes a substrate, a fin structure, a gate and a gate dielectric layer. The fin structure is disposed on the substrate. The fin structure includes a first portion adjacent to the substrate wherein the first portion shrinks towards a side of the substrate. The gate is disposed on the fin structure. The gate dielectric layer is disposed between the fin structure and the gate. The present invention further provides a method of manufacturing the non-planar FET.
摘要翻译：本发明提供一种非平面FET，其包括衬底，鳍结构，栅极和栅极电介质层。翅片结构设置在基板上。翅片结构包括与基底相邻的第一部分，其中第一部分朝向基底的一侧收缩。门设置在翅片结构上。栅介质层设置在鳍结构和栅极之间。本发明还提供了一种制造非平面FET的方法。

80. 发明授权

US08954805B2 Computer booting method and computer system 有权
标题翻译：计算机启动方法和计算机系统
公开(公告)号：US08954805B2
公开(公告)日：2015-02-10
申请号：US13450481
申请日：2012-04-19
申请人： Chih-Chien Liu , Feng-Hsun Chen , Chia-Tsung Cheng
发明人： Chih-Chien Liu , Feng-Hsun Chen , Chia-Tsung Cheng
IPC分类号： G06F11/00 , G06F9/44 , G06F9/445 , G06F11/22 , G06F11/07 , G06F11/14
CPC分类号： G06F9/4401 , G06F8/654 , G06F11/0748 , G06F11/0793 , G06F11/1417 , G06F11/2284
摘要： A computer booting method is provided for a computer system. The method comprises performing a power-on-self test. When the test result shows no error on the BIOS, a booting procedure is executed. When the test result shows the BIOS is damaged, whether the computer system stores a backup file of the BIOS is determined. When the computer system stores the backup file, the central processing unit reads the data of backup file and write it into a BIOS system memory and a reboot process is performed. When there is no backup file in the computer system, the computer system is connected to an internet server and downloads a BIOS backup file to the system main memory from the internet server. The central processing unit reads the BIOS backup file and write it into the BIOS system memory and a reboot process is formed.
摘要翻译：为计算机系统提供计算机引导方法。该方法包括执行上电自检。当测试结果显示BIOS没有错误时，执行启动过程。当测试结果显示BIOS损坏时，是否计算机系统存储BIOS的备份文件。当计算机系统存储备份文件时，中央处理单元读取备份文件的数据并将其写入BIOS系统存储器，并执行重新启动过程。当计算机系统中没有备份文件时，计算机系统连接到互联网服务器，并从互联网服务器将BIOS备份文件下载到系统主内存。中央处理单元读取BIOS备份文件并将其写入BIOS系统内存，并形成重启过程。

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