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71. 发明申请

WO2012015622A1 DIMMING MULTIPLE LIGHTING DEVICES BY ALTERNATING ENERGY TRANSFER FROM A MAGNETIC STORAGE ELEMENT 审中-公开
标题翻译：通过从磁性储存元件替代能量转移来调节多个照明装置
公开(公告)号：WO2012015622A1
公开(公告)日：2012-02-02
申请号：PCT/US2011/044415
申请日：2011-07-19
申请人： CIRRUS LOGIC, INC.
发明人： MELANSON, John, L. , MOKRY, Wesley, L.
IPC分类号： H02M1/36 , H05B33/08
CPC分类号： H05B33/0815 , H02M3/33523 , H05B33/0827 , Y02B20/346
摘要： A single magnetic storage element is used to provide power to multiple lighting devices, which may be strings of light-emitting diodes (LEDs) of different color. A switching circuit controls alternating application of energy among the multiple lighting devices and another switching circuit may charge the primary winding to different energy levels to control the intensity of the multiple lighting devices. In particular, the multiple lighting devices may be controlled to provide a desired color profile while dimming the lighting devices, while requiring only a single magnetic storage element for supplying energy to the lighting devices.
摘要翻译：单个磁存储元件用于向多个照明装置提供电力，这些照明装置可以是不同颜色的发光二极管（LED）串。开关电路控制多个照明装置之间的能量的交替施加，另一个开关电路可以将初级绕组充电到不同的能级以控制多个照明装置的强度。特别地，可以控制多个照明装置以在使照明装置调光的同时提供期望的颜色特征，同时仅需要单个磁存储元件来向照明装置提供能量。

72. 发明申请

WO2009158283A1 HYSTERETIC BUCK CONVERTER HAVING DYNAMIC THRESHOLDS 审中-公开
标题翻译：具有动态阈值的HYSTERETIC BUCK转换器
公开(公告)号：WO2009158283A1
公开(公告)日：2009-12-30
申请号：PCT/US2009/048016
申请日：2009-06-19
申请人： CIRRUS LOGIC, INC.
发明人： MELANSON, John, L. , DING, Lei
IPC分类号： H02M3/156
CPC分类号： H02M3/1563 , H02M2001/0019 , H02M2001/0032 , Y02B70/16
摘要： A hysteretic buck converter provides improved regulation control, in particular for buck converter standby operation. A comparison circuit (K1, K2) compares the output voltage (Vout) of the buck converter to a waveform (V Low ) that is generated from an indication (+V ILOAD ) of the output current of the converter, so that the turn-on time of the converter is advanced as the output current demand increases. The resulting action anticipates a reduction in output voltage (V out ) due to the increased current, preventing an excursion of the output voltage (V out ) below the ripple voltage minimum. The turn-off time of the converter is controlled by an upper threshold (V HIGH ) that limits the ripple voltage maximum. The output current indication may be a measurement of output current, or may be a dynamic value calculated from the input voltage (V in ) and the output voltage (V out ) waveform.
摘要翻译：迟滞降压转换器提供改进的调节控制，特别是对于降压转换器待机操作。比较电路（K1，K2）将降压转换器的输出电压（Vout）与从转换器的输出电流的指示（+ VILOAD）产生的波形（VLow）进行比较，使得导通时间的转换器随着输出电流需求的增加而提前。所产生的动作预期由于电流增加而导致的输出电压（Vout）的降低，从而防止输出电压（Vout）偏离纹波电压最小值。转换器的关断时间由限制纹波电压最大值的上阈值（VHIGH）控制。输出电流指示可以是输出电流的测量值，也可以是从输入电压（Vin）和输出电压（Vout）波形计算出的动态值。

73. 发明申请

WO2009137512A1 DELTA-SIGMA ANALOG-TO-DIGITAL CONVERTER CIRCUIT HAVING REDUCED SAMPLED REFERENCE NOISE 审中-公开
标题翻译：具有降低采样参考噪声的DELTA-SIGMA模拟到数字转换器电路
公开(公告)号：WO2009137512A1
公开(公告)日：2009-11-12
申请号：PCT/US2009/042890
申请日：2009-05-05
申请人： CIRRUS LOGIC, INC.
发明人： SCHNEIDER, Edmund M. , SWANSON, Eric J. , MELANSON, John, L.
IPC分类号： H03M3/04
CPC分类号： H03M3/428 , H03M3/368 , H03M3/414 , H03M3/456
摘要： A delta-sigma analog-to-digital converter (ADC) circuit improves performance by reducing the amount of noise and other error sampled by the reference switching circuit. The reference switching network is operated intermittently only when the charge on an input integrator exceeds a threshold, thereby preventing the input integrator from saturating, while avoiding needlessly injecting reference noise. The input to the ADC may be a current injected directly into a summing node of the integrator, or may be a voltage supplied through another switching network.
摘要翻译： Δ-Σ模数转换器（ADC）电路通过减少由参考开关电路采样的噪声和其他误差来提高性能。仅当输入积分器上的电荷超过阈值时，参考开关网络间歇运行，从而防止输入积分器饱和，同时避免不必要地注入参考噪声。 ADC的输入可以是直接注入到积分器的求和节点中的电流，或者可以是通过另一个交换网络提供的电压。

74. 发明申请

WO2009108603A1 TRANSFORMER-ISOLATED ANALOG-TO-DIGITAL CONVERTER (ADC) FEEDBACK APPARATUS AND METHOD 审中-公开
标题翻译：变换器分离的模拟数字转换器（ADC）反馈装置和方法
公开(公告)号：WO2009108603A1
公开(公告)日：2009-09-03
申请号：PCT/US2009/034868
申请日：2009-02-23
申请人： CIRRUS LOGIC, INC.
发明人： MELANSON, John, L.
IPC分类号： H03M1/08
CPC分类号： H03M3/41 , G01R31/2844 , H03K17/0822 , H03K17/691 , H03M3/466
摘要： A transformer-isolated analog-to-digital converter (ADC) feedback apparatus and method provides reduction of circuit complexity in high power/high voltage systems having a transformer-isolated sensing circuit. The feedback apparatus is a circuit including an ADC (41) for receiving an analog input signal (Vin) and a transformer (T3) having a first winding that receives a modulated output of the analog- to-digital converter. A second winding of the transformer provides an isolated data output of the ADC. A demodulator (31, 32) is coupled to the second winding of the transformer and.demodulates the isolated output to generate a digital representation (ADC out) of the analog input signal. The ADC may be a delta-sigma converter and the demodulator may be the corresponding decimation filter (32). The circuit further includes an isolation circuit (34, 35) for introducing a clock signal and/or power supply waveform at the second winding of the transformer, so that the ADC circuit is supplied with an isolated clock and/or an isolated power supply.
摘要翻译：变压器隔离的模数转换器（ADC）反馈装置和方法降低了具有变压器隔离感测电路的大功率/高压系统中的电路复杂性。反馈装置是包括用于接收模拟输入信号（Vin）的ADC（41）和具有接收模拟 - 数字转换器的调制输出的第一绕组的变压器（T3）的电路。变压器的第二个绕组提供了ADC的隔离数据输出。解调器（31,32）耦合到变压器的第二绕组，并且对隔离输出进行调制，以产生模拟输入信号的数字表示（ADC输出）。 ADC可以是Δ-Σ转换器，并且解调器可以是相应的抽取滤波器（32）。电路还包括用于在变压器的第二绕组处引入时钟信号和/或电源波形的隔离电路（34,35），使得ADC电路被提供有隔离时钟和/或隔离电源。

75. 发明申请

WO2009099867A1 SWITCH STATE CONTROLLER WITH A SENSE CURRENT GENERATED OPERATING VOLTAGE 审中-公开
标题翻译：开关状态控制器，具有感应电流产生的工作电压
公开(公告)号：WO2009099867A1
公开(公告)日：2009-08-13
申请号：PCT/US2009/032358
申请日：2009-01-29
申请人： CIRRUS LOGIC, INC.
发明人： MELANSON, John, L. , THOMPSON, Karl , NANDA, Kartik , GAETANO, Mauro
IPC分类号： H02M1/42
CPC分类号： H02J7/0054 , H02J2007/0059 , H02M3/33592 , Y02B40/90 , Y02B70/1475
摘要： A power supply system and method includes a switch state controller that is operational to control a switching power converter during certain power loss conditions that cause conventional switch state controllers to have diminished or no functionality. In at least one embodiment, during certain power loss conditions, such as when an auxiliary power supply is in standby mode or when the switching power converter is not operating, a power supply for the switch state controller does not provide sufficient operating power to the switch state controller during certain power loss conditions. In at least one embodiment, during such power loss conditions power is generated for the switch state controller using sense input and/or sense output currents of the switching power converter to allow an integrated circuit (IC) switch state controller to generate a control signal to control a switch of the switching power converter.
摘要翻译：电源系统和方法包括开关状态控制器，该开关状态控制器在导致常规开关状态控制器已经减小或没有功能的某些功率损耗条件下可操作以控制开关功率转换器。在至少一个实施例中，在某些功率损耗状态下，例如当辅助电源处于待机模式时或者当开关电源转换器不工作时，开关状态控制器的电源不能向开关提供足够的工作电力在某些功率损耗条件下状态控制器。在至少一个实施例中，在这种功率损耗状态期间，使用开关功率转换器的感测输入和/或感测输出电流为开关状态控制器产生功率，以允许集成电路（IC）开关状态控制器产生控制信号控制开关电源转换器的开关。

76. 发明申请

WO2009076329A1 HISTORY-INDEPENDENT NOISE-IMMUNE MODULATED TRANSFORMER-COUPLED GATE CONTROL SIGNALING METHOD AND APPARATUS 审中-公开
标题翻译：历史独立噪声调制变压器耦合门控信号方法与装置
公开(公告)号：WO2009076329A1
公开(公告)日：2009-06-18
申请号：PCT/US2008/086003
申请日：2008-12-09
申请人： CIRRUS LOGIC, INC.
发明人： MELANSON, John, L.
IPC分类号： H03K17/691 , H03K17/0812
CPC分类号： H03K17/691 , H03K17/08128
摘要： A hi story-independent and noise-immune modulated transformer-coupled gate control signaling method and apparatus provides robust design characteristics. A modulated control signal at a rate substantially higher than the switching circuit gate control rate is provided from the controller circuit to a demodulator via transformer coupling. Codes 1 are assigned to gate-on and gate-off timing events that control the switching transistor gate(s) and unassigned patterns are decoded as gate-off events, reducing the possibility that a switching transistor will be erroneously activated due to noise. The modulated signal is constructed so that signal history is not reguired for decoding, eliminating any reguirement of a reference clock.
摘要翻译： hi故事独立和噪声免疫调制的变压器耦合门控信号方法和装置提供了强大的设计特性。通过变压器耦合，从控制器电路向解调器提供基本上高于开关电路门控制速率的调制控制信号。代码1被分配给控制开关晶体管栅极和未分配图案的栅极导通和栅极截止定时事件被解码为栅极关闭事件，从而降低开关晶体管由于噪声而被错误地激活的可能性。调制信号被构造成使信号历史不被用于解码，消除了对参考时钟的任何限制。

77. 发明申请

WO2008137654A1 SYSTEM AND METHOD WITH INDUCTOR FLYBACK DETECTION USING SWITCH GATE CHARGE CHARACTERISTIC DETECTION 审中-公开
标题翻译：使用开关门充电特性检测的电感器检测的系统和方法
公开(公告)号：WO2008137654A1
公开(公告)日：2008-11-13
申请号：PCT/US2008/062381
申请日：2008-05-02
申请人： CIRRUS LOGIC, INC.
发明人： MELANSON, John, L.
IPC分类号： H02M1/42 , H02M1/08 , H03K5/153
CPC分类号： H02M1/4225 , H03M3/476 , Y02B70/126 , Y02P80/112
摘要： A method and system (300) monitor gate charge characteristics of one or more field effect transistors (108) in a switching power converter (302) to detect an end of an inductor flyback time interval. The switching power converter (302) includes a switch (108) coupled to an inductor (304) to control current flow (IL) in the inductor (304). When the switch (108) turns OFF, a collapsing magnetic field causes the inductor current (IL) to decrease and the inductor voltage to reverse polarity. When the magnetic field completely collapses, the inductor current (IL) goes to zero. At the end of the inductor flyback time interval, a voltage is induced across a Miller capacitance (312) of the switch (108). The voltage can be detected as a transient change in the gate voltage (Vgo) of the switch (108). A switch gate sensor (310) detects the gate voltage change associated with the end of the inductor flyback time interval and provides a signal (GS) indicating an end of the inductor flyback time interval.
摘要翻译：方法和系统（300）监视开关功率转换器（302）中的一个或多个场效应晶体管（108）的栅极电荷特性，以检测电感器反激时间间隔的结束。开关功率转换器（302）包括耦合到电感器（304）以控制电感器（304）中的电流（IL）的开关（108）。当开关（108）关闭时，塌陷磁场会使电感电流（IL）减小，电感电压反向极性。当磁场完全崩溃时，电感电流（IL）变为零。在电感器回扫时间间隔结束时，跨越开关（108）的米勒电容（312）感应出电压。可以将电压检测为开关（108）的栅极电压（Vgo）的瞬时变化。开关栅极传感器（310）检测与电感器回扫时间间隔结束相关联的栅极电压变化，并提供指示电感器反激时间间隔结束的信号（GS）。

78. 发明申请

WO2008005151A2 DIGITAL NON-INTEGER SAMPLE/HOLD IMPLEMENTED USING VIRTUAL FILTERING 审中-公开
标题翻译：使用虚拟过滤实现的数字非整数样本/保持
公开(公告)号：WO2008005151A2
公开(公告)日：2008-01-10
申请号：PCT/US2007/013608
申请日：2007-06-08
申请人： CIRRUS LOGIC, INC.
发明人： DING, Lei , MELANSON, John, L. , FEI, Xiaofan , DUEWER, Bruce
CPC分类号： H03H17/0685 , H03H17/0275 , H03H17/0614
摘要： A method and apparatus for implementing non-integer sample hold operations in a sigma-delta digital-to-analog converter system includes an interpolation filter, a polyphase filter circuit, and a modulator. The polyphase filter circuit is used to virtual upsample a digital input signal by a predetermined non-integer upsample ratio of a relatively large number. The polyphase filter circuit is formed of a long zero-order hold and a short FIR filter so that only several branches associated with the polyphase filter circuit corresponding to output samples immediately after a transition of the digital input signal is required to be calculated., thereby reducing the need to store a large number of filter coefficients and eliminating complex computations.
摘要翻译：用于在Σ-Δ数模转换器系统中实现非整数采样保持操作的方法和装置包括内插滤波器，多相滤波器电路和调制器。多相滤波器电路用于以相对较大数量的预定非整数上采样比虚拟上采样数字输入信号。多相滤波器电路由长零级保持和短FIR滤波器形成，使得仅需要计算与数字输入信号转换之后立即对应于输出采样的多相滤波器电路相关联的多个分支，由此减少了存储大量滤波器系数的需要，并消除了复杂的计算。

79. 发明申请

WO2005074142A1 LOOK-AHEAD DELTA SIGMA MODULATOR WITH QUANTIZATION USING NATURAL PATTERN LOOP FILTER RESPONSES 审中-公开
标题翻译：使用自然图案循环滤波器响应的LEAE DELTA SIGMA调制器与量化
公开(公告)号：WO2005074142A1
公开(公告)日：2005-08-11
申请号：PCT/US2005/001094
申请日：2005-01-13
申请人： CIRRUS LOGIC, INC.
发明人： MELANSON, John, L.
IPC分类号： H03M7/00
CPC分类号： H03M7/3011
摘要： A look-ahead delta sigma modulator reduces and simplifies the computations used to generate quantizer output values. Superposition can be applied to a loop filter response of the look-ahead delta sigma modulator. By superposition, the complete loop filter response for each output candidate vector equals the difference between a forced pattern response and a natural input signal response. The forced pattern response of the loop filter can be determined from the response to each output candidate vector with an input signal set to zero and loop filter state variables initially set to zero when determining the loop filter response for each output candidate vector. The natural input signal response of the loop filter can be determined from the response to each input signal vector with feedback data set to zero. The forced pattern response is independent of the output signal data and can be determined once for all input signal vectors x t . The natural input signal rsponse is independent of the feedback data and, therefore, need only be determined once for each output data value.
摘要翻译：先行的delta-Σ调制器减少并简化了用于产生量化器输出值的计算。叠加可以应用于前瞻delta-Σ调制器的环路滤波器响应。通过叠加，每个输出候选矢量的完整环路滤波器响应等于强制模式响应和自然输入信号响应之间的差异。环路滤波器的强制模式响应可以从输入信号设置为零的每个输出候选矢量的响应确定，并且当确定每个输出候选矢量的环路滤波器响应时，环路滤波器状态变量初始设置为零。环路滤波器的自然输入信号响应可以从反馈数据设置为零的每个输入信号矢量的响应确定。强制模式响应与输出信号数据无关，可以为所有输入信号向量xt确定一次。自然输入信号响应与反馈数据无关，因此，仅需为每个输出数据值确定一次。

80. 发明授权

EP2313965B1 POWER SUPPLY WITH ACCURATE ENERGY MEASUREMENT 有权
标题翻译：具有精确的能量测量用电源
公开(公告)号：EP2313965B1
公开(公告)日：2017-01-18
申请号：EP09800820.4
申请日：2009-07-16
申请人： Cirrus Logic, Inc.
发明人： MELANSON, John, L.
IPC分类号： H02M5/42 , H02M1/42
CPC分类号： H01F38/02 , H01F3/10 , H01F3/14 , H01F38/08 , H01F2038/026 , H02M1/42 , H02M2001/0032 , Y02B70/12 , Y02B70/16

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