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    • 71. 发明授权
    • Thin film transistor array panel for a liquid crystal display and methods for manufacturing the same
    • 一种用于液晶显示器的薄膜晶体管阵列面板及其制造方法
    • US07190421B2
    • 2007-03-13
    • US10660749
    • 2003-09-12
    • Mun-Pyo HongWan-Shick HongSang-Il KimSoo-Guy RhoJin-Kyu KangSnag-Gab Kim
    • Mun-Pyo HongWan-Shick HongSang-Il KimSoo-Guy RhoJin-Kyu KangSnag-Gab Kim
    • G02F1/136G02F1/1335G02F1/1333
    • G02F1/136227G02F1/136209G02F1/136286G02F2001/136222H01L27/12H01L27/1255H01L27/1288H01L29/42384H01L29/4908
    • A black matrix having an opening at pixels of a matrix array in a display area, a common wire including common pads and common signal lines, and gate pads in a peripheral area, and an alignment key in outer area to align interlayer thin films are formed on an insulating substrate. Red, blue and green color filters the edge of which overlap the black matrix are formed at the pixels on the insulating substrate, and an organic insulating layer covering the black matrix and the color filters and having a contact hole exposing the gate pad is formed thereon. A gate wire including a gate line connected to the gate pad through the contact hole and a gate electrode connected to the gate line is formed on the organic insulating layer, and a gate insulating layer covering the gate wire is formed on the organic insulating layer. A semiconductor pattern and ohmic contact layers are sequentially formed on the gate insulating layer of the gate electrode. A data wire including a source electrode and a drain electrode that are made of a same layer on the ohmic contact layers and separated from each other, and a data line connected to the source electrode and defining the pixels of a matrix array by crossing the gate line is formed on the gate insulating layer. A passivation layer covering the data wire and having contact holes exposing the gate pad and the data pad is formed, and a pixel wire including a pixel electrode, a redundant gate pad, a redundant data pad that are respectively connected to the drain electrode, the gate pad and the data pad through the contact holes.
    • 形成在显示区域中具有矩阵阵列的像素的开口的黑矩阵,包括公共焊盘和公共信号线的公共线,以及外围区域中的栅极焊盘以及外部区域中的对准键来对准层间薄膜 在绝缘基板上。 在绝缘基板上的像素处形成与黑矩阵重叠的边缘的红色,蓝色和绿色滤色片,并且在其上形成覆盖黑矩阵和滤色器并且具有暴露栅极接触孔的接触孔的有机绝缘层 。 在有机绝缘层上形成包括通过接触孔连接到栅极焊盘的栅极线和连接到栅极线的栅极的栅极线,并且在有机绝缘层上形成覆盖栅极线的栅极绝缘层。 半导体图案和欧姆接触层依次形成在栅电极的栅极绝缘层上。 一种数据线,包括在欧姆接触层上由相同层制成并彼此分离的源电极和漏电极,以及连接到源电极并通过跨越栅极定义矩阵阵列的像素的数据线 线形成在栅极绝缘层上。 形成覆盖数据线并具有露出栅极焊盘和数据焊盘的接触孔的钝化层,并且包括分别连接到漏电极的像素电极,冗余栅极焊盘,冗余数据焊盘的像素线, 栅极焊盘和数据焊盘通过接触孔。
    • 74. 发明申请
    • Transreflective liquid crystal display
    • 半透射液晶显示器
    • US20060221277A1
    • 2006-10-05
    • US11393038
    • 2006-03-30
    • Young-Chol YangJeong--Ye ChoiJae-Hyuk ChangMun-Pyo Hong
    • Young-Chol YangJeong--Ye ChoiJae-Hyuk ChangMun-Pyo Hong
    • G02F1/1335
    • G02F1/133555G02F1/136213
    • A transreflective LCD includes a plurality of pixels arranged in a matrix, each including a switching element, a backlight for supplying light to the pixels, and first, second, third, and fourth capacitors which are individually connected to output terminals of the switching elements. Each pixel includes a transmissive area for transmitting light from the backlight, and a first reflective area and a second reflective area for reflecting light originating from the exterior environment. In this way, the reflective area is divided into two areas and the auxiliary capacitor is provided in one area of the two. The gamma curves of the transmissive mode and the reflective mode can meet together at a curve by controlling the dimension ratio and the voltage ratio of the two areas. In this way, color display showing uniform color sense can be realized without regard to changes in mode.
    • 透反射LCD包括以矩阵形式布置的多个像素,每个像素包括开关元件,用于向像素供应光的背光以及分别连接到开关元件的输出端的第一,第二,第三和第四电容器。 每个像素包括用于透射来自背光的光的透射区域和用于反射源自外部环境的光的第一反射区域和第二反射区域。 以这种方式,反射区域被分成两个区域,辅助电容器设置在两个区域中。 通过控制两个区域的尺寸比和电压比,透射模式和反射模式的伽马曲线可以一起在曲线上相遇。 以这种方式,可以在不考虑模式变化的情况下实现显示均匀色彩感的彩色显示。
    • 77. 发明授权
    • Thin film transistor array substrate for liquid crystal display and method of fabricating the same
    • 用于液晶显示器的薄膜晶体管阵列基板及其制造方法
    • US07005670B2
    • 2006-02-28
    • US11167155
    • 2005-06-28
    • Sang-Gab KimMun-Pyo Hong
    • Sang-Gab KimMun-Pyo Hong
    • H01L29/06H01L27/01
    • H01L29/66765G02F2001/13629H01L27/124H01L29/456H01L29/4908
    • In a method of fabricating a thin film transistor array substrate, an aluminum-based conductive layer is deposited onto an insulating substrate, and patterned to form a gate line assembly. The gate line assembly includes gate lines, gate electrodes, and gate pads. A gate insulating layer is formed on the substrate with the gate line assembly. A semiconductor layer, and an ohmic contact layer are sequentially formed on the gate insulating layer. A double-layered conductive film with a chrome-based under-layer and an aluminum-based over-layer is deposited onto the substrate, and patterned to form a data line assembly. The data line assembly includes data lines crossing over the gate lines, source electrodes, drain electrodes, and data pads. The chrome-based under-layer of the conductive film is patterned through dry etching while using Cl2 or HCl as the dry etching gas. A protective layer is deposited onto the substrate, and patterned to thereby form contact holes exposing the drain electrodes, the gate pads, and the data pads. Indium zinc oxide is deposited onto the substrate, and patterned to thereby form pixel electrodes connected to the drain electrodes through the corresponding contact holes, and subsidiary gate and data pads connected to the gate and data pads through the corresponding contact holes.
    • 在制造薄膜晶体管阵列基板的方法中,将铝基导电层沉积到绝缘基板上,并被图案化以形成栅极线组件。 栅极线组件包括栅极线,栅电极和栅极焊盘。 在栅极线组件的基板上形成栅极绝缘层。 半导体层和欧姆接触层依次形成在栅绝缘层上。 将具有铬基底层和铝基超层的双层导电膜沉积到衬底上,并被图案化以形成数据线组件。 数据线组件包括跨越栅极线,源电极,漏电极和数据焊盘的数据线。 通过干蚀刻将导电膜的铬基底层图案化,同时使用Cl 2/2或HCl作为干蚀刻气体。 保护层沉积到衬底上,并被图案化,从而形成露出漏电极,栅极焊盘和数据焊盘的接触孔。 将铟锌氧化物沉积在衬底上,并被图案化,从而通过相应的接触孔形成连接到漏电极的像素电极,以及通过对应的接触孔连接到栅极和数据焊盘的辅助栅极和数据焊盘。
    • 79. 发明授权
    • Thin film transistor array panel
    • 薄膜晶体管阵列面板
    • US06943367B2
    • 2005-09-13
    • US10395233
    • 2003-03-25
    • Sang-Gab KimMun-Pyo Hong
    • Sang-Gab KimMun-Pyo Hong
    • G02F1/1368G02F1/136H01L21/3205H01L21/3213H01L21/336H01L21/768H01L21/77H01L21/84H01L23/52H01L27/12H01L29/45H01L29/49H01L29/786H01L29/06H01L27/01
    • H01L29/66765G02F2001/13629H01L27/124H01L29/456H01L29/4908
    • In a method of fabricating a thin film transistor array substrate, an aluminum-based conductive layer is deposited onto an insulating substrate, and patterned to form a gate line assembly. The gate line assembly includes gate lines, gate electrodes, and gate pads. A gate insulating layer is formed on the substrate with the gate line assembly. A semiconductor layer, and an ohmic contact layer are sequentially formed on the gate insulating layer. A double-layered conductive film with a chrome-based under-layer and an aluminum-based over-layer is deposited onto the substrate, and patterned to form a data line assembly. The data line assembly includes data lines crossing over the gate lines, source electrodes, drain electrodes, and data pads. The chrome-based under-layer of the conductive film is patterned through dry etching while using Cl2 or HCl as the dry etching gas. A protective layer is deposited onto the substrate, and patterned to thereby form contact holes exposing the drain electrodes, the gate pads, and the data pads. Indium zinc oxide is deposited onto the substrate, and patterned to thereby form pixel electrodes connected to the drain electrodes through the corresponding contact holes, and subsidiary gate and data pads connected to the gate and data pads through the corresponding contact holes.
    • 在制造薄膜晶体管阵列基板的方法中,将铝基导电层沉积到绝缘基板上,并被图案化以形成栅极线组件。 栅极线组件包括栅极线,栅电极和栅极焊盘。 在栅极线组件的基板上形成栅极绝缘层。 半导体层和欧姆接触层依次形成在栅绝缘层上。 将具有铬基底层和铝基超层的双层导电膜沉积到衬底上,并被图案化以形成数据线组件。 数据线组件包括跨越栅极线,源电极,漏电极和数据焊盘的数据线。 通过干蚀刻将导电膜的铬基底层图案化,同时使用Cl 2/2或HCl作为干蚀刻气体。 保护层沉积到衬底上,并被图案化,从而形成露出漏电极,栅极焊盘和数据焊盘的接触孔。 将铟锌氧化物沉积在衬底上,并被图案化,从而通过相应的接触孔形成连接到漏电极的像素电极,以及通过对应的接触孔连接到栅极和数据焊盘的辅助栅极和数据焊盘。
    • 80. 发明授权
    • Liquid crystal display
    • 液晶显示器
    • US06850294B2
    • 2005-02-01
    • US10469848
    • 2002-02-25
    • Nam-Seok RohMun-Pyo HongChong-Chul ChaiSoo-Guy Rho
    • Nam-Seok RohMun-Pyo HongChong-Chul ChaiSoo-Guy Rho
    • G02F1/13357G02F1/133G02F1/1335G02F1/1343G02F1/1345G02F1/1368
    • G02F1/133514G02F2201/52G09G3/3614
    • Pixels of red, blue and green are sequentially arranged in the row. The red and green pixels are alternately arranged in the column while the blue pixels being repeatedly arranged in the column. The four red and green pixels surrounding the two blue pixels at the two neighboring pixel rows face each other around the blue pixels. Gate lines are arranged at the respective rows to transmit scanning signals. Data lines cross over the gate lines in an insulating manner, and are arranged at the respective columns to transmit picture signals. Pixel electrodes and thin film transistor are formed at respective pixels. The blue pixel has the same area as or an area smaller than the red and green pixels. The pixel electrodes are overlapped with the gate or the data lines via a passivation layer of low dielectric organic material or an insulating material such as SiOC, SiOF.
    • 红色,蓝色和绿色的像素依次排列在行中。 红色和绿色像素交替排列在列中,而蓝色像素被重复排列在列中。 围绕两个相邻像素行的两个蓝色像素的四个红色和绿色像素围绕蓝色像素彼此面对。 栅极线被布置在相应的行以发射扫描信号。 数据线以绝缘方式跨越栅极线,并且布置在各列处以传输图像信号。 像素电极和薄膜晶体管形成在各个像素处。 蓝色像素具有与红色和绿色像素相同的面积或更小的面积。 像素电极经由低介电有机材料的钝化层或绝缘材料如SiOC,SiOF与栅极或数据线重叠。