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    • 74. 发明申请
    • METHOD AND SYSTEM FOR LEVEL DETECTOR CALIBRATION FOR ACCURATE TRANSMIT POWER CONTROL
    • 用于精确发射功率控制的电平检测器校准的方法和系统
    • US20080139145A1
    • 2008-06-12
    • US11618832
    • 2006-12-31
    • Arya Behzad
    • Arya Behzad
    • H01Q11/12
    • H03G3/3042H03F3/45183H04B17/13H04B2001/0416H04W52/52
    • Methods and systems for level detector calibration are disclosed and may comprise calibrating a level detector integrated on-chip to eliminate an associated zero input offset voltage utilizing a replica bias circuit with no input ac voltage at the level detector or the replica bias circuit. The offset voltages of the level detector and the replica bias circuit may be combined to eliminate the associated zero input offset voltage of the level detector. The output signal may be generated by a difference of output signals from the level detector and the replica bias circuit. The level detector and the replica bias circuit may be biased utilizing a similar bias voltage. A plurality of known input voltages may be utilized to generate a corresponding plurality of output voltages of the level detector, generating a corrected transfer function that may be used to accurately set a transmitter power level.
    • 公开了用于电平检测器校准的方法和系统,并且可以包括校准集成在片上的电平检测器,以利用在电平检测器或复制偏置电路处没有输入交流电压的复制偏置电路来消除相关的零输入偏移电压。 可以组合电平检测器和复制偏置电路的偏移电压以消除电平检测器的相关联的零输入偏移电压。 输出信号可以由来自电平检测器和复制偏置电路的输出信号的差产生。 电平检测器和复制偏置电路可以利用类似的偏置电压来偏置。 可以利用多个已知的输入电压来产生电平检测器的对应的多个输出电压,产生校正的传递函数,该传递函数可用于精确地设定发射机功率电平。
    • 78. 发明申请
    • METHOD AND SYSTEM FOR DOUBLING PHASE-FREQUENCY DETECTOR COMPARISON FREQUENCY FOR A FRACTIONAL-N PLL
    • 用于分段N频PLL的相位检波器比较频率的方法和系统
    • US20080136468A1
    • 2008-06-12
    • US11618655
    • 2006-12-29
    • Dandan LiArya Behzad
    • Dandan LiArya Behzad
    • H03B19/00
    • H03D13/004H03L7/093H03L7/1976
    • Aspects of a method and system for signal processing are disclosed and may include using a frequency doubler to double the frequency of a reference signal utilized by a phase-frequency detector (PFD) in a fractional-N phase-locked-loop (PLL) synthesizer. Detecting and correcting a digital reference signal connected to the input of the frequency doubler. The digital reference signal may be generated by amplifying the difference between a low slew-rate reference signal and a reference voltage through a comparator. The reference voltage signal may be generated based on the detected duty-cycle of the digital reference signal. The duty-cycle of the digital reference signal may be adjusted by varying the generated reference voltage signal. The reference voltage may be generated by using difference of DC level of the digital reference signal and half rail. The reference voltage signal may be generated using a voltage digital-to-analog converter (DAC).
    • 公开了用于信号处理的方法和系统的方面,并且可以包括使用倍频器将分频N锁相环(PLL)合成器中的相位 - 频率检测器(PFD)所使用的参考信号的频率加倍 。 检测和校正连接到倍频器输入端的数字参考信号。 数字参考信号可以通过比较器放大低压摆率参考信号和参考电压之间的差来产生。 可以基于检测到的数字参考信号的占空比来产生参考电压信号。 可以通过改变所产生的参考电压信号来调整数字参考信号的占空比。 可以通过使用数字参考信号和半导轨的直流电平的差异来产生参考电压。 参考电压信号可以使用电压数模转换器(DAC)产生。
    • 80. 发明申请
    • RF transceiver with compact stacker mixer design for multiple frequency conversion
    • RF收发器采用紧凑型堆垛机混频器设计,可实现多种频率转换
    • US20070243848A1
    • 2007-10-18
    • US11820359
    • 2007-06-19
    • Arya Behzad
    • Arya Behzad
    • H04B1/38
    • H03D7/163H03D7/1441H03D7/1458H03D7/1483H03D2200/0043H03D2200/0084H04B1/18H04B1/28H04B1/40
    • A single chip radio transceiver includes circuitry that enables received wideband RF signals to be down-converted to baseband frequencies and baseband signals to be up-converted to wideband RF signals prior to transmission without requiring conversion to an intermediate frequency. The circuitry includes a low noise amplifier, automatic frequency control circuitry for aligning a local oscillation frequency with the frequency of the received RF signals, signal power measuring circuitry for measuring the signal to signal and power ratio and for adjusting frontal and rear amplification stages accordingly, and finally, filtering circuitry to filter high and low frequency interfering signals including DC offset. The circuitry further includes a multi-stage mixer that produces current signal outputs from each mixing stage to a subsequent stage thereby avoiding a need for intermediate transconductance and output stages to convert between current signals and voltage signals.
    • 单芯片无线电收发器包括使接收的宽带RF信号下变频到基带频率的电路,并且基带信号在传输之前被上变频到宽带RF信号,而不需要转换到中频。 该电路包括一个低噪声放大器,用于使本地振荡频率与接收到的RF信号的频率对准的自动频率控制电路,用于测量信号与信号和功率比的信号功率测量电路,以及相应地调整正面和后置放大级, 最后,滤波电路来滤除高频和低频干扰信号,包括直流偏移。 该电路还包括多级混频器,其从每个混频级产生到后一级的电流信号输出,从而避免需要中间跨导和输出级以在电流信号和电压信号之间转换。