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71. 发明申请

US20110251319A1 DIELECTRIC PASTE COMPOSITION, METHOD OF FORMING DIELECTRIC LAYER, DIELECTRIC LAYER, AND DEVICE INCLUDING THE DIELECTRIC LAYER 有权
标题翻译：电介质组合物，形成介电层的方法，介电层和包括介电层的器件
公开(公告)号：US20110251319A1
公开(公告)日：2011-10-13
申请号：US13040103
申请日：2011-03-03
申请人： Sun-jin SONG , Jin-young KIM , Shang-hyeun PARK , Min-jong BAE , Tae-won JEONG
发明人： Sun-jin SONG , Jin-young KIM , Shang-hyeun PARK , Min-jong BAE , Tae-won JEONG
IPC分类号： C08K5/20 , B05D5/00 , B05D3/02 , C08K3/22 , B05D3/00
CPC分类号： H01B3/30 , C08K5/02 , C08L5/00
摘要： A dielectric paste composition including: a plurality of inorganic dielectric particles, a binder, a solvent, and a halogenated hydrocarbon. Also disclosed is a method of forming a dielectric layer, a dielectric layer, and a device including the dielectric layer.
摘要翻译：一种电介质糊剂组合物，包括：多种无机介电颗粒，粘合剂，溶剂和卤代烃。还公开了形成电介质层，电介质层和包括电介质层的器件的方法。

72. 发明申请

US20110212557A1 METHOD OF MANUFACTURING AN ARRAY SUBSTRATE FOR LCD DEVICE HAVING DOUBLE-LAYERED METAL STRUCTURE 有权
标题翻译：具有双层金属结构的液晶显示装置制造阵列基板的方法
公开(公告)号：US20110212557A1
公开(公告)日：2011-09-01
申请号：US13100883
申请日：2011-05-04
申请人： Won-Ho CHO , Gyoo-Chul Jo , Gue-Tai Lee , Jin-Gyu Kang , Beung-Hwa Jeong , Jin-Young Kim
发明人： Won-Ho CHO , Gyoo-Chul Jo , Gue-Tai Lee , Jin-Gyu Kang , Beung-Hwa Jeong , Jin-Young Kim
IPC分类号： H01L33/62
CPC分类号： G02F1/136286 , G02F2001/13629 , G02F2001/136295
摘要： The present invention is an array substrate for use in a liquid crystal display device, which includes a gate electrode, a gate line and a gate pad on a substrate, wherein the gate electrode, the gate line and the gate pad have a double-layered structure consisting of a first metal layer and a first barrier metal layer in series from the substrate, and wherein the first metal is one of aluminum and aluminum alloy; a gate insulation layer on the substrate covering the gate electrode, gate line and gate pad; an active layer and an ohmic contact layer sequentially formed on the gate insulation layer and over the gate electrode; a data line on the gate insulation layer perpendicularly crossing the gate line, source and drain electrodes contacting the ohmic contact layer, and a data pad on the gate insulation layer, wherein the data line, the source and drain electrode and the data pad have a double-layered structure consisting of a second barrier metal layer and a second metal layer of copper; a passivation layer formed on the gate insulation layer to cover the data line, source and drain electrodes, and data pad, wherein the passivation layer has a drain contact hole exposing a portion of the drain electrode, a gate pad contact hole exposing a portion of the gate pad, and a data pad contact hole exposing a portion of the data pad; and a pixel electrode, a gate pad terminal and a data pad terminal on the passivation layer, all of which are formed of a transparent conductive material on the passivation layer.
摘要翻译：本发明是一种用于液晶显示装置的阵列基板，其包括在基板上的栅电极，栅极线和栅极焊盘，其中栅电极，栅极线和栅极焊盘具有双层结构由第一金属层和与基板串联的第一阻挡金属层组成，其中第一金属是铝和铝合金之一; 覆盖栅电极，栅极线和栅极焊盘的基板上的栅极绝缘层; 依次形成在栅极绝缘层上和栅电极上的有源层和欧姆接触层; 垂直于栅极线的栅极绝缘层上的数据线，与欧姆接触层接触的源极和漏极以及栅极绝缘层上的数据焊盘，其中数据线，源极和漏极以及数据焊盘具有由第二阻挡金属层和铜的第二金属层组成的双层结构; 形成在所述栅极绝缘层上以覆盖所述数据线，源极和漏极以及数据焊盘的钝化层，其中所述钝化层具有暴露所述漏电极的一部分的漏极接触孔，栅极焊盘和暴露数据焊盘的一部分的数据焊盘接触孔; 以及钝化层上的像素电极，栅极焊盘端子和数据焊盘端子，所有这些都由钝化层上的透明导电材料形成。

73. 发明申请

US20110171607A1 BIOPULP 审中-公开
公开(公告)号：US20110171607A1
公开(公告)日：2011-07-14
申请号：US12739902
申请日：2008-10-23
申请人： Jeremy J. Mao , Eduardo K. Moioli , Jin Young Kim
发明人： Jeremy J. Mao , Eduardo K. Moioli , Jin Young Kim
IPC分类号： A61C5/02 , A61K38/18 , A61P25/00 , A61P19/08
CPC分类号： A61K6/0067 , A61C5/50 , A61K6/0038 , C08L7/00 , A61K6/083 , C08L23/20
摘要： Provided are methods for performing a dental, endodontic or root canal procedure on a mammalian tooth in need thereof. Also provided are matrices, materials or scaffolds suitable for insertion into a tooth pulp chamber. Additionally provided are uses of any of the above matrix, material or scaffolds in a dental, endodontic or root canal procedure. Further provided are uses of any of the above matrices, materials or scaffolds for the manufacture of a medicament for a dental, endodontic or root canal procedure.
摘要翻译：提供了在有需要的哺乳动物牙齿上进行牙齿，牙根管或根管手术的方法。还提供了适合于插入牙髓腔室的基质，材料或支架。另外提供了牙科，根管或根管手术中任何上述基质，材料或支架的用途。还提供了任何上述基质，材料或支架用于制造用于牙齿，根管或根管手术的药物的用途。

74. 发明授权

US07911140B2 Plasma display panel with porous panel 失效
标题翻译：带多孔面板的等离子显示面板
公开(公告)号：US07911140B2
公开(公告)日：2011-03-22
申请号：US12230024
申请日：2008-08-21
申请人： Jae Hong Jun , Jin Young Kim , Yong Song , Deok Seo Kim , Won Tae Kim , Chul Hwan Lee , Hae Young Jung
发明人： Jae Hong Jun , Jin Young Kim , Yong Song , Deok Seo Kim , Won Tae Kim , Chul Hwan Lee , Hae Young Jung
IPC分类号： H01J17/49
CPC分类号： H05K7/20963 , H01J2217/492
摘要： A plasma display panel adapted to minimize noise/vibration as well as a heat generated therefrom. In the plasma display panel, a display panel displays a picture while a porous pad is provided behind the display panel to prevent the transfer of noise/vibration to an associated heat proof panel. When the PDP is mounted within a case, a second porous pad can be provided on an inner surface of the case opposite the display panel and adjacent to an associated printed circuit board for additional noise/vibration damping.
摘要翻译：等离子体显示面板适于最小化噪音/振动以及由此产生的热量。在等离子体显示面板中，显示面板显示图像，同时在显示面板后面设置多孔垫以防止噪声/振动传递到相关的防热面板。当PDP安装在壳体内时，第二多孔垫可以设置在与显示面板相对的壳体的内表面上并且邻近相关的印刷电路板，用于额外的噪声/振动阻尼。

75. 发明授权

US07883838B2 Organometallic composition for forming a metal alloy pattern and a method of forming such a pattern using the composition 有权
标题翻译：用于形成金属合金图案的有机金属组合物和使用该组合物形成这种图案的方法
公开(公告)号：US07883838B2
公开(公告)日：2011-02-08
申请号：US10718809
申请日：2003-11-24
申请人： Jin Young Kim , Soon Taik Hwang , Young Hun Byun , Euk Che Hwang , Sang Yoon Lee
发明人： Jin Young Kim , Soon Taik Hwang , Young Hun Byun , Euk Che Hwang , Sang Yoon Lee
IPC分类号： B01J31/12 , C08F4/42
CPC分类号： G03F7/0043 , G03F7/0042
摘要： An organometallic composition containing an organometallic compound (I) containing Ag, an organometallic compound (II) containing Au, Pd, or Ru, and an organometallic compound (III) containing Ti, Ta, Cr, Mo, Ru, Ni, Pd, Cu, Au, or Al, wherein the metal components of organometallic compounds (II) and (III), respectively, are present in an amount of 0.01˜10 mol % based on the amount of Ag in the organometallic compound (I), and a method of forming a metal alloy pattern using the same. Silver alloy patterns can be obtained through a simplified manufacturing process, which patterns have enhanced heat resistance, adhesiveness and chemical stability. The method may be applied to making a reflective film for LCD and metal wiring (gate, source, drain electrode) for flexible displays or flat panel displays, and further to CMP-free damascene processing and PR-free ITO film deposition.
摘要翻译：含有含Ag的有机金属化合物（I），含有Au，Pd或Ru的有机金属化合物（II）和含有Ti，Ta，Cr，Mo，Ru，Ni，Pd，Cu的有机金属化合物（III）的有机金属组合物，Au或Al，其中有机金属化合物（II）和（III）的金属组分分别以有机金属化合物（I）中的Ag的量为0.01〜10摩尔％，和使用其形成金属合金图案的方法。可以通过简化的制造工艺获得银合金图案，该图案具有增强的耐热性，粘合性和化学稳定性。该方法可以应用于制造用于LCD和用于柔性显示器或平板显示器的LCD和金属布线（栅极，源极，漏极）的反射膜，并且还可用于制造无CMP的镶嵌加工和无PR的ITO膜沉积。

76. 发明申请

US20100294369A1 DYE-SENSITIZED PHOTOVOLTAIC CELL 审中-公开
标题翻译：感光敏感细胞
公开(公告)号：US20100294369A1
公开(公告)日：2010-11-25
申请号：US12795000
申请日：2010-06-07
申请人： Jin Young Kim , Chan Ho Pak , Sang Hoon Joo , Sang Cheol Park , Sung Hen Cho , Ki Young Song , Chang Ho Noh
发明人： Jin Young Kim , Chan Ho Pak , Sang Hoon Joo , Sang Cheol Park , Sung Hen Cho , Ki Young Song , Chang Ho Noh
IPC分类号： H01L31/0256
CPC分类号： H01G9/2022 , Y02E10/542
摘要： A counter electrode for a photovoltaic cell and a photovoltaic cell including the same include a transparent substrate and a catalyst layer formed on the transparent substrate using a supported catalyst The counter electrode of the present invention has an economical preparation cost and process, and also has an enlarged contact area with an electrolyte layer of the cell, leading to improved catalytic activity. Thus, in the case where the counter electrode is applied to the photovoltaic cell, excellent photoconversion efficiency is exhibited. In an exemplary embodiment, the photovoltaic cell is a dye-sensitized photovoltaic cell including such a counter electrode.
摘要翻译：用于光伏电池的对电极和包括其的光伏电池包括透明基板和使用负载催化剂形成在透明基板上的催化剂层本发明的对电极具有经济的制备成本和工艺，并且还具有与电池的电解质层扩大接触面积，导致改善的催化活性。因此，在将对置电极施加到光伏电池的情况下，显示出优异的光转换效率。在一个示例性实施例中，光伏电池是包括这种对电极的染料敏化光伏电池。

77. 发明申请

US20100091913A1 APPARATUS AND METHOD FOR ESTIMATING PHASE ERROR BASED ON VARIABLE STEP SIZE 有权
标题翻译：基于可变步长估计相位误差的装置和方法
公开(公告)号：US20100091913A1
公开(公告)日：2010-04-15
申请号：US12536856
申请日：2009-08-06
申请人： Pansoo KIM , Dae-Ig Chang , Ho-Jin Lee , Jin-Young Kim , Jae-Sung Park , Young-Sun Lim
发明人： Pansoo KIM , Dae-Ig Chang , Ho-Jin Lee , Jin-Young Kim , Jae-Sung Park , Young-Sun Lim
IPC分类号： H04L27/06
CPC分类号： H04L27/22 , H04L1/0047 , H04L1/005 , H04L1/0066 , H04L2027/0067
摘要： Disclosed is a phase error estimating an apparatus and a method which provides improved convergence speed and tracking speed even in mobile channel environment by variably applying the step size for phase error estimation according to channel status. The apparatus for estimating a phase error includes: a posterior probability (APP) average calculating unit for calculating an APP average value from a soft decision result of a currently received symbol; a step size determining unit for determining a step size variably according to channel status; and a phase error estimating unit for estimating a phase error of the currently received symbol from a phase error of a previously received symbol and the APP average value by using the variably determined step size.
摘要翻译：公开了一种相位误差估计装置和方法，即使在移动信道环境中也可以通过根据信道状态可变地应用步长来进行相位误差估计，从而提高收敛速度和跟踪速度。用于估计相位误差的装置包括：后验概率（APP）平均计算单元，用于根据当前接收的符号的软判决结果计算APP平均值; 步长确定单元，用于根据信道状态可变地确定步长; 以及相位误差估计单元，用于通过使用可变确定的步长来估计来自先前接收到的符号的相位误差的当前接收到的符号的相位误差和APP平均值。

78. 发明授权

US07675807B2 Semiconductor memory device having a word line strap structure and associated configuration method 有权
标题翻译：具有字线带结构和相关配置方法的半导体存储器件
公开(公告)号：US07675807B2
公开(公告)日：2010-03-09
申请号：US11764381
申请日：2007-06-18
申请人： Jin-Young Kim
发明人： Jin-Young Kim
IPC分类号： G11C8/00
CPC分类号： G11C11/4094 , G11C5/025 , G11C7/12 , G11C8/14
摘要： A semiconductor memory device having a memory cell array with sub-memory cell arrays arranged in a bit line direction and a word line direction which is perpendicular to the bit line direction. The memory cell arrays including a plurality of memory cells. The memory device further including sense amplifying portions arranged between the sub-memory cell arrays in the bit line direction, contact and conjunction portions arranged between the sub-memory cell arrays in the word line direction and conjunction portions arranged between the sense amplifiers in the word line direction. A main word line overlaps a word line between the sub-memory cell arrays arranged in the word line direction.
摘要翻译：一种具有存储单元阵列的半导体存储器件，具有以位线方向排列的子存储单元阵列和垂直于位线方向的字线方向。存储单元阵列包括多个存储单元。所述存储装置还包括布置在位线方向上的子存储单元阵列之间的读出放大部分，在字线方向上布置在子存储单元阵列之间的接触部分和结合部分以及布置在字中的读出放大器之间的结合部分线方向。主字线与布置在字线方向上的子存储单元阵列之间的字线重叠。

79. 发明授权

US07675771B2 Capacitor-less DRAM circuit and method of operating the same 有权
标题翻译：无电容DRAM电路及其操作方法
公开(公告)号：US07675771B2
公开(公告)日：2010-03-09
申请号：US11882932
申请日：2007-08-07
申请人： Duk-Ha Park , Ki-Whan Song , Jin-Young Kim
发明人： Duk-Ha Park , Ki-Whan Song , Jin-Young Kim
IPC分类号： G11C11/34
CPC分类号： G11C11/404 , G11C7/1048 , G11C7/12 , G11C7/14 , G11C11/4074 , G11C11/4087 , G11C11/4094 , G11C11/4099 , G11C2207/002
摘要： One embodiment includes a plurality of word lines, a plurality of source lines, a plurality of bit lines intersecting with the plurality of word lines, and a plurality of memory cells formed at intersections of the plurality of word lines and the plurality of bit lines. Each of the plurality of memory cells is a floating body cell. A gate of each floating body cell is connected to one of the word lines, a drain of each floating body cell is connected to one of the bit lines, and a source of each floating body cell is connected to one of the source lines. At least one bit line and source line selecting circuit is configured to selectively connect each of the plurality of bit lines to a first output bit line and to selectively connect the source lines to a source voltage. At least one sense amplifier is configured to sense data based on a voltage on the first output bit line.
摘要翻译：一个实施例包括多个字线，多个源极线，与多个字线相交的多个位线，以及形成在多条字线和多条位线的交点处的多个存储单元。多个存储单元中的每一个都是浮体单元。每个浮体单元的栅极连接到一个字线，每个浮体单元的漏极连接到一个位线，并且每个浮体单元的源极连接到源极线之一。至少一个位线和源极线选择电路被配置为选择性地将多个位线中的每一个连接到第一输出位线并且选择性地将源极线连接到源极电压。至少一个读出放大器被配置为基于第一输出位线上的电压来感测数据。

80. 发明授权

US07605877B2 Array substrate for LCD device having double-layered metal structure and manufacturing method thereof 有权
标题翻译：具有双层金属结构的液晶显示装置用阵列基板及其制造方法
公开(公告)号：US07605877B2
公开(公告)日：2009-10-20
申请号：US10875559
申请日：2004-06-25
申请人： Won-Ho Cho , Gyoo-Chul Jo , Gue-Tai Lee , Jin-Gyu Kang , Beung-Hwa Jeong , Jin-Young Kim
发明人： Won-Ho Cho , Gyoo-Chul Jo , Gue-Tai Lee , Jin-Gyu Kang , Beung-Hwa Jeong , Jin-Young Kim
IPC分类号： G02F1/136
CPC分类号： G02F1/136286 , G02F2001/13629 , G02F2001/136295
摘要： The present invention is an array substrate for use in a liquid crystal display device, which includes a gate electrode, a gate line and a gate pad on a substrate, wherein the gate electrode, the gate line and the gate pad have a double-layered structure consisting of a first metal layer and a first barrier metal layer in series from the substrate, and wherein the first metal is one of aluminum and aluminum alloy; a gate insulation layer on the substrate covering the gate electrode, gate line and gate pad; an active layer and an ohmic contact layer sequentially formed on the gate insulation layer and over the gate electrode; a data line on the gate insulation layer perpendicularly crossing the gate line, source and drain electrodes contacting the ohmic contact layer, and a data pad on the gate insulation layer, wherein the data line, the source and drain electrode and the data pad have a double-layered structure consisting of a second barrier metal layer and a second metal layer of copper; a passivation layer formed on the gate insulation layer to cover the data line, source and drain electrodes, and data pad, wherein the passivation layer has a drain contact hole exposing a portion of the drain electrode, a gate pad contact hole exposing a portion of the gate pad, and a data pad contact hole exposing a portion of the data pad; and a pixel electrode, a gate pad terminal and a data pad terminal on the passivation layer, all of which are formed of a transparent conductive material on the passivation layer.
摘要翻译：本发明是一种用于液晶显示装置的阵列基板，其包括在基板上的栅电极，栅极线和栅极焊盘，其中栅电极，栅极线和栅极焊盘具有双层结构由第一金属层和与基板串联的第一阻挡金属层组成，其中第一金属是铝和铝合金之一; 覆盖栅电极，栅极线和栅极焊盘的基板上的栅极绝缘层; 依次形成在栅极绝缘层上和栅电极上的有源层和欧姆接触层; 垂直于栅极线的栅极绝缘层上的数据线，与欧姆接触层接触的源极和漏极以及栅极绝缘层上的数据焊盘，其中数据线，源极和漏极以及数据焊盘具有由第二阻挡金属层和铜的第二金属层组成的双层结构; 形成在所述栅极绝缘层上以覆盖所述数据线，源极和漏极以及数据焊盘的钝化层，其中所述钝化层具有暴露所述漏电极的一部分的漏极接触孔，栅极焊盘和暴露数据焊盘的一部分的数据焊盘接触孔; 以及钝化层上的像素电极，栅极焊盘端子和数据焊盘端子，所有这些都由钝化层上的透明导电材料形成。

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