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61. 发明申请

US20100061877A1 MAGNETIC MATERIALS, AND METHODS OF FORMATION 审中-公开
标题翻译：磁性材料及其形成方法
公开(公告)号：US20100061877A1
公开(公告)日：2010-03-11
申请号：US12208955
申请日：2008-09-11
申请人： Mariam Sadaka , Chris Young , Vivek Mehrotra , Rahul Ganguli
发明人： Mariam Sadaka , Chris Young , Vivek Mehrotra , Rahul Ganguli
IPC分类号： B22F1/02 , H01F1/04 , C01G49/02
CPC分类号： B22F1/0018 , B22F1/02 , B22F3/08 , B22F2001/0033 , B22F2998/10 , B82Y30/00 , C22C2202/02 , H01F1/15333 , H01F1/15383 , B22F3/02 , B22F3/24
摘要： In a soft magnetic material, multiple flake-shaped magnetic particles: are coated by respective magnetic insulators; contain respective groups of magnetic nanoparticles; and are compacted to achieve magnetic exchange coupling between adjacent flake-shaped magnetic particles, and between adjacent magnetic nanoparticles within at least one of the flake-shaped magnetic particles.
摘要翻译：在软磁材料中，多个片状磁性颗粒被各自的磁性绝缘体涂覆; 含有各自的磁性纳米颗粒; 并且被压实以实现相邻的片状磁性颗粒之间的磁交换耦合，以及在至少一个片状磁性颗粒内的相邻的磁性纳米颗粒之间。

62. 发明申请

US20080048174A1 Semiconductor Device Including a Lateral Field-Effect Transistor and Schottky Diode 有权
标题翻译：包括横向场效应晶体管和肖特基二极管的半导体器件
公开(公告)号：US20080048174A1
公开(公告)日：2008-02-28
申请号：US11866270
申请日：2007-10-02
申请人： Mariam Sadaka , Berinder Brar , Wonill Ha , Chanh Nguyen
发明人： Mariam Sadaka , Berinder Brar , Wonill Ha , Chanh Nguyen
IPC分类号： H01L29/15
CPC分类号： H01L29/7783 , H01L27/0605 , H01L27/0629 , H01L27/0727 , H01L29/66462 , H01L29/872
摘要： A semiconductor device including a lateral field-effect transistor and Schottky diode and method of forming the same. In one embodiment, the lateral field-effect transistor includes a buffer layer having a contact covering a substantial portion of a bottom surface thereof, a lateral channel above the buffer layer, another contact above the lateral channel, and an interconnect that connects the lateral channel to the buffer layer. The semiconductor device also includes a Schottky diode parallel-coupled to the lateral field-effect transistor including a cathode formed from another buffer layer interposed between the buffer layer and the lateral channel, a Schottky interconnect interposed between the another buffer layer and the another contact, and an anode formed on a surface of the Schottky interconnect operable to connect the anode to the another contact. The semiconductor device may also include an isolation layer interposed between the buffer layer and the lateral channel.
摘要翻译：包括横向场效应晶体管和肖特基二极管的半导体器件及其形成方法。在一个实施例中，横向场效应晶体管包括缓冲层，该缓冲层具有覆盖其底表面的大部分的接触，缓冲层上方的横向通道，横向通道上方的另一接触件以及将侧向通道到缓冲层。半导体器件还包括并联耦合到横向场效应晶体管的肖特基二极管，该晶体管包括由介于缓冲层和横向沟道之间的另一个缓冲层形成的阴极，插入另一个缓冲层和另一个触点之间的肖特基互连，以及形成在所述肖特基互连件的表面上的阳极，其可操作以将所述阳极连接到所述另一个触点。半导体器件还可以包括插入在缓冲层和横向沟道之间的隔离层。

63. 发明申请

US20080048173A1 Semiconductor Device Including a Lateral Field-Effect Transistor and Schottky Diode 有权
公开(公告)号：US20080048173A1
公开(公告)日：2008-02-28
申请号：US11866249
申请日：2007-10-02
申请人： Mariam Sadaka , Berinder Brar , Wonill Ha , Chanh Nguyen
发明人： Mariam Sadaka , Berinder Brar , Wonill Ha , Chanh Nguyen
IPC分类号： H01L29/15
CPC分类号： H01L27/0605 , H01L27/0629 , H01L27/0727 , H01L29/20 , H01L29/66462 , H01L29/7783 , H01L29/872
摘要： A semiconductor device including a lateral field-effect transistor and Schottky diode and method of forming the same. In one embodiment, the lateral field-effect transistor includes a buffer layer having a contact covering a substantial portion of a bottom surface thereof, a lateral channel above the buffer layer, another contact above the lateral channel, and an interconnect that connects the lateral channel to the buffer layer. The semiconductor device also includes a Schottky diode parallel-coupled to the lateral field-effect transistor including a cathode formed from another buffer layer interposed between the buffer layer and the lateral channel, a Schottky interconnect interposed between the another buffer layer and the another contact, and an anode formed on a surface of the Schottky interconnect operable to connect the anode to the another contact. The semiconductor device may also include an isolation layer interposed between the buffer layer and the lateral channel.

64. 发明申请

US20070187717A1 Semiconductor device having reduced on-resistance and method of forming the same 有权
标题翻译：具有降低的导通电阻的半导体器件及其形成方法
公开(公告)号：US20070187717A1
公开(公告)日：2007-08-16
申请号：US11732301
申请日：2007-04-03
申请人： Mariam Sadaka , Berinder Brar , Wonill Ha , Chanh Nguyen
发明人： Mariam Sadaka , Berinder Brar , Wonill Ha , Chanh Nguyen
IPC分类号： H01L31/00 , H01L21/336
CPC分类号： H01L29/1029 , H01L21/6835 , H01L29/1083 , H01L29/4175 , H01L29/41766 , H01L29/66462 , H01L29/7783 , H01L29/7785 , H01L2221/68318 , H01L2221/68327 , H01L2221/6834 , H01L2221/68381
摘要： A semiconductor device and method of forming the same. The semiconductor device includes an epitaxially grown and conductive buffer layer having a contact covering a substantial portion of a bottom surface thereof and a lateral channel above the buffer layer. The semiconductor device also includes another contact above the lateral channel and an interconnect that connects the lateral channel to the buffer layer, operable to provide a low resistance coupling between the contact and the lateral channel.
摘要翻译：一种半导体器件及其制造方法。半导体器件包括外延生长和导电缓冲层，其具有覆盖其底表面的大部分的接触和缓冲层上方的横向通道。半导体器件还包括在横向通道上方的另一接触件和将横向通道连接到缓冲层的互连件，可操作以在触头和横向通道之间提供低电阻耦合。

65. 发明授权

US08461017B2 Methods of forming bonded semiconductor structures using a temporary carrier having a weakened ion implant region for subsequent separation along the weakened region 有权
标题翻译：使用具有弱化离子注入区域的临时载体形成键合的半导体结构的方法，用于随后沿弱化区域分离
公开(公告)号：US08461017B2
公开(公告)日：2013-06-11
申请号：US12839203
申请日：2010-07-19
申请人： Mariam Sadaka , Ionut Radu
发明人： Mariam Sadaka , Ionut Radu
IPC分类号： H01L21/30
CPC分类号： H01L21/76254 , H01L21/2007 , H01L21/6835 , H01L21/76898 , H01L23/5384 , H01L23/562 , H01L24/03 , H01L24/05 , H01L24/08 , H01L24/27 , H01L24/28 , H01L24/29 , H01L24/32 , H01L24/80 , H01L24/83 , H01L24/92 , H01L24/94 , H01L24/98 , H01L25/50 , H01L2221/68327 , H01L2221/68363 , H01L2221/68377 , H01L2221/68381 , H01L2224/03616 , H01L2224/0362 , H01L2224/0401 , H01L2224/04026 , H01L2224/05009 , H01L2224/056 , H01L2224/05647 , H01L2224/05687 , H01L2224/08121 , H01L2224/08146 , H01L2224/0903 , H01L2224/16145 , H01L2224/27444 , H01L2224/27616 , H01L2224/29187 , H01L2224/32145 , H01L2224/73204 , H01L2224/80 , H01L2224/80006 , H01L2224/80011 , H01L2224/80121 , H01L2224/802 , H01L2224/80203 , H01L2224/80357 , H01L2224/80805 , H01L2224/80895 , H01L2224/80896 , H01L2224/80905 , H01L2224/83 , H01L2224/83005 , H01L2224/83011 , H01L2224/83022 , H01L2224/83121 , H01L2224/83191 , H01L2224/83193 , H01L2224/832 , H01L2224/83203 , H01L2224/83205 , H01L2224/83805 , H01L2224/83896 , H01L2224/92 , H01L2224/9211 , H01L2224/94 , H01L2225/06513 , H01L2225/06541 , H01L2924/00 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01051 , H01L2924/01074 , H01L2924/01079 , H01L2924/01322 , H01L2924/05042 , H01L2924/05442 , H01L2924/10253 , H01L2924/12042 , H01L2924/1301 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/3512
摘要： Methods of fabricating semiconductor structures include implanting atom species into a carrier die or wafer to form a weakened region within the carrier die or wafer, and bonding the carrier die or wafer to a semiconductor structure. The semiconductor structure may be processed while using the carrier die or wafer to handle the semiconductor structure. The semiconductor structure may be bonded to another semiconductor structure, and the carrier die or wafer may be divided along the weakened region therein. Bonded semiconductor structures are fabricated using such methods.
摘要翻译：制造半导体结构的方法包括将原子物质注入到载体晶粒或晶片中以在载体晶粒或晶片内形成弱化区域，并将载体晶片或晶片结合到半导体结构。可以在使用载体晶片或晶片来处理半导体结构的同时对半导体结构进行处理。半导体结构可以结合到另一个半导体结构，并且载体晶片或晶片可以沿其中的弱化区域分割。使用这种方法制造粘合的半导体结构。

66. 发明申请

US20130075868A1 METHODS OF TRANSFERRING LAYERS OF MATERIAL IN 3D INTEGRATION PROCESSES AND RELATED STRUCTURES AND DEVICES 有权
标题翻译：在3D集成过程中传输材料层的方法及相关结构与设备
公开(公告)号：US20130075868A1
公开(公告)日：2013-03-28
申请号：US13246580
申请日：2011-09-27
申请人： Mariam Sadaka , Ionut Radu
发明人： Mariam Sadaka , Ionut Radu
IPC分类号： H01L29/36 , H01L21/77 , H01L21/26
CPC分类号： H01L27/0688 , H01L21/76254
摘要： Methods of transferring a layer of semiconductor material from a first donor structure to a second structure include forming a generally planar weakened zone within the first donor structure defined by implanted ions therein. At least one of a concentration of the implanted ions and an elemental composition of the implanted ions may be formed to vary laterally across the generally planar weakened zone. The first donor structure may be bonded to a second structure, and the first donor structure may be fractured along the generally planar weakened zone, leaving the layer of semiconductor material bonded to the second structure. Semiconductor devices may be fabricated by forming active device structures on the transferred layer of semiconductor material. Semiconductor structures are fabricated using the described methods.
摘要翻译：将半导体材料层从第一施主结构转移到第二结构的方法包括在由其中的注入离子限定的第一施主结构内形成大致平坦的弱化区。注入离子的浓度和注入离子的元素组成中的至少一种可以形成为跨越大致平坦的弱化区横向变化。第一施主结构可以结合到第二结构，并且第一施主结构可以沿着大致平坦的弱化区断裂，留下半导体材料层与第二结构结合。可以通过在半导体材料的转移层上形成有源器件结构来制造半导体器件。使用所述方法制造半导体结构。

67. 发明申请

US20130043600A1 BONDED SEMICONDUCTOR STRUCTURES INCLUDING TWO OR MORE PROCESSED SEMICONDUCTOR STRUCTURES CARRIED BY A COMMON SUBSTRATE 有权
标题翻译：结合的半导体结构，包括两个或更多加工的半导体结构，由普通基底
公开(公告)号：US20130043600A1
公开(公告)日：2013-02-21
申请号：US13657327
申请日：2012-10-22
申请人： Soitec , Mariam Sadaka
发明人： Mariam Sadaka
IPC分类号： H01L23/522
CPC分类号： H01L21/76254 , H01L21/6835 , H01L21/76898 , H01L23/15 , H01L23/481 , H01L24/08 , H01L24/16 , H01L24/80 , H01L25/0652 , H01L25/50 , H01L2221/68368 , H01L2224/0401 , H01L2224/08225 , H01L2224/131 , H01L2224/16146 , H01L2224/16225 , H01L2224/16227 , H01L2224/80097 , H01L2224/80895 , H01L2224/80896 , H01L2224/9202 , H01L2224/94 , H01L2225/06513 , H01L2225/06541 , H01L2225/06555 , H01L2924/12041 , H01L2924/12042 , H01L2224/03 , H01L2224/81 , H01L2924/014 , H01L2924/00
摘要： Methods of forming semiconductor devices include providing a substrate including a layer of semiconductor material on a layer of electrically insulating material. A first metallization layer is formed over a first side of the layer of semiconductor material. Through wafer interconnects are foamed at least partially through the substrate. A second metallization layer is formed over a second side of the layer of semiconductor material opposite the first side thereof. An electrical pathway is provided that extends through the first metallization layer, the substrate, and the second metallization layer between a first processed semiconductor structure carried by the substrate on the first side of the layer of semiconductor material and a second processed semiconductor structure carried by the substrate on the first side of the layer of semiconductor material. Semiconductor structures are fabricated using such methods.
摘要翻译：形成半导体器件的方法包括在电绝缘材料层上提供包括半导体材料层的衬底。第一金属化层形成在半导体材料层的第一侧上。通过晶片互连件至少部分地通过衬底发泡。第二金属化层形成在半导体材料层的与其第一侧相对的第二侧上。提供了一种电路，其通过第一金属化层，衬底和第二金属化层延伸，所述第一金属化层和第二金属化层位于由半导体材料层的第一侧上的衬底承载的第一处理半导体结构和由第衬底在半导体材料层的第一侧上。使用这种方法制造半导体结构。

68. 发明申请

US20120292748A1 METHODS AND STRUCTURES FOR FORMING INTEGRATED SEMICONDUCTOR STRUCTURES 有权
标题翻译：形成集成半导体结构的方法和结构
公开(公告)号：US20120292748A1
公开(公告)日：2012-11-22
申请号：US13522628
申请日：2011-01-04
申请人： Mariam Sadaka , Radu Ionut
发明人： Mariam Sadaka , Radu Ionut
IPC分类号： H01L29/02 , H01L21/762
CPC分类号： H01L25/50 , H01L21/31053 , H01L23/3178 , H01L24/05 , H01L24/80 , H01L25/0657 , H01L2224/0391 , H01L2224/05571 , H01L2224/05624 , H01L2224/05647 , H01L2224/05657 , H01L2224/05676 , H01L2224/05681 , H01L2224/05686 , H01L2224/08146 , H01L2224/80894 , H01L2224/83894 , H01L2225/06513 , H01L2225/06541 , H01L2924/00014 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01044 , H01L2924/01049 , H01L2924/01051 , H01L2924/01057 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/12042 , H01L2924/14 , H01L2924/00012 , H01L2224/05552 , H01L2924/00
摘要： The invention provides methods and structures for fabricating a semiconductor structure and particularly for forming a semiconductor structure with improved planarity for achieving a bonded semiconductor structure comprising a processed semiconductor structure and a number of bonded semiconductor layers. Methods for forming semiconductor structures include forming a dielectric layer over a non-planar surface of a processed semiconductor structure, planarizing a surface of the dielectric layer on a side thereof opposite the processed semiconductor structure, and attaching a semiconductor structure to the planarized surface of the dielectric layer. Semiconductor structures include a dielectric layer overlaying a non-planar surface of a processed semiconductor structure, and a masking layer overlaying the dielectric layer on a side thereof opposite the processed semiconductor structure. The masking layer includes a plurality of mask openings over conductive regions of the non-planar surface of the processed semiconductor structure.
摘要翻译：本发明提供了用于制造半导体结构的方法和结构，特别是用于形成具有改善的平面性的半导体结构，以实现包括经处理的半导体结构和多个键合半导体层的键合半导体结构。用于形成半导体结构的方法包括在被处理的半导体结构的非平面表面上形成电介质层，在介电层的与处理的半导体结构相对的一侧上的表面平坦化，以及将半导体结构附着到电介质层。半导体结构包括覆盖加工半导体结构的非平面表面的电介质层和覆盖在与处理的半导体结构相对的一侧上的电介质层的掩模层。掩模层包括在处理的半导体结构的非平面表面的导电区域上的多个掩模开口。

69. 发明申请

US20120013012A1 METHODS OF FORMING BONDED SEMICONDUCTOR STRUCTURES, AND SEMICONDUCTOR STRUCTURES FORMED BY SUCH METHODS 有权
标题翻译：形成结合半导体结构的方法和通过这些方法形成的半导体结构
公开(公告)号：US20120013012A1
公开(公告)日：2012-01-19
申请号：US12837326
申请日：2010-07-15
申请人： Mariam Sadaka , Ionut Radu
发明人： Mariam Sadaka , Ionut Radu
IPC分类号： H01L21/30 , H01L23/52
CPC分类号： H01L23/5384 , H01L21/2007 , H01L21/6835 , H01L21/6836 , H01L21/76898 , H01L24/03 , H01L24/05 , H01L24/08 , H01L24/80 , H01L24/92 , H01L24/94 , H01L25/50 , H01L27/0688 , H01L2221/68327 , H01L2221/68363 , H01L2221/68368 , H01L2221/68381 , H01L2221/68386 , H01L2221/6839 , H01L2224/03462 , H01L2224/03464 , H01L2224/0361 , H01L2224/03616 , H01L2224/0362 , H01L2224/0381 , H01L2224/05009 , H01L2224/05647 , H01L2224/05687 , H01L2224/08146 , H01L2224/80006 , H01L2224/80065 , H01L2224/802 , H01L2224/80203 , H01L2224/80895 , H01L2224/80896 , H01L2224/94 , H01L2225/06513 , H01L2225/06541 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01051 , H01L2924/01072 , H01L2924/12042 , H01L2924/14 , H01L2224/80 , H01L2924/00
摘要： Methods of forming bonded semiconductor structures include temporarily, directly bonding together semiconductor structures, thinning at least one of the semiconductor structures, and subsequently permanently bonding the thinned semiconductor structure to another semiconductor structure. The temporary, direct bond may be established without the use of an adhesive. Bonded semiconductor structures are fabricated in accordance with such methods.
摘要翻译：形成键合的半导体结构的方法包括暂时将半导体结构直接结合在一起，使半导体结构中的至少一个变薄，然后将稀化的半导体结构永久地结合到另一个半导体结构。可以在不使用粘合剂的情况下建立临时的直接粘合。结合的半导体结构根据这样的方法制造。

70. 发明申请

US20080054304A1 Semiconductor Device Including a Lateral Field-Effect Transistor and Schottky Diode 有权
公开(公告)号：US20080054304A1
公开(公告)日：2008-03-06
申请号：US11866259
申请日：2007-10-02
申请人： Mariam Sadaka , Berinder Brar , Wonill Ha , Chanh Nguyen
发明人： Mariam Sadaka , Berinder Brar , Wonill Ha , Chanh Nguyen
IPC分类号： H01L31/0328
CPC分类号： H01L29/7783 , H01L27/0605 , H01L27/0629 , H01L27/0727 , H01L29/66462 , H01L29/872
摘要： A semiconductor device including a lateral field-effect transistor and Schottky diode and method of forming the same. In one embodiment, the lateral field-effect transistor includes a buffer layer having a contact covering a substantial portion of a bottom surface thereof, a lateral channel above the buffer layer, another contact above the lateral channel, and an interconnect that connects the lateral channel to the buffer layer. The semiconductor device also includes a Schottky diode parallel-coupled to the lateral field-effect transistor including a cathode formed from another buffer layer interposed between the buffer layer and the lateral channel, a Schottky interconnect interposed between the another buffer layer and the another contact, and an anode formed on a surface of the Schottky interconnect operable to connect the anode to the another contact. The semiconductor device may also include an isolation layer interposed between the buffer layer and the lateral channel.

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