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61. 外观设计

USD626097S1 Light-emitting diode 有权
公开(公告)号：USD626097S1
公开(公告)日：2010-10-26
申请号：US29355533
申请日：2010-02-09
申请人： Teruo Takeuchi , Tatsuo Tonedachi , Kazuhisa Iwashita , Satoshi Shimizu
设计人： Teruo Takeuchi , Tatsuo Tonedachi , Kazuhisa Iwashita , Satoshi Shimizu

62. 发明授权

US07813616B2 Semiconductor device with dummy electrode 有权
标题翻译：具有虚拟电极的半导体器件
公开(公告)号：US07813616B2
公开(公告)日：2010-10-12
申请号：US12194034
申请日：2008-08-19
申请人： Satoshi Shimizu
发明人： Satoshi Shimizu
IPC分类号： G02B6/00
CPC分类号： H01L27/11521 , H01L21/76897 , H01L27/115 , H01L29/7881 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes a gate electrode having a straight portion, a dummy electrode located at a point on the extension of the straight portion, a stopper insulating film, a sidewall insulating film, an interlayer insulating film, and a linear contact portion extending, when viewed from above, parallel to the straight portion. The longer side of the rectangle defined by the linear contact portion is, when viewed from above, located beyond the sidewall insulating film and within the top region of the gate electrode and the dummy electrode. A gap G between the gate electrode and the dummy electrode appearing, when viewed from above, in the linear contact portion is filled with the sidewall insulating film such that the semiconductor substrate is not exposed.
摘要翻译：一种半导体器件包括：具有直线部分的栅极电极，位于直线部分延伸点上的虚拟电极，阻挡绝缘膜，侧壁绝缘膜，层间绝缘膜和延伸的线性接触部分从上方观察，平行于直线部分。当从上方观察时，由线性接触部分限定的矩形的长边位于侧壁绝缘膜之外并且位于栅电极和虚拟电极的顶部区域内。当从上方观察时，在直线接触部分中出现的栅电极和虚拟电极之间的间隙G被填充有侧壁绝缘膜，使得半导体衬底不暴露。

63. 发明授权

US07689191B2 Semiconductor integrated circuit having built-in PLL circuit 有权
标题翻译：具有内置PLL电路的半导体集成电路
公开(公告)号：US07689191B2
公开(公告)日：2010-03-30
申请号：US11730236
申请日：2007-03-30
申请人： Yasuyuki Kimura , Satoshi Shimizu , Masakatsu Yokota , Ken Suyama , Aleksander Dec
发明人： Yasuyuki Kimura , Satoshi Shimizu , Masakatsu Yokota , Ken Suyama , Aleksander Dec
IPC分类号： H04B7/00
CPC分类号： H03L7/0893 , H03L7/087 , H03L7/0898 , H03L7/107 , H03L7/1072 , H03L7/1075
摘要： A semiconductor integrated circuit having a built-in PLL circuit which has two charge pump circuits for charging and discharging capacitive elements of a loop filter in response to signals generated by a phase comparator circuit. One of the two charge pump circuits has current sources which generate current values smaller than those generated by current sources of the other charge pump circuit. The loop filter has a first capacitive element connected to a charge/discharge node, and a second capacitive element connected to the charge/discharge node through a resistive element. The first capacitive element is charged and discharged by the one charge pump circuit, while the second capacitive element is charged and discharged by the other charge pump circuit. A charging current source of the one charge pump circuit operates simultaneously with a discharging current source of the other charge pump circuit, i.e., the charge pump circuits operate in opposite phase.
摘要翻译：一种具有内置PLL电路的半导体集成电路，其具有响应于由相位比较器电路产生的信号而具有用于对环路滤波器的电容元件进行充电和放电的两个电荷泵电路。两个电荷泵电路中的一个具有产生比另一个电荷泵电路的电流源产生的电流值小的电流源的电流源。环路滤波器具有连接到充电/放电节点的第一电容元件和通过电阻元件连接到充电/放电节点的第二电容元件。第一电容元件由一个电荷泵电路充电和放电，而第二电容元件被另一个电荷泵电路充电和放电。一个电荷泵电路的充电电流源与另一个电荷泵电路的放电电流源同时操作，即电荷泵电路以相反的相位工作。

64. 发明申请

US20090161439A1 Nonvolatile Semiconductor Memory Device 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US20090161439A1
公开(公告)日：2009-06-25
申请号：US12343552
申请日：2008-12-24
申请人： Natsuo Aiika , Shoii Shukuri , Satoshi Shimizu , Taku Ogura
发明人： Natsuo Aiika , Shoii Shukuri , Satoshi Shimizu , Taku Ogura
IPC分类号： G11C16/06 , G11C11/34 , H01L29/792
CPC分类号： G11C16/10 , G11C16/0483 , G11C16/12 , H01L27/115 , H01L27/11524
摘要： According to an aspect of the present invention, it is provided: a nonvolatile semiconductor memory device comprising: a plurality of bit lines arranged in a first direction; a plurality of source lines arranged in the first direction, the plurality of source lines being parallel to the plurality of bit lines, the plurality of source lines being distinct from the plurality of bit lines; a plurality of memory gate lines arranged in a second direction perpendicular to the first direction; a plurality of memory cells arranged in a matrix, each of the plurality of memory cells including a p type MIS nonvolatile transistor having a first terminal, a second terminal, a channel between the first terminal and the second terminal, a gate insulation film formed on the channel, a gate electrode connected to one corresponding memory gate line of the plurality of memory gate lines, and a carrier storage layer formed between the gate insulation film and the gate electrode, the first terminal being connected to one corresponding bit line of the plurality of bit lines and the second terminal being connected to one corresponding source line of the plurality of source lines.
摘要翻译：根据本发明的一个方面，提供一种非易失性半导体存储器件，包括：沿第一方向布置的多个位线; 沿所述第一方向布置的多条源极线，所述多条源极线与所述多个位线平行，所述多个源极线与所述多个位线不同; 沿垂直于第一方向的第二方向布置的多个存储栅极线; 多个存储单元，以矩阵形式布置，所述多个存储单元中的每一个包括具有第一端子，第二端子，第一端子和第二端子之间的通道的ap型MIS非易失性晶体管，形成在栅极绝缘膜上的栅极绝缘膜连接到所述多个存储栅极线中的一个对应的存储栅极线的栅极，以及形成在所述栅极绝缘膜和所述栅电极之间的载流子存储层，所述第一端子连接到所述多个栅极线中的一个相应的位线位线，并且所述第二端子连接到所述多个源极线中的一个对应的源极线。

65. 发明申请

US20080212027A1 OPHTHALMOLOGIC PHOTOGRAPHING APPARATUS 失效
标题翻译：眼科摄影装置
公开(公告)号：US20080212027A1
公开(公告)日：2008-09-04
申请号：US12032972
申请日：2008-02-18
申请人： Satoshi Shimizu
发明人： Satoshi Shimizu
IPC分类号： A61B3/14
CPC分类号： A61B3/14
摘要： An ophthalmologic photographing apparatus includes a light source having two or more types of light-emitting-diode (LED) light emitting elements configured to emit light of different wavelengths, an illumination optical system configured to illuminate a fundus of a subject's eye with light emitted by the light source, an imaging optical system configured to form a fundus image from light reflected from the fundus of the subject's eye illuminated by the illumination optical system, and a control unit configured to control the light source to emit light of different wavelengths, with which the fundus of the subject's eye is illuminated, between when the formed fundus image is observed and when the formed fundus image is captured as a still image.
摘要翻译：一种眼科摄影装置，包括具有被配置为发射不同波长的光的两种以上的发光二极管（LED）发光元件的光源，照明光学系统，被配置为用由所述发光二极管发出的光发射的眼睛的眼睛，光源，成像光学系统，被配置为从由照明光学系统照明的被检眼的眼底反射的光形成眼底图像;以及控制单元，被配置为控制光源发射不同波长的光，利用该光源当观察到形成的眼底图像和形成的眼底图像作为静止图像被捕获时，被检眼的眼底被照亮。

66. 发明授权

US07355242B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US07355242B2
公开(公告)日：2008-04-08
申请号：US11474392
申请日：2006-06-26
申请人： Jun Sumino , Satoshi Shimizu
发明人： Jun Sumino , Satoshi Shimizu
IPC分类号： H01L29/788
CPC分类号： H01L27/11521 , H01L21/76232 , H01L21/76235 , H01L27/115
摘要： A semiconductor device includes: a silicon substrate, having a main surface, in which trenches are formed; element isolation oxide films filling in trenches; a tunnel oxide film, formed on main surface located between element isolation oxide film and element isolation oxide film, having birds beak portions in birds beak forms that bring into contact with element isolation oxide film and element isolation oxide film, respectively; and a polysilicon film, formed on tunnel oxide film, having a thickness exceeding 0 and being less than 50 nm in an intermediate portion between element isolation oxide film and element isolation oxide film, and being thinner than the above thickness on birds beak portions. Thereby, it is possible to provide a semiconductor device wherein birds beaks are formed in the gate insulating film so as to have the desired dimensions and wherein the gate insulating film has excellent electrical characteristics.
摘要翻译：半导体器件包括：具有主表面的硅衬底，其中形成沟槽; 填充在沟槽中的元件隔离氧化膜; 形成在元件隔离氧化膜和元件隔离氧化膜之间的主表面上的隧道氧化膜，分别具有与元件隔离氧化膜和元件隔离氧化膜接触的鸟喙部分的鸟嘴部分; 以及在元件隔离氧化膜和元件隔离氧化膜之间的中间部分中，在隧道氧化膜上形成的厚度超过0且小于50nm的多晶硅膜，并且在鸟嘴部分上比上述厚度薄。由此，可以提供一种半导体器件，其中在栅极绝缘膜中形成鸟喙以具有期望的尺寸，并且其中栅极绝缘膜具有优异的电气特性。

67. 发明申请

US20070273415A1 Semiconductor integrated circuit having built-in PLL circuit 审中-公开
标题翻译：具有内置PLL电路的半导体集成电路
公开(公告)号：US20070273415A1
公开(公告)日：2007-11-29
申请号：US11730819
申请日：2007-04-04
申请人： Yasuyuki Kimura , Satoshi Shimizu , Masakatsu Yokota , Ken Suyama , Aleksander Dec
发明人： Yasuyuki Kimura , Satoshi Shimizu , Masakatsu Yokota , Ken Suyama , Aleksander Dec
IPC分类号： H03L7/06
CPC分类号： H03L7/0893 , H03L7/087 , H03L7/0898 , H03L7/107 , H03L7/1072 , H03L7/1075
摘要： A semiconductor integrated circuit having a built-in PLL circuit which has two charge pump circuits for charging and discharging capacitive elements of a loop filter in response to signals generated by a phase comparator circuit. One of the two charge pump circuits has current sources which generate current values smaller than those generated by current sources of the other charge pump circuit. The loop filter has a first capacitive element connected to a charge/discharge node, and a second capacitive element connected to the charge/discharge node through a resistive element. The first capacitive element is charged and discharged by the one charge pump circuit, while the second capacitive element is charged and discharged by the other charge pump circuit. A charging current source of the one charge pump circuit operates simultaneously with a discharging current source of the other charge pump circuit, i.e., the charge pump circuits operate in opposite phase.
摘要翻译：一种具有内置PLL电路的半导体集成电路，其具有响应于由相位比较器电路产生的信号而具有用于对环路滤波器的电容元件进行充电和放电的两个电荷泵电路。两个电荷泵电路中的一个具有产生比另一个电荷泵电路的电流源产生的电流值小的电流源的电流源。环路滤波器具有连接到充电/放电节点的第一电容元件和通过电阻元件连接到充电/放电节点的第二电容元件。第一电容元件由一个电荷泵电路充电和放电，而第二电容元件由另一个电荷泵电路充电和放电。一个电荷泵电路的充电电流源与另一个电荷泵电路的放电电流源同时操作，即电荷泵电路以相反的相位工作。

68. 发明授权

US07268056B2 Method of fabricating a semiconductor device with a trench isolation structure and resulting semiconductor device 失效
公开(公告)号：US07268056B2
公开(公告)日：2007-09-11
申请号：US11033322
申请日：2005-01-12
申请人： Jun Sumino , Satoshi Shimizu , Tsuyoshi Sugihara
发明人： Jun Sumino , Satoshi Shimizu , Tsuyoshi Sugihara
IPC分类号： H01L21/76
CPC分类号： H01L27/10873 , H01L21/76229 , H01L21/76232 , H01L21/76235 , H01L27/10855 , H01L27/10888 , H01L27/10894
摘要： The present fabrication method includes the steps of: providing a nitride film in a main surface of a semiconductor substrate; providing an upper trench, with the nitride film used as a mask; filling the upper trench with an oxide film introduced therein; removing the oxide film to expose at least a portion of a bottom of the upper trench and allowing a remainder of the oxide film to serve as a sidewall; providing a lower trench in a bottom of the upper trench, with the sidewall used as a mask; and with the upper trench having the sidewall remaining therein, providing an oxide film in the upper trench and the lower trench. This can provide a semiconductor device fabrication method and a semiconductor device preventing a contact from penetrating the device in an interconnection process.

69. 发明授权

US07046919B2 Aroma diffuser 失效
标题翻译：香气扩散器
公开(公告)号：US07046919B2
公开(公告)日：2006-05-16
申请号：US10510501
申请日：2003-04-17
申请人： Satoshi Shimizu , Takao Kanba , Haruo Ishikawa , Kiyonori Itou
发明人： Satoshi Shimizu , Takao Kanba , Haruo Ishikawa , Kiyonori Itou
IPC分类号： F24F3/14 , F24F6/00
CPC分类号： A61L9/03 , A61L2209/12
摘要： The present invention is intended to provide an aroma device that can eliminate the need for the replacement of the light source, can prevent the light source from becoming high in temperature and can allow light and aroma to be enjoyed comfortably with a sense of security for a long time. The aroma device uses, as a light source, LEDs 1 covered with first and second covers 3 and 4, and also uses a heater 5 to heat a material 10 to be heated which emits aroma; hence, the need for the replacement of the light source is eliminated, the light source is prevented from becoming high in temperature, and light and aroma can be enjoyed comfortably with a sense of security for a long time.
摘要翻译：本发明旨在提供一种能够消除对光源的更换的需要的香味装置，可以防止光源变得高温，并且可以使安全感更舒适地享受光和香气，长时间。芳香装置使用被第一和第二盖3和4覆盖的LED 1作为光源，并且还使用加热器5来加热发出香味的待加热材料10; 因此，消除了对光源的更换的需要，防止了光源变得高温，并且能够以长时间的安全感舒适地享受光和香气。

70. 发明申请

US20050166676A1 Piezoelectric vibrator and manufacturing method thereof 有权
标题翻译：压电振子及其制造方法
公开(公告)号：US20050166676A1
公开(公告)日：2005-08-04
申请号：US11093617
申请日：2005-03-30
申请人： Satoshi Shimizu , Masaru Matsuyama
发明人： Satoshi Shimizu , Masaru Matsuyama
IPC分类号： H03H9/10 , H03H3/02 , H03H3/04 , H04R17/00
CPC分类号： H03H9/1035 , H03H9/1021 , Y10T29/42 , Y10T29/49005
摘要： A small piezoelectric vibrator having low equivalent series resistance is realized. In the piezoelectric vibrator of the invention, a gettering substance for gettering inner gas is provided in a sealed space formed by a hermetic container where a piezoelectric vibrator piece is arranged. The gettering substance is formed on a surface of the piezoelectric vibrator piece or an inside wall of the hermetic container. A manufacturing process for the piezoelectric vibrator includes a process in which the gettering substance is provided inside the hermetic container which contains the piezoelectric vibrator-piece inside the hermetic container, a process in which the hermetic container is hermetic-sealed so that the piezoelectric vibrator piece is sealed in the hermetic container, and a process in which the gettering substance is heated by a laser beam from outside to perform gettering of the inner gas of the hermetic container.
摘要翻译：实现了具有低等效串联电阻的小型压电振动器。在本发明的压电振动器中，用于吸入内部气体的吸气物质设置在由设置有压电振动片的密封容器形成的密封空间中。吸气物质形成在压电振动片的表面或密封容器的内壁上。压电振动器的制造方法包括在气密容器内含有压电振子片的密封容器内设置吸气物质的方法，将密封容器密封地密封，使得压电振动片密封在密封容器中，并且其中通过来自外部的激光束加热吸气物质以进行密封容器的内部气体的吸气的过程。

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