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61. 发明专利

JPS56158459A PACKAGE FOR SEMICONDUCTOR 失效
公开(公告)号：JPS56158459A
公开(公告)日：1981-12-07
申请号：JP6430680
申请日：1980-05-12
申请人： MITSUBISHI ELECTRIC CORP
发明人： DENDA MASAHIKO , KOTANI HIDEO , SATOU SHINICHI , YAKUSHIJI HISAO , UOTANI SHIGEO
IPC分类号： H01L23/02 , H01L23/556
摘要： PURPOSE:To prevent adhesion of solder and to prevent the generation of a software error of the semiconductor by a method wherein the part of a cover for airtight sealing facing with the semiconductor chip is covered with an oxide film. CONSTITUTION:When the oxide film 5 is adhered to the part of the cover 3 for sealing facing with the semiconductor chip 2, because the solder 4 is not adhered on the film 5 and the area of the solder 4 is reduced, the irradiating quantity of alpha rays generating from the solder is also reduced, the angle to look at the solder 4 from the chip 2 is also reduced. Therefore probability of striking by alpha rays is reduced, and moreover the transferring distance through the protective film over the chip is stretched to stop the alpha rays. Accordingly the generation of a software error is prevented.

62. 发明专利

JPH03278435A SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF 失效
公开(公告)号：JPH03278435A
公开(公告)日：1991-12-10
申请号：JP30146790
申请日：1990-11-06
申请人： MITSUBISHI ELECTRIC CORP
发明人： MATSUURA MASAZUMI , KOTANI HIDEO , FUJII ATSUHIRO , NAGAO SHIGEO , MOTOSHIRO HIDEKI
IPC分类号： H01L21/768 , H01L21/31 , H01L21/316 , H01L23/522
摘要： PURPOSE:To obtain an layer insulating film to be scarcely cracked with a smooth upper surface in sufficient thickness by reacting reactive gas in which ratio of ozone to silicon alkoxide is regulated to a predetermined value or larger at a predetermined temperature by a normal CVD method. CONSTITUTION:Ozone and reactive gas containing TEOS are reacted under normal pressure at a temperature range of 350-450 deg.C, and silicon oxide is deposited as an insulating film 14. In this case the ratio of the ozone to the TEOS in the reactive gas is regulated to 5 or larger. The silicon oxide film deposited by this normal pressure CVD has a smooth upper surface based on an excellent step coverage, and the layer insulating film 14 having excellent insulation without crack is so formed on a first insulating film 20 as to cover an aluminum wiring pattern 12 of a first layer with a sole oxide film.

63. 发明专利

JPH033382B2 失效
公开(公告)号：JPH033382B2
公开(公告)日：1991-01-18
申请号：JP19470381
申请日：1981-11-30
申请人： MITSUBISHI ELECTRIC CORP
发明人： TSUKAMOTO KATSUHIRO , KOTANI HIDEO , YAKUSHIJI HISAO , HARADA HIROTSUGU , HIRATA KATSUHIRO
IPC分类号： H01L21/3213 , H01L21/3205

64. 发明专利

JPH01189938A SEMICONDUCTOR DEVICE HAVING ELECTRIC CONTACT STRUCTURE 失效
公开(公告)号：JPH01189938A
公开(公告)日：1989-07-31
申请号：JP1610488
申请日：1988-01-26
申请人： MITSUBISHI ELECTRIC CORP
发明人： KOTANI HIDEO , HATANAKA MASAHIRO
IPC分类号： H01L21/28 , H01L21/336 , H01L21/768 , H01L23/522 , H01L29/78
摘要： PURPOSE:To simplify manufacturing process, and miniaturize the whole device, by constituting a contact structure provided with conductor which fills a contact hole containing, at the same time, a semiconductor region and a conductor layer as a base surface, and is selectively formed only in the contact hole. CONSTITUTION:On a conductor layer 3 and impurity diffusion layers 4a, 4b, interlayer insulating films 5a, 5b provided with a contact hole 6 to electrically connect the conductor layer 3 and the impurity diffusion layer 4b is formed. On the bottom surface of the contact hole 6, i. e., the surface 6a of the conductor layer 3 and the surface 6b of the impurity diffusion layer 4b, conductor 8 is formed in the region, in the self-alignment manner, and electric connection between the conductor layer 3 and the impurity diffusion layer 4b is constituted. Thereby the above contact structure has the property of self-alignment, and the step-difference of the contact hole 6 can be reduced, which effectively contributes to the microminiaturization of the whole device.

65. 发明专利

JPS6442149A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS6442149A
公开(公告)日：1989-02-14
申请号：JP19867987
申请日：1987-08-07
申请人： MITSUBISHI ELECTRIC CORP
发明人： TSUTSUMI TOSHIAKI , KOTANI HIDEO , OKAMOTO TATSURO
IPC分类号： H01L21/3205 , H01L29/41 , H01L29/47 , H01L29/872
摘要： PURPOSE:To prevent a silicon substrate from being eroded by a method wherein a first metal film is formed on a bottom part of a contact hole and a second metal film is formed on it. CONSTITUTION:A first metal film 10 covers a silicon face of a contact hole; a second metal film 6 is formed on this metal film by a CVD method. Because the first metal film 10 is formed, it is possible to prevent substrate silicon 1 from being eroded and to prevent a tunnel or the like from being damaged when the second metal film 6 is formed by the CVD method by utilizing a reducing reaction. In addition, because the first metal film 10 is formed on the surface of the high-resistance layer such as an impurity diffusion layer 3, a resistance value of the high-resistance layer can be reduced substantially. The second metal film 6 can be made flat if a contact hole is filled; a coverage rate of a third metal film 7 is improved; in addition, it is possible to restrain silicon from precipitating in the contact hole selectively.

66. 发明专利

JPS6386476A MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 失效
公开(公告)号：JPS6386476A
公开(公告)日：1988-04-16
申请号：JP23205786
申请日：1986-09-29
申请人： MITSUBISHI ELECTRIC CORP
发明人： NISHIKAWA KIICHI , KINOSHITA YASUSHI , KOTANI HIDEO , OKAMOTO TATSURO , ONO TAKIO , WATABE KIYOTO
IPC分类号： H01L29/73 , H01L21/331 , H01L29/72
摘要： PURPOSE:To reduce the collector resistance by forming a base electrode drawing layer within a recess in the base layer surface, and providing a construction so that the base layer and the base contact portion of the base electrode become the side wall part of the recess. CONSTITUTION:In a semiconductor integrated circuit device wherein a collector buried layer 5 of the second conductivity type is formed in a semiconductor substrate 1 of the first conductivity type and thereon a collector layer 6, a base layer 14 of the first conductivity type and an emittor layer 30 of the second conductivity type are formed, a recess 17 is formed in the surface of the base layer 14 and a hole section 19 reaching the collector buried layer 5 from a predetermined part of the surface of the device region consisting of the respective layers is formed, a wiring material layer is formed on the surfaces of the recess 17 and the hole section 19, and thereafter performing anisotropic etching, thereby forming a base electrode drawing layer 25 and a collector electrode drawing layer 26 respectively within the recess 17 and the hole section 19. With this, the spacing between the base contact part and the emitter contact part can be made small to reduce the base resistance.

67. 发明专利

JPS62273776A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS62273776A
公开(公告)日：1987-11-27
申请号：JP11669786
申请日：1986-05-21
申请人： MITSUBISHI ELECTRIC CORP
发明人： KOTANI HIDEO
IPC分类号： H01L29/78
摘要： PURPOSE:To obtain a semiconductor device, in which the fluctuation of the threshold voltage of an MOS transistor is extremelly fine, in the device having an insulating film, which is formed on a substrate by a sputtering method, by providing a silicon nitride film, which is formed before the formation of the insulating film, between the substrate and the insulating film. CONSTITUTION:A silicon nitride film 8 is formed on the directly upper surface side of a gate electrode 3 and a gate insulating film 2. The silicon nitride film 8 is formed by a pressure reduced CVD method. The thickness of the film is about O.1 mum. By forming the silicon nitride film 8, the fluctuation of the threshold voltage value of an MOS transistor caused by the formation of an insulating film can be suppressed to the small value, even if the insulating film 7 is formed by sputtering thereafter.

68. 发明专利

JPS62111436A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS62111436A
公开(公告)日：1987-05-22
申请号：JP25105285
申请日：1985-11-09
申请人： MITSUBISHI ELECTRIC CORP
发明人： KOTANI HIDEO
IPC分类号： H01L21/314
摘要： PURPOSE:To restrain the variation of a threshold value of a semiconductor device by forming an insulating film by sputtering, on a thin insulating film formed by a technique except sputtering. CONSTITUTION:In this MOS transistor, an Si substrate 1, a gate insulating film 2, a gate electrode 3, source and drain 4a and 4b, an insulating film 5, and aluminum wirings 6a and 6b are formed. Further a thin insulating film 8 made of an Si nitride film of 0.1mum thickness is formed over them by a plasma CVD technique and an interlaminar insulating film 7 is formed thereon by a bias sputtering technique. Thus, the variation of a threshold value of the semiconductor device can be restrained to be minute.

69. 发明专利

JPS60128664A MANUFACTURE OF TRANSISTOR 失效
公开(公告)号：JPS60128664A
公开(公告)日：1985-07-09
申请号：JP23860483
申请日：1983-12-15
申请人： MITSUBISHI ELECTRIC CORP
发明人： IKEDA TATSUHIKO , KOTANI HIDEO , YAKUSHIJI HISAO
IPC分类号： H01L29/73 , H01L21/331 , H01L29/72 , H01L29/732
摘要： PURPOSE:To eliminate the possibility of the disconnection of a wiring film by growing an emitter connecting layer, a base connecting layer and a collector connecting layer each having approximately the same thickness as the thickness of an insulating film in an emitter contact-hole, a base contact-hole and a collector contact-hole in an epitaxial manner. CONSTITUTION:An emitter contact-hole 8, a base contact-hole 9 and a collector contact-hole 10 are each formed to the sections of an insulating film 6 corresponding to a section, to which an n type emitter layer must be formed, in the surface section of a p type ion implantation layer 7, a section, to which a p type base connecting layer must be connected, and a section, to which an n type collector connecting layer must be connected, in the surface section of an n type collector leading-out layer 5. p type epitaxial layers 15-17 having the same thickness as the thickness of the insulating film 6 and low impurity concentration are formed on sections facing to each hole 8-10. An emitter wiring film 12, a base wiring film 13 and a collector wiring film 14 severally connected to an n type emitter connecting layer 21, a p type base connecting layer 24 and an n type collector connecting layer 23 are formed on the surface of the insulating film 6.

70. 发明专利

JPS60103014A FORMATION OF SILICON LAYER 失效
公开(公告)号：JPS60103014A
公开(公告)日：1985-06-07
申请号：JP20770983
申请日：1983-11-05
申请人： MITSUBISHI ELECTRIC CORP
发明人： KOTANI HIDEO , YAKUSHIJI HISAO , IKEDA TATSUHIKO
IPC分类号： C01B33/02
摘要： PURPOSE:To form a silicon layer easily on a substrate by coating a soln. of silicon compound on the substrate and volatilizing the solvent and reducing the silicon compound. CONSTITUTION:The soln. of a silicon compound (for example, an alcoholic soln. of silicon hydroxide) is coated uniformly on a substrate by a spinner or the like. The substrate is put in a vacuum vessel and treated by the plasma generated under the gaseous hydrogen atmosphere, and the silicon compound is reduced to form silicon and to volatilize the alcohol (solvent) and the isolated silicon is deposited on said substrate. Instead of said plasma processing, the soln. of said silicon compound may be treated by irradiation of light, ion beam and electron beam or the like in hydrogen atmosphere.

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