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    • 61. 发明授权
    • Synchronous delay circuit
    • 同步延迟电路
    • US06404256B2
    • 2002-06-11
    • US09375199
    • 1999-08-16
    • Koichiro MinamiTakanori SaekiMasashi Nakagawa
    • Koichiro MinamiTakanori SaekiMasashi Nakagawa
    • H03H1126
    • H03K5/133
    • In a synchronous delay circuit including a first delay circuit array which is constituted of a plurality of cascade-connected delay circuit stages, and a second delay circuit array which is constituted of a plurality of cascade-connected delay circuit stages arranged to have a signal propagating direction opposite to that of the first delay circuit array. Each of the delay circuit stages of the first and second delay circuit arrays includes a CMOS inverter receiving an input signal. A P-channel MOS transistor of the CMOS inverter, a switching P-channel MOS transistor and an additional resistor are connected in series between a power supply line and an output node of the delay circuit stage. An N-channel MOS transistor of the CMOS inverter, a switching N-channel MOS transistor and another additional resistor are connected in series between the ground and the output node of the delay circuit stage. Thus, the current drive capability of each unitary delay circuit is decreased by the additional resistors, so that the delay time per one unitary delay circuit can be increased while minimizing the increase of the jitter. Accordingly, the area of the delay circuit arrays required to obtain a desired delay time can be reduced.
    • 在包括由多个级联连接的延迟电路级构成的第一延迟电路阵列的同步延迟电路中,以及由多个级联连接的延迟电路级构成的第二延迟电路阵列,其布置成具有信号传播 方向与第一延迟电路阵列的方向相反。 第一和第二延迟电路阵列的每个延迟电路级包括接收输入信号的CMOS反相器。 CMOS反相器的P沟道MOS晶体管,开关P沟道MOS晶体管和附加电阻串联连接在电源线和延迟电路级的输出节点之间。 CMOS反相器的N沟道MOS晶体管,开关N沟道MOS晶体管和另一个附加电阻串联连接在延迟电路级的地和输出节点之间。 因此,通过附加电阻来减小每个单位延迟电路的电流驱动能力,使得每一个单位延迟电路的延迟时间可以增加,同时最小化抖动的增加。 因此,可以减少获得期望的延迟时间所需的延迟电路阵列的面积。
    • 62. 发明授权
    • Managing a print job using print setting information
    • 使用打印设置信息管理打印作业
    • US08773694B2
    • 2014-07-08
    • US13224243
    • 2011-09-01
    • Yoshihiro TakagiMasashi Nakagawa
    • Yoshihiro TakagiMasashi Nakagawa
    • G06K15/02
    • G06F3/1288G06F3/1205G06F3/1245G06F3/1247G06F3/1258G06F3/1267
    • A print server comprises: storage unit configured to store the print job of the intermediate format received from an information processing apparatus; setting change receiving unit configured to receive, from a printing apparatus, a print setting information change instruction for the print job of the intermediate format stored in the storage unit; update unit configured to update print setting information of the print job in accordance with the print setting information change instruction; print request receiving unit configured to receive a print request from the printing apparatus; and job transmission unit configured to generate a print job of a format printable by the printing apparatus based on the print job of the intermediate format and the print setting information updated in accordance with the print request, and to transmit the generated print job to the printing apparatus.
    • 打印服务器包括:存储单元,被配置为存储从信息处理设备接收的中间格式的打印作业; 设置变更接收单元,被配置为从打印设备接收用于存储在存储单元中的中间格式的打印作业的打印设置信息改变指令; 更新单元,被配置为根据打印设置信息改变指令来更新打印作业的打印设置信息; 打印请求接收单元,被配置为从打印设备接收打印请求; 以及作业传送单元,被配置为基于所述中间格式的打印作业和根据所述打印请求而更新的所述打印设置信息,生成由所述打印装置可打印的格式的打印作业,并将所生成的打印作业发送到所述打印 仪器。
    • 70. 发明授权
    • Electro-optical device and electronic apparatus
    • 电光装置和电子设备
    • US08129807B2
    • 2012-03-06
    • US12566361
    • 2009-09-24
    • Masashi Nakagawa
    • Masashi Nakagawa
    • H01L31/0232
    • H01L29/78696H01L27/124H01L29/42384H01L29/78606
    • An electro-optical device includes a semiconductor layer including a channel region having a channel length along one of a first direction and a second direction, a source region having a source length along the second direction and electrically connected to a data line, a drain region having a drain length including a portion along the first direction and electrically connected to a pixel electrode, and a junction region formed between the channel region and the drain region, and bent in the drain region in plan view; a gate electrode including a main body portion facing the channel region with a gate insulating film interposed therebetween and an enclosure portion including an L-shaped portion enclosing the junction region along the portion bent in the drain region; and a sidewall portion rising or falling from the enclosure portion and including a portion arranged along the side of the second junction region.
    • 电光装置包括:半导体层,包括具有沿着第一方向和第二方向中的一个的沟道长度的沟道区;源极区,沿着第二方向具有源极长度,并且电连接到数据线,漏极区 具有包括沿着所述第一方向的部分并电连接到像素电极的漏极长度,以及形成在所述沟道区域和所述漏极区域之间的接合区域,并且在所述漏极区域中在平面图中弯曲; 栅极电极,其包括面对沟道区的主体部分,其间插入有栅极绝缘膜;以及封装部分,其包括沿着在漏极区域弯曲的部分封闭所述结区域的L形部分; 以及侧壁部分,其从所述封闭部分上升或下降并且包括沿着所述第二接合区域的侧面布置的部分。