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61. 发明授权

US07289171B2 Thin film transistor array panel for liquid crystal display having pixel electrode 有权
标题翻译：具有像素电极的液晶显示器的薄膜晶体管阵列面板
公开(公告)号：US07289171B2
公开(公告)日：2007-10-30
申请号：US11551450
申请日：2006-10-20
申请人： Dong-Gyu Kim , Hyang-Shik Kong , Jang-Soo Kim
发明人： Dong-Gyu Kim , Hyang-Shik Kong , Jang-Soo Kim
IPC分类号： G02F1/136 , G02F1/1343
CPC分类号： G02F1/136213 , G02F1/1337 , G02F1/133784 , G02F1/134336 , G02F1/136227 , G02F2201/123
摘要： A TFT array panel includes an insulating substrate, a gate line and a storage electrode line formed thereon. The gate line and the storage electrode line are covered with a gate insulating layer, and a semiconductor island is formed on the gate insulating layer. A pair of ohmic contacts are formed on the semiconductor island, and a data line and a drain electrode are formed thereon. The data line and the drain electrode are covered with a passivation layer having a contact hole exposing the drain electrode. A pixel electrode is formed on the passivation layer and connected to the drain electrode through the contact hole. The TFT array panel is covered with an alignment layer rubbed approximately in a direction from the upper left corner to the lower right corner of the TFT array panel or the pixel electrodes. The pixel electrode has approximately a rectangular shape and overlaps the gate line and the data line. The pixel electrode has an expansion located near the upper left corner of the pixel electrode to increase the width of the corresponding overlapping area between the pixel electrode and the gate line and/or the data line.
摘要翻译： TFT阵列面板包括绝缘基板，栅极线和形成在其上的存储电极线。栅极线和存储电极线被栅极绝缘层覆盖，并且在栅极绝缘层上形成半导体岛。在半导体岛上形成一对欧姆接触，在其上形成数据线和漏电极。数据线和漏电极被具有暴露漏电极的接触孔的钝化层覆盖。像素电极形成在钝化层上，并通过接触孔与漏电极连接。 TFT阵列面板被大致沿着从TFT阵列板的左上角到右下角或像素电极的方向摩擦的取向膜覆盖。像素电极具有大致矩形形状并且与栅极线和数据线重叠。像素电极具有位于像素电极的左上角附近的扩展部，以增加像素电极与栅极线和/或数据线之间的对应重叠区域的宽度。

62. 发明申请

US20070249150A1 Method of Forming a Metal Line and Method of Manufacturing a Display Substrate by Using the Same 审中-公开
公开(公告)号：US20070249150A1
公开(公告)日：2007-10-25
申请号：US11669639
申请日：2007-01-31
申请人： Jang-Soo Kim , Sang-Gab Kim
发明人： Jang-Soo Kim , Sang-Gab Kim
IPC分类号： H01L21/44
CPC分类号： H01L27/1288 , H01L27/1214
摘要： In a method of forming a metal line and a method of manufacturing a display substrate, a channel layer and a metal layer are successively formed on a base substrate. A photoresist pattern is formed in a wiring area. The metal layer is etched by using the photoresist pattern to form a metal line. The photoresist pattern is removed by a predetermined thickness to form a residual photoresist pattern on the metal line. The channel layer is etched by using the metal line to form an undercut under the metal line. The protruding portion of the metal line is removed by using the residual photoresist pattern. The protruding portion relatively protrudes by formation of the undercut. Thus, an aperture ratio is increased, an afterimage is prevented, and the display quality is improved.

63. 发明申请

US20070249096A1 Method of Forming a Metal Line and Method of Manufacturing a Display Substrate by Using the Same 审中-公开
公开(公告)号：US20070249096A1
公开(公告)日：2007-10-25
申请号：US11669551
申请日：2007-01-31
申请人： Jang-Soo Kim , Sang-Gab Kim
发明人： Jang-Soo Kim , Sang-Gab Kim
IPC分类号： H01L21/00
CPC分类号： H01L27/1288 , H01L27/1214
摘要： In a method of forming a metal line and a method of manufacturing a display substrate, a channel layer and a metal layer are successively formed on a base substrate. A photoresist pattern is formed in a wiring area. The metal layer is etched by using the photoresist pattern to form a metal line. The photoresist pattern is removed by a predetermined thickness to form a residual photoresist pattern on the metal line. The channel layer is etched by using the metal line to form an undercut under the metal line. The protruding portion of the metal line is removed by using the residual photoresist pattern. The protruding portion relatively protrudes by formation of the undercut. Thus, an aperture ratio is increased, an afterimage is prevented, and the display quality is improved.

64. 发明申请

US20070134858A1 Thin Film Transistor Array Panel and Manufacturing Method Thereof 有权
标题翻译：薄膜晶体管阵列面板及其制造方法
公开(公告)号：US20070134858A1
公开(公告)日：2007-06-14
申请号：US11674457
申请日：2007-02-13
申请人： Hye-Young Ryu , Young-Hoon Yoo , Jang-Soo Kim , Sung-Man Kim , Kyung-Wook Kim , Hyang-Shik Kong , Young-Goo Song
发明人： Hye-Young Ryu , Young-Hoon Yoo , Jang-Soo Kim , Sung-Man Kim , Kyung-Wook Kim , Hyang-Shik Kong , Young-Goo Song
IPC分类号： H01L21/84
CPC分类号： G02F1/136227 , G02F2001/136236 , H01L27/1244 , H01L27/1248
摘要： A thin film transistor array panel is provided, which includes: a gate line, a gate insulating layer, and a semiconductor layer sequentially formed on a substrate; a data line and a drain electrode formed at least on the semiconductor layer; a first passivation layer formed on the data line and the drain electrode and having a first contact hole exposing the drain electrode at least in part; a second passivation layer formed on the first passivation layer and having a second contact hole that is disposed on the first contact hole and has a first bottom edge placed outside the first contact hole and a second bottom edge placed inside the first contact hole; and a pixel electrode formed on the second passivation layer and connected to the drain electrode through the first and the second contact holes.
摘要翻译：提供薄膜晶体管阵列面板，其包括：顺序地形成在基板上的栅极线，栅极绝缘层和半导体层; 至少形成在所述半导体层上的数据线和漏电极; 形成在所述数据线和所述漏电极上的第一钝化层，并且具有至少部分地暴露所述漏电极的第一接触孔; 第二钝化层，其形成在所述第一钝化层上，并且具有设置在所述第一接触孔上并具有放置在所述第一接触孔外部的第一底部边缘的第二接触孔和放置在所述第一接触孔内部的第二底部边缘; 以及形成在所述第二钝化层上并通过所述第一和第二接触孔连接到所述漏电极的像素电极。

65. 发明申请

US20070126005A1 THIN FILM TRANSISTOR ARRAY PANELS FOR A LIQUID CRYSTAL DISPLAY AND A METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：用于液晶显示器的薄膜晶体管阵列及其制造方法
公开(公告)号：US20070126005A1
公开(公告)日：2007-06-07
申请号：US11625694
申请日：2007-01-22
申请人： Bum-Ki Baek , Mun-Pyo Hong , Jang-Soo Kim , Sung-Wook Huh , Jong-Soo Yoon , Doug-Gyu Kim
发明人： Bum-Ki Baek , Mun-Pyo Hong , Jang-Soo Kim , Sung-Wook Huh , Jong-Soo Yoon , Doug-Gyu Kim
IPC分类号： H01L29/04
CPC分类号： G02F1/13458 , G02F1/136227 , G02F1/136286 , G02F2001/136236 , G02F2001/136272 , G02F2001/13629 , H01L27/12 , H01L27/124 , H01L27/1288 , H01L29/41733 , H01L29/42384 , H01L29/458 , H01L29/4908 , H01L29/66765 , Y10S438/949
摘要： A conductive layer, including a lower layer made of refractory metal such as chromium, molybdenum, and molybdenum alloy and an upper layer made of aluminum or aluminum alloy, is deposited and patterned to form a gate wire including a gate line, a gate pad, and a gate electrode on a substrate. At this time, the upper layer of the gate pad is removed using a photoresist pattern having different thicknesses depending on position as etch mask. A gate insulating layer, a semiconductor layer, and an ohmic contact layer are sequentially formed. A conductive material is deposited and patterned to form a data wire including a data line, a source electrode, a drain electrode, and a data pad.
摘要翻译：包括由诸如铬，钼和钼合金的难熔金属制成的下层和由铝或铝合金制成的上层的导电层被沉积和图案化以形成包括栅极线，栅极焊盘，以及在基板上的栅电极。此时，根据作为蚀刻掩模的位置，使用具有不同厚度的光致抗蚀剂图案去除栅极焊盘的上层。依次形成栅极绝缘层，半导体层和欧姆接触层。导电材料被沉积并图案化以形成包括数据线，源电极，漏电极和数据焊盘的数据线。

66. 发明申请

US20070012967A1 Thin film transistor array panel and fabrication 有权
标题翻译：薄膜晶体管阵列和制造
公开(公告)号：US20070012967A1
公开(公告)日：2007-01-18
申请号：US11486330
申请日：2006-07-12
申请人： Sang-Gab Kim , Woo-Geun Lee , Shi-Yul Kim , Jin-Ho Ju , Jang-Soo Kim , Sang-Woo Whangbo , Min-Seok Oh , Hye-Young Ryu , Hong-Kee Chin
发明人： Sang-Gab Kim , Woo-Geun Lee , Shi-Yul Kim , Jin-Ho Ju , Jang-Soo Kim , Sang-Woo Whangbo , Min-Seok Oh , Hye-Young Ryu , Hong-Kee Chin
IPC分类号： H01L31/113
CPC分类号： H01L27/124 , G02F2001/13629 , H01L29/458
摘要： The present invention provides a manufacturing method of a thin film transistor array panel, which includes forming a gate line on a substrate; forming a gate insulating layer, a semiconductor layer, and an ohmic contact on the gate line; forming a first conducting film including Mo, a second conducting film including Al, and a third conducting film including Mo on the ohmic contact; forming a first photoresist pattern on the third conducting film; etching the first, second, and third conducting films, the ohmic contact, and the semiconductor layer using the first photoresist pattern as a mask; removing the first photoresist pattern by a predetermined thickness to form a second photoresist pattern; etching the first, second, and third conducting films using the second photoresist pattern as a mask to expose a portion of the ohmic contact; and etching the exposed ohmic contact using a Cl-containing gas and a F-containing gas.
摘要翻译：本发明提供一种薄膜晶体管阵列面板的制造方法，其包括在基板上形成栅极线; 在栅极线上形成栅极绝缘层，半导体层和欧姆接触; 形成包括Mo的第一导电膜，包括Al的第二导电膜和在欧姆接触上包含Mo的第三导电膜; 在所述第三导电膜上形成第一光致抗蚀剂图案; 使用第一光致抗蚀剂图案作为掩模蚀刻第一，第二和第三导电膜，欧姆接触和半导体层; 将第一光致抗蚀剂图案去除预定厚度以形成第二光致抗蚀剂图案; 使用第二光致抗蚀剂图案作为掩模蚀刻第一，第二和第三导电膜以暴露欧姆接触的一部分; 并使用含Cl气体和含F气体蚀刻暴露的欧姆接触。

67. 发明申请

US20060192906A1 Thin film transistor array panel and manufacturing method thereof 有权
标题翻译：薄膜晶体管阵列面板及其制造方法
公开(公告)号：US20060192906A1
公开(公告)日：2006-08-31
申请号：US11356853
申请日：2006-02-17
申请人： Hye-Young Ryu , Jang-Soo Kim , Sang-Gab Kim , Hong-Kee Chin , Min-Seok Oh , Hee-Hwan Choe , Shi-Yul Kim
发明人： Hye-Young Ryu , Jang-Soo Kim , Sang-Gab Kim , Hong-Kee Chin , Min-Seok Oh , Hee-Hwan Choe , Shi-Yul Kim
IPC分类号： G02F1/136
CPC分类号： G02F1/136286 , G02F1/133345 , G02F1/1362 , G02F2001/136222 , G02F2202/02
摘要： A thin film transistor array panel is provided, which includes a gate line, a data line intersecting the gate line, a storage electrode apart from the gate and data lines, a thin film transistor connected to the gate and data lines and having a drain electrode, a pixel electrode connected to the drain electrode, a first insulating layer over the thin film transistor and disposed under the pixel electrode, and a second insulating layer disposed on the first insulating layer and having an opening exposing the first insulating layer on the storage electrode.
摘要翻译：提供薄膜晶体管阵列面板，其包括栅极线，与栅极线相交的数据线，与栅极和数据线分开的存储电极，连接到栅极和数据线并具有漏极的薄膜晶体管连接到漏电极的像素电极，薄膜晶体管上的第一绝缘层，并且设置在像素电极下方;第二绝缘层，设置在第一绝缘层上，并且具有使存储电极上的第一绝缘层露出的开口。

68. 发明申请

US20060131582A1 Thin film transistor array panel and manufacturing method thereof 审中-公开
标题翻译：薄膜晶体管阵列面板及其制造方法
公开(公告)号：US20060131582A1
公开(公告)日：2006-06-22
申请号：US11271129
申请日：2005-11-10
申请人： Jae-Hong Jeon , Jang-Soo Kim
发明人： Jae-Hong Jeon , Jang-Soo Kim
IPC分类号： H01L29/04
CPC分类号： H01L27/124 , G02F1/136213 , G02F1/136227 , H01L27/1288
摘要： A thin film transistor (TFT) array panel is presented. The TFT array panel includes: a gate line formed on an insulating substrate and a gate electrode; a storage electrode line on the insulating substrate; a gate insulating layer on the gate line and the storage electrode line; a first semiconductor on the gate insulating layer; a data line and a drain electrode formed on the first semiconductor, separate from each other, and over the gate electrode; a passivation layer formed on the first semiconductor layer and having a contact hole exposing the drain electrode and an opening exposing the gate insulating layer on the storage electrode; and a pixel electrode connected to the drain electrode through the contact hole and overlapping the storage electrode through the opening.
摘要翻译：介绍了薄膜晶体管（TFT）阵列面板。 TFT阵列面板包括：形成在绝缘基板和栅电极上的栅极线; 绝缘基板上的存储电极线; 栅极线上的栅极绝缘层和存储电极线; 栅极绝缘层上的第一半导体; 形成在所述第一半导体上的数据线和漏电极，彼此分离并在所述栅极上方; 钝化层，其形成在所述第一半导体层上并且具有暴露所述漏电极的接触孔和暴露所述存储电极上的所述栅极绝缘层的开口; 以及通过所述接触孔与所述漏电极连接并且通过所述开口与所述存储电极重叠的像素电极。

69. 发明申请

US20050231668A1 Liquid crystal display and fabricating method thereof 有权
标题翻译：液晶显示及其制造方法
公开(公告)号：US20050231668A1
公开(公告)日：2005-10-20
申请号：US11094147
申请日：2005-03-31
申请人： Jang-Soo Kim , Min-Hyung Choo
发明人： Jang-Soo Kim , Min-Hyung Choo
IPC分类号： G02F1/1333 , G02F1/133 , G02F1/1337 , G02F1/1343 , G02F1/136 , G02F1/1368 , G02F1/139 , G03F7/20 , H01L21/027
CPC分类号： G02F1/1393 , G02F1/1337 , G02F2001/133776
摘要： A liquid crystal display of the present invention comprises a first substrate, a second substrate and a liquid crystal layer injected there between. The first substrate has first base plate, a gate line formed on the first base plate, a data line formed over the gate line, a switching element electrically connected to the gate line and the data line, a pixel electrode electrically connected to the switching element, an element dividing LC domains formed on the pixel electrode, first alignment layer formed on the domain dividing element, The second substrate comprises second base plate, a common electrode formed on the second base plate, a first protrusion and a second protrusion formed on the common electrode. The first protrusion and the second protrusion have different heights. A second alignment layer is formed on the protrusions.
摘要翻译：本发明的液晶显示器包括第一基板，第二基板和在其间注入的液晶层。第一基板具有第一基板，形成在第一基板上的栅极线，形成在栅极线上的数据线，电连接到栅极线和数据线的开关元件，电连接到开关元件的像素电极形成在像素电极上形成的LC畴的元件，形成在畴分割元件上的第一取向层。第二基板包括第二基板，形成在第二基板上的公共电极，形成在第二基板上的第一突起和形成在第二基板上的第二突起公共电极。第一突起和第二突起具有不同的高度。在突起上形成第二取向层。

70. 发明申请

US20050170592A1 Thin film transistor array panels for a liquid crystal display and a method for manufacturing the same 有权
标题翻译：用于液晶显示器的薄膜晶体管阵列面板及其制造方法
公开(公告)号：US20050170592A1
公开(公告)日：2005-08-04
申请号：US11080612
申请日：2005-03-16
申请人： Bum-Ki Baek , Mun-Pyo Hong , Jang-Soo Kim , Sung-Wook Huh , Jong-Soo Yoon , Dong-Gyu Kim
发明人： Bum-Ki Baek , Mun-Pyo Hong , Jang-Soo Kim , Sung-Wook Huh , Jong-Soo Yoon , Dong-Gyu Kim
IPC分类号： G02F1/1362 , H01L21/336 , H01L21/77 , H01L21/84 , H01L27/12 , H01L29/417 , H01L29/423 , H01L29/45 , H01L29/49 , H01L31/0376
CPC分类号： G02F1/13458 , G02F1/136227 , G02F1/136286 , G02F2001/136236 , G02F2001/136272 , G02F2001/13629 , H01L27/12 , H01L27/124 , H01L27/1288 , H01L29/41733 , H01L29/42384 , H01L29/458 , H01L29/4908 , H01L29/66765 , Y10S438/949
摘要： A conductive layer, including a lower layer made of refractory metal such as chromium, molybdenum, and molybdenum alloy and an upper layer made of aluminum or aluminum alloy, is deposited and patterned to form a gate wire including a gate line, a gate pad, and a gate electrode on a substrate. At this time, the upper layer of the gate pad is removed using a photoresist pattern having different thicknesses depending on position as etch mask. A gate insulating layer, a semiconductor layer, and an ohmic contact layer are sequentially formed. A conductive material is deposited and patterned to form a data wire including a data line, a source electrode, a drain electrode, and a data pad. Next, a passivation layer is deposited and patterned to form contact holes respectively exposing the drain electrode, the gate pad, and the data pad. At this time, the contact hole on the gate pad only exposes the lower layer of the gate pad, and the gate insulating layer and the passivation layer completely cover the upper layer of the gate pad. Next, indium tin oxide is deposited and patterned to form a pixel electrode, a redundant gate pad, and a redundant data pad respectively connected to the pixel electrode, the gate pad, and the data pad.
摘要翻译：包括由诸如铬，钼和钼合金的难熔金属制成的下层和由铝或铝合金制成的上层的导电层被沉积和图案化以形成包括栅极线，栅极焊盘，以及在基板上的栅电极。此时，根据作为蚀刻掩模的位置，使用具有不同厚度的光致抗蚀剂图案去除栅极焊盘的上层。依次形成栅极绝缘层，半导体层和欧姆接触层。导电材料被沉积并图案化以形成包括数据线，源电极，漏电极和数据焊盘的数据线。接下来，沉积并图案化钝化层以形成分别暴露漏电极，栅极焊盘和数据焊盘的接触孔。此时，栅极焊盘上的接触孔仅暴露栅极焊盘的下层，栅极绝缘层和钝化层完全覆盖栅极焊盘的上层。接下来，沉积和图案化氧化铟锡以形成分别连接到像素电极，栅极焊盘和数据焊盘的像素电极，冗余栅极焊盘和冗余数据焊盘。

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