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61. 发明授权

US07800954B2 Apparatus for reading data and method using the same 有权
标题翻译：用于读取数据的装置和使用该装置的方法
公开(公告)号：US07800954B2
公开(公告)日：2010-09-21
申请号：US12007921
申请日：2008-01-17
申请人： Seung-Hwan Song , Jun Jin Kong , Sung Chung Park , Dong Hyuk Chae , Seung Jae Lee , Dong Ku Kang
发明人： Seung-Hwan Song , Jun Jin Kong , Sung Chung Park , Dong Hyuk Chae , Seung Jae Lee , Dong Ku Kang
IPC分类号： G11C11/34
CPC分类号： G11C16/26 , G11C7/1006 , G11C11/5642
摘要： The method for reading data according to example embodiments includes comparing a threshold voltage of a memory cell with a first boundary voltage, comparing the threshold voltage with a second boundary voltage having a higher voltage level than that of the first boundary voltage, and determining data of the memory cell based on the threshold voltage, the first boundary voltage, and the second boundary voltage.
摘要翻译：根据示例实施例的用于读取数据的方法包括将存储器单元的阈值电压与第一边界电压进行比较，将阈值电压与具有比第一边界电压的电压电平更高的电压电平的第二边界电压进行比较，以及确定数据所述存储单元基于所述阈值电压，所述第一边界电压和所述第二边界电压。

62. 发明申请

US20090285023A1 Memory device and memory programming method 有权
标题翻译：存储器和存储器编程方法
公开(公告)号：US20090285023A1
公开(公告)日：2009-11-19
申请号：US12453108
申请日：2009-04-29
申请人： Kyoung Lae Cho , Yong June Kim , Seung-Hwan Song , Jun Jin Kong
发明人： Kyoung Lae Cho , Yong June Kim , Seung-Hwan Song , Jun Jin Kong
IPC分类号： G11C16/02 , G11C7/00 , G11C16/06
CPC分类号： G11C16/10 , G11C11/5628 , G11C2211/5621
摘要： Provided are memory devices and memory programming methods. A memory device may include a multi-bit cell array including a plurality of multi-bit cells, a programming unit configured to program a first data page in the plurality of multi-bit cells and to program a second data page in the multi-bit cells with the programmed first data page, a first controller configured to divide the multi-bit cells with the programmed first data page into a first group and a second group, and a second controller configured to set a target threshold voltage interval of each of the multi-bit cells included in the first group based on first read voltage levels and the second data page, and to set a target threshold voltage interval of each of the multi-bit cells included in the second group based on second read threshold voltage levels and the second data page.
摘要翻译：提供的是存储器件和存储器编程方法。存储器件可以包括包括多个多位单元的多位单元阵列，编程单元，被配置为对多个多位单元中的第一数据页进行编程，并编程多位单元中的第二数据页具有编程的第一数据页的单元，被配置为将多位单元与编程的第一数据页划分为第一组和第二组的第一控制器，以及配置成将每个的第一数据页的目标阈值电压间隔基于第一读取电压电平和第二数据页面包括在第一组中的多位单元，并且基于第二读取阈值电压电平来设置包括在第二组中的每个多位单元的目标阈值电压间隔，以及第二个数据页面。

63. 发明申请

US20080320064A1 Method and apparatus for controlling reading level of memory cell 有权
标题翻译：用于控制存储单元的读取电平的方法和装置
公开(公告)号：US20080320064A1
公开(公告)日：2008-12-25
申请号：US12003545
申请日：2007-12-28
申请人： Sung Chung Park , Jun Jin Kong , Seung-Hwan Song , Dong Ku Kang
发明人： Sung Chung Park , Jun Jin Kong , Seung-Hwan Song , Dong Ku Kang
IPC分类号： G06F1/16
CPC分类号： G11C16/28 , G11C29/02 , G11C29/026 , G11C29/028 , G11C2029/0411
摘要： A method and apparatus for controlling a reading level of a memory cell are provided. The method of controlling a reading level of a memory cell may include: receiving metric values calculated based on given voltage levels and reference levels; generating summed values for each of the reference levels by summing metric values corresponding to levels of a received signal from among the received metric values; selecting the reference level having the greatest value of the generated summed values from the reference levels; and controlling the reading level of the memory cell based on the selected reference level.
摘要翻译：提供了一种用于控制存储单元的读取电平的方法和装置。控制存储器单元的读取电平的方法可以包括：接收基于给定电压电平和参考电平计算出的度量值; 通过对应于来自接收到的度量值中的接收信号的电平的度量值相加来产生每个参考电平的相加值; 从所述参考电平中选择具有所生成的总和值的最大值的参考电平; 以及基于所选择的参考电平来控制所述存储器单元的读取电平。

64. 发明授权

US08116141B2 Method analyzing threshold voltage distribution in nonvolatile memory 有权
标题翻译：方法分析非易失性存储器中的阈值电压分布
公开(公告)号：US08116141B2
公开(公告)日：2012-02-14
申请号：US12558627
申请日：2009-09-14
申请人： Han Woong Yoo , Seung-Hwan Song , Junjin Kong , Jaehong Kim
发明人： Han Woong Yoo , Seung-Hwan Song , Junjin Kong , Jaehong Kim
IPC分类号： G11C11/34
CPC分类号： G11C16/26 , G11C16/3427
摘要： A distribution analyzing method for a nonvolatile memory device having memory cells exhibiting overlapping first and second threshold voltage distributions includes; detecting a degree of overlap between the first and second threshold voltage distributions by reading data stored in the memory cells and determining read index data from the read data, and estimating a distribution characteristic for at least one of the overlapping threshold voltage distributions using the read index data.
摘要翻译：一种具有显示重叠的第一和第二阈值电压分布的存储单元的非易失性存储器件的分布分析方法包括：通过读取存储在存储单元中的数据并根据读取的数据确定读取的索引数据来检测第一和第二阈值电压分布之间的重叠程度，并且使用读取的索引来估计至少一个重叠阈值电压分布的分布特性数据。

65. 发明授权

US11694751B2 Logic compatible flash memory programming with a pulse width control scheme 有权
公开(公告)号：US11694751B2
公开(公告)日：2023-07-04
申请号：US16951927
申请日：2020-11-18
申请人： Seung-Hwan Song
发明人： Seung-Hwan Song
IPC分类号： G11C16/34 , G11C16/10
CPC分类号： G11C16/10 , G11C16/3459
摘要： A selective non-volatile memory programming method for a selected memory cell in a memory array is described so as to reduce or avoid program disturbance on an unselected memory cell. This selective programming method comprises: applying a programming pulse to a selected memory cell to be programmed and an unselected memory cell, wherein the programming pulse allows a change of the unselected memory cell within a range specified; boosting a region of the unselected memory cell; and setting a threshold time of the programming pulse, wherein the threshold time is defined when an absolute magnitude of a voltage difference between a floating gate of the unselected memory cell and the boosted region of the unselected memory cell reaches a threshold value defined.

66. 发明申请

US20210166763A1 LOGIC COMPATIBLE FLASH MEMORY PROGRAMMING WITH A PULSE WIDTH CONTROL SCHEME 有权
公开(公告)号：US20210166763A1
公开(公告)日：2021-06-03
申请号：US16951927
申请日：2020-11-18
申请人： Seung-Hwan Song
发明人： Seung-Hwan Song
IPC分类号： G11C16/10 , G11C16/34
摘要： A selective non-volatile memory programming method for a selected memory cell in a memory array is described so as to reduce or avoid program disturbance on an unselected memory cell. This selective programming method comprises: applying a programming pulse to a selected memory cell to be programmed and an unselected memory cell, wherein the programming pulse allows a change of the unselected memory cell within a range specified; boosting a region of the unselected memory cell; and setting a threshold time of the programming pulse, wherein the threshold time is defined when an absolute magnitude of a voltage difference between a floating gate of the unselected memory cell and the boosted region of the unselected memory cell reaches a threshold value defined.

67. 发明授权

US07145763B2 High-voltage electric double layer capacitor 有权
标题翻译：高压双电层电容器
公开(公告)号：US07145763B2
公开(公告)日：2006-12-05
申请号：US11240373
申请日：2005-10-03
申请人： Yu-Tack Kim , Moon-Bae Lee , Sang-Hyun Lee , Sang-Ick Lee , Chul-Wan Park , Jin-Bae Park , Kwang-Chul Roh , Jin-Hyoung Son , Seung-Hwan Song
发明人： Yu-Tack Kim , Moon-Bae Lee , Sang-Hyun Lee , Sang-Ick Lee , Chul-Wan Park , Jin-Bae Park , Kwang-Chul Roh , Jin-Hyoung Son , Seung-Hwan Song
IPC分类号： H01G9/00 , H01G9/02
CPC分类号： H01G9/155 , H01G9/151 , Y02E60/13
摘要： The present invention relates to a high-voltage electric double layer capacitor (EDLC), and more particularly, to an EDLC in which a surge voltage and an operating voltage are enhanced by improving the structure of a unit cell. The EDLC according to the present invention includes a unit cell having at least three electrodes. According to a preferred embodiment of the present invention, the unit cell has a structure constructed by sequentially laminating a first insulating paper layer with a sheet of insulating paper, a first electrode layer with at least two electrodes, a second insulating paper layer with a sheet of insulating paper, and a second electrode layer with at least one electrode. In accordance with the present invention, the number of electrode-facing surfaces increases, and a surge voltage and an operating voltage increase in proportion to the increased number of the electrode-facing surfaces, resulting in a high energy storage density. Accordingly, the present invention has advantages in that an EDLC with a single cell can be applied to products, an EDLC module can be miniaturized, and there is no need for a protection circuit for maintaining voltage balance on a unit cell basis upon fabrication of the module.
摘要翻译：高电压双层电容器（EDLC）技术领域本发明涉及一种高压双电层电容器（EDLC），更具体地说，涉及一种通过改善晶胞结构来提高浪涌电压和工作电压的EDLC。根据本发明的EDLC包括具有至少三个电极的单元电池。根据本发明的优选实施例，单元电池具有通过依次层叠第一绝缘纸层与绝缘纸片，具有至少两个电极的第一电极层，具有片材的第二绝缘纸层而构成的结构的绝缘纸，以及具有至少一个电极的第二电极层。根据本发明，面向电极的表面的数量增加，并且浪涌电压和工作电压与增加的电极面对表面的数量成比例地增加，导致高的储能密度。因此，本发明的优点在于，具有单个电池的EDLC可以应用于产品，EDLC模块可以被小型化，并且不需要保护电路，用于在制造基于单元的基础上保持基于单元电池的电压平衡模块。

68. 发明申请

US20060221551A1 HIGH-VOLTAGE ELECTRIC DOUBLE LAYER CAPACITOR 有权
标题翻译：高压双电层电容器
公开(公告)号：US20060221551A1
公开(公告)日：2006-10-05
申请号：US11240373
申请日：2005-10-03
申请人： Yu-Tack Kim , Jin-Hyoung Son , Moon-Bae Lee , Sang-Hyun Lee , Kwang-Chul Roh , Seung-Hwan Song , Chul-Wan Park , Sang-Ick Lee , Jin-Bae Park
发明人： Yu-Tack Kim , Jin-Hyoung Son , Moon-Bae Lee , Sang-Hyun Lee , Kwang-Chul Roh , Seung-Hwan Song , Chul-Wan Park , Sang-Ick Lee , Jin-Bae Park
IPC分类号： H01G9/00
CPC分类号： H01G9/155 , H01G9/151 , Y02E60/13
摘要： The present invention relates to a high-voltage electric double layer capacitor (EDLC), and more particularly, to an EDLC in which a surge voltage and an operating voltage are enhanced by improving the structure of a unit cell. The EDLC according to the present invention includes a unit cell having at least three electrodes. According to a preferred embodiment of the present invention, the unit cell has a structure constructed by sequentially laminating a first insulating paper layer with a sheet of insulating paper, a first electrode layer with at least two electrodes, a second insulating paper layer with a sheet of insulating paper, and a second electrode layer with at least one electrode. In accordance with the present invention, the number of electrode-facing surfaces increases, and a surge voltage and an operating voltage increase in proportion to the increased number of the electrode-facing surfaces, resulting in a high energy storage density. Accordingly, the present invention has advantages in that an EDLC with a single cell can be applied to products, an EDLC module can be miniaturized, and there is no need for a protection circuit for maintaining voltage balance on a unit cell basis upon fabrication of the module.
摘要翻译：高电压双层电容器（EDLC）技术领域本发明涉及一种高压双电层电容器（EDLC），更具体地说，涉及一种通过改善晶胞结构来提高浪涌电压和工作电压的EDLC。根据本发明的EDLC包括具有至少三个电极的单元电池。根据本发明的优选实施例，单元电池具有通过依次层叠第一绝缘纸层与绝缘纸片，具有至少两个电极的第一电极层，具有片材的第二绝缘纸层而构成的结构的绝缘纸，以及具有至少一个电极的第二电极层。根据本发明，面向电极的表面的数量增加，并且浪涌电压和工作电压与增加的电极面对表面的数量成比例地增加，导致高的储能密度。因此，本发明的优点在于，具有单个电池的EDLC可以应用于产品，EDLC模块可以被小型化，并且不需要保护电路，用于在制造基于单元的基础上维持基于单元电池的电压平衡模块。

69. 发明申请

US20100241928A1 Data Processing System Having ECC Encoding and Decoding Circuits Therein with Code Rate Selection Based on Bit Error Rate Detection 审中-公开
标题翻译：具有基于误码率检测的码率选择的ECC编码和解码电路的数据处理系统
公开(公告)号：US20100241928A1
公开(公告)日：2010-09-23
申请号：US12716793
申请日：2010-03-03
申请人： Jaehong Kim , Yong June Kim , Junjin Kong , Seung-Hwan Song
发明人： Jaehong Kim , Yong June Kim , Junjin Kong , Seung-Hwan Song
IPC分类号： H03M13/05 , G06F11/10
CPC分类号： H03M13/618 , G06F11/1012 , H03M13/13 , H03M13/353 , H03M13/3738 , H03M13/6356 , H03M13/6362
摘要： A data processing system includes an error checking and correction (ECC) encoding circuit, an integrated circuit memory and a code rate control circuit. The ECC encoding circuit is configured to selectively apply a plurality of unique ECC code rates to write data received by the data processing system during an operation to convert the write data into encoded data, in response to a code rate selection signal. The integrated circuit memory includes a plurality of storage regions therein. These storage regions are configured to receive respective portions of the encoded data from the ECC encoding circuit. The code rate control circuit is configured to generate the code rate selection signal. This code rate selection signal has a value that specifies the corresponding ECC code rate to be applied to respective portions of the write data.
摘要翻译：数据处理系统包括纠错（ECC）编码电路，集成电路存储器和码率控制电路。 ECC编码电路被配置为响应于码率选择信号，在操作期间选择性地应用多个唯一ECC码率来写入由数据处理系统接收的数据，以将写入数据转换为编码数据。集成电路存储器包括多个存储区域。这些存储区域被配置为从ECC编码电路接收编码数据的相应部分。码率控制电路被配置为产生码率选择信号。该码率选择信号具有指定应用于写入数据的各个部分的相应的ECC码率的值。

70. 发明授权

US07507553B2 Galleria mellonella derived composition for detecting peptidoglycan, a method for use thereof, and a diagnostic kit containing the same 失效
标题翻译：用于检测肽聚糖的环孢霉烯衍生组合物，其使用方法和含有该肽的诊断试剂盒
公开(公告)号：US07507553B2
公开(公告)日：2009-03-24
申请号：US11460406
申请日：2006-07-27
申请人： Bu-Soo Park , Bok-Luel Lee , Ji-Won Park , Jeong-Mi Yeo , Hyun-Sic Kim , Chang-Hun Joo , Moon-Suk Kim , Seung-Hwan Song , Jong-Won Yoon , Yeon-Sung Park , Hong-Lak Kim , Joong-Hyuck Auh , Tae-Hoon Cho
发明人： Bu-Soo Park , Bok-Luel Lee , Ji-Won Park , Jeong-Mi Yeo , Hyun-Sic Kim , Chang-Hun Joo , Moon-Suk Kim , Seung-Hwan Song , Jong-Won Yoon , Yeon-Sung Park , Hong-Lak Kim , Joong-Hyuck Auh , Tae-Hoon Cho
IPC分类号： C12Q1/26
CPC分类号： G01N33/56911 , C12Q1/04 , C12Q1/26 , G01N2333/43552
摘要： The present invention relates to a composition for selectively detecting an extremely small amount of peptidoglycan in sample, a preparation method of the composition, and a detection kit for peptidoglycan. It is possible to quantify a small amount of peptidoglycan contained in human blood, tissue, body fluid, water or food, and to diagnose an infection of microorganism with peptidoglycan as a component of cell wall using the composition and the detection kit. In addition, the composition can be applied for a diagnosis reagent of detecting an infection of Gram-positive bacteria in animal or human being in advance, and thus, can be used for the prevention or treatment of food poisonings and bacterial sepsis.
摘要翻译：本发明涉及用于选择性地检测样品中极少量的肽聚糖的组合物，该组合物的制备方法和用于肽聚糖的检测试剂盒。使用组合物和检测试剂盒，可以量化少量的人血液，组织，体液，水或食物中的肽聚糖，并利用肽聚糖作为细胞壁的组分来诊断微生物的感染。此外，该组合物可以预先用于检测动物或人类中革兰氏阳性菌感染的诊断试剂，因此可用于预防或治疗食物中毒和细菌性败血症。

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