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61. 发明授权

US06246077B1 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US06246077B1
公开(公告)日：2001-06-12
申请号：US09396372
申请日：1999-09-15
申请人： Setsuko Kobayashi , Takashi Shinohe , Tomoki Inoue , Akihiro Yahata
发明人： Setsuko Kobayashi , Takashi Shinohe , Tomoki Inoue , Akihiro Yahata
IPC分类号： H01L310312
CPC分类号： H01L29/66068 , H01L29/045 , H01L29/0657 , H01L29/1608 , H01L29/267 , H01L29/7801 , H01L29/7802 , H01L29/7816 , H01L29/7838
摘要： A semiconductor device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of the first conductivity type formed on the surface of the first semiconductor layer, the energy difference between the bottom of the conductive band and the vacuum level in the second semiconductor layer being smaller than that in the first semiconductor layer, a gate electrode formed above the second semiconductor layer with a gate insulating film interposed therebetween, and a pair of third semiconductor layers of the second conductivity type, being in contact with at least the first semiconductor layer and faced each other in a region of the surface of the first semiconductor layer, so that a channel region is formed under the gate electrode.
摘要翻译：半导体器件包括第一导电类型的第一半导体层，形成在第一半导体层的表面上的第一导电类型的第二半导体层，导电带的底部与第二半导体层的真空度之间的能量差半导体层比第一半导体层小的栅电极，形成在第二半导体层上方的栅极绝缘膜之间的栅电极和第二导电类型的一对第三半导体层与至少第一半导体层半导体层并且在第一半导体层的表面的区域中彼此面对，从而在栅电极下形成沟道区。

62. 发明授权

US06137136A Power semiconductor device 失效
标题翻译：功率半导体器件
公开(公告)号：US06137136A
公开(公告)日：2000-10-24
申请号：US932464
申请日：1997-09-18
申请人： Akihiro Yahata , Satoshi Urano , Tomoki Inoue , Ichiro Omura
发明人： Akihiro Yahata , Satoshi Urano , Tomoki Inoue , Ichiro Omura
IPC分类号： H01L29/74 , H01L21/336 , H01L29/06 , H01L29/423 , H01L29/739 , H01L29/749 , H01L29/78 , H01L29/76
CPC分类号： H01L29/0696 , H01L29/7397 , H01L29/4236
摘要： An injection enhanced insulated gate bipolar transistor is disclosed in which an average roughness of silicon on the side and bottom surfaces of trench grooves below a gate oxide film is made to be 0.6 nm or smaller. Irregular portions on the surface of silicon of the gate oxide film can be prevented. Thus, lowering of the gate breakdown voltage occurring because of dispersion of the thickness of the gate oxide film due to the irregular portions can be prevented.
摘要翻译：公开了一种注入增强型绝缘栅双极型晶体管，其中在栅极氧化膜下方的沟槽槽的侧表面和底表面上的平均粗糙度为0.6nm或更小。可以防止栅极氧化膜的硅表面上的不规则部分。因此，可以防止由于不规则部分导致的栅极氧化膜的厚度的分散而产生的栅极击穿电压的降低。

63. 发明授权

US5977564A Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US5977564A
公开(公告)日：1999-11-02
申请号：US951674
申请日：1997-10-16
申请人： Setsuko Kobayashi , Takashi Shinohe , Tomoki Inoue , Akihiro Yahata
发明人： Setsuko Kobayashi , Takashi Shinohe , Tomoki Inoue , Akihiro Yahata
IPC分类号： H01L21/04 , H01L21/205 , H01L21/336 , H01L29/04 , H01L29/06 , H01L29/12 , H01L29/24 , H01L29/267 , H01L29/78 , H01L31/0312
CPC分类号： H01L29/66068 , H01L29/045 , H01L29/0657 , H01L29/267 , H01L29/7801 , H01L29/7802 , H01L29/7816 , H01L29/7838 , H01L29/1608
摘要： A semiconductor device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of the first conductivity type formed on the surface of the first semiconductor layer, the energy difference between the bottom of the conductive band and the vacuum level in the second semiconductor layer being smaller than that in the first semiconductor layer, a gate electrode formed above the second semiconductor layer with a gate insulating film interposed therebetween, and a pair of third semiconductor layers of the second conductivity type, being in contact with at least the first semiconductor layer and faced each other in a region of the surface of the first semiconductor layer, so that a channel region is formed under the gate electrode.
摘要翻译：半导体器件包括第一导电类型的第一半导体层，形成在第一半导体层的表面上的第一导电类型的第二半导体层，导电带的底部与第二半导体层的真空度之间的能量差半导体层比第一半导体层小的栅电极，形成在第二半导体层上方的栅极绝缘膜之间的栅电极和第二导电类型的一对第三半导体层与至少第一半导体层半导体层并且在第一半导体层的表面的区域中彼此面对，从而在栅电极下形成沟道区。

64. 发明授权

US5714775A Power semiconductor device 失效
标题翻译：功率半导体器件
公开(公告)号：US5714775A
公开(公告)日：1998-02-03
申请号：US633688
申请日：1996-04-19
申请人： Tomoki Inoue , Ichiro Omura , Hiromichi Ohashi
发明人： Tomoki Inoue , Ichiro Omura , Hiromichi Ohashi
IPC分类号： H01L29/06 , H01L29/10 , H01L29/32 , H01L29/739 , H01L29/74 , H01L31/111
CPC分类号： H01L29/7397 , H01L29/0696 , H01L29/1095 , H01L29/32
摘要： A p-type emitter layer having a low resistivity is arranged on a bottom surface of an n-type base layer having a high resistivity. A p-type base layer is formed in a top surface of the n-type base layer. Trenches are formed in the p-type base layer and the n-type base layer such that each trench penetrates the p-type base layer and reaches down to a halfway depth in the n-type base layer. Inter-trench regions made of semiconductor are defined between the trenches. An n-type emitter layer having a low resistivity is formed in a surface of the p-type base layer to be in contact with the upper part of each trench. A gate electrode is buried via a gate insulating film in each trench. That side surface of each inter-trench region which faces the gate electrode consists of a {100} plane.
摘要翻译：具有低电阻率的p型发射极层布置在具有高电阻率的n型基极层的底表面上。 p型基底层形成在n型基底层的顶表面上。在p型基底层和n型基底层中形成沟槽，使得每个沟槽穿过p型基底层并在n型基底层中下降到中间深度。在沟槽之间限定由半导体制成的沟槽间区域。在p型基底层的表面上形成具有低电阻率的n型发射极层，以与每个沟槽的上部接触。每个沟槽中的栅极绝缘膜埋入栅电极。面对栅电极的每个沟槽间区域的侧表面由{100}平面组成。

65. 发明授权

US5689121A Insulated-gate semiconductor device 失效
标题翻译：绝缘栅半导体器件
公开(公告)号：US5689121A
公开(公告)日：1997-11-18
申请号：US480389
申请日：1995-06-07
申请人： Mitsuhiko Kitagawa , Ichiro Omura , Akio Nakagawa , Norio Yasuhara , Tomoki Inoue
发明人： Mitsuhiko Kitagawa , Ichiro Omura , Akio Nakagawa , Norio Yasuhara , Tomoki Inoue
IPC分类号： H01L29/06 , H01L29/423 , H01L29/739 , H01L29/745 , H01L29/74 , H01L31/111
CPC分类号： H01L29/7455 , H01L29/7394 , H01L29/7397 , H01L29/7398 , H01L29/0696 , H01L29/4236
摘要： An insulated-gate semiconductor device comprises a P type emitter layer, an N.sup.- high-resistive base layer formed on the P type emitter layer, and a P type base layer contacting the N.sup.- high-resistive base layer. A plurality of trenches are formed having a depth to reach into the N.sup.- high-resistive base layer from the P type base layer. A gate electrode covered with a gate insulation film is buried in each trench. An N type source layer to be connected to a cathode electrode is formed in the surface of the P type base layer in a channel region between some trenches, thereby forming an N channel MOS transistor for turn-on operation. A P channel MOS transistor connected to the P base layer is formed in a channel region between other trenches so as to discharge the holes outside the device upon turn-off operation.
摘要翻译：绝缘栅半导体器件包括P型发射极层，形成在P型发射极层上的N-高电阻基极层和与N型高电阻基极层接触的P型基极层。形成从P型基底层到达N个高电阻基底层的深度的多个沟槽。覆盖有栅极绝缘膜的栅电极被埋在每个沟槽中。在一些沟槽之间的沟道区域中，在P型基极层的表面形成有与阴极连接的N型源极层，从而形成用于导通工作的N沟道MOS晶体管。连接到P基极层的P沟道MOS晶体管形成在其它沟槽之间的沟道区域中，以便在关断操作时将器件的孔排出。

66. 发明申请

US20110031052A1 Piping Structure for Transporting a Fuel 有权
标题翻译：用于运输燃料的管道结构
公开(公告)号：US20110031052A1
公开(公告)日：2011-02-10
申请号：US12880448
申请日：2010-09-13
申请人： Tomoki Inoue , Masayuki Sasagawa
发明人： Tomoki Inoue , Masayuki Sasagawa
IPC分类号： B60K15/00 , F16L37/00
CPC分类号： F02M37/0017 , F16L3/12 , F16L3/127 , F16L11/04 , F16L33/30 , F16L37/0987 , F16L2011/047 , F16L2201/10
摘要： A piping structure for transporting a fuel arranged between an engine and a fuel tank, is constructed by use of a resin tube that is formed in a straight tubular shape. The resin tube is flexed and bent at one or more points along a longitudinal direction of the resin tube to define one or more bent portions and thereby is provided with a predetermined bent shape. The resin tube is fixed in a motor vehicle body so as to retain the bent portions and thereby assembled in the motor vehicle body.
摘要翻译：用于输送配置在发动机和燃料箱之间的燃料的配管结构体通过使用形成为直管状的树脂管构成。树脂管沿着树脂管的长度方向的一个或多个点弯曲并弯曲，以限定一个或多个弯曲部分，从而设置有预定的弯曲形状。树脂管被固定在机动车体中，以便保持弯曲部分，从而组装在机动车体中。

67. 发明授权

US07806213B2 Piping structure for transporting a fuel 有权
标题翻译：用于运输燃料的管道结构
公开(公告)号：US07806213B2
公开(公告)日：2010-10-05
申请号：US11304379
申请日：2005-12-15
申请人： Tomoki Inoue , Masayuki Sasagawa
发明人： Tomoki Inoue , Masayuki Sasagawa
IPC分类号： B60K15/01
CPC分类号： F02M37/0017 , F16L3/12 , F16L3/127 , F16L11/04 , F16L33/30 , F16L37/0987 , F16L2011/047 , F16L2201/10
摘要： A piping structure for transporting a fuel arranged between an engine and a fuel tank, is constructed by use of a resin tube that is formed in a straight tubular shape. The resin tube is flexed and bent at one or more points along a longitudinal direction of the resin tube to define one or more bent portions and thereby is provided with a predetermined bent shape. The resin tube is fixed in a motor vehicle body so as to retain the bent portions and thereby assembled in the motor vehicle body.
摘要翻译：用于输送配置在发动机和燃料箱之间的燃料的配管结构体通过使用形成为直管状的树脂管构成。树脂管沿着树脂管的长度方向的一个或多个点弯曲并弯曲，以限定一个或多个弯曲部分，从而设置有预定的弯曲形状。树脂管被固定在机动车体中，以便保持弯曲部分，从而组装在机动车体中。

68. 发明授权

US07750439B2 ESD protection device 失效
标题翻译： ESD保护装置
公开(公告)号：US07750439B2
公开(公告)日：2010-07-06
申请号：US11563848
申请日：2006-11-28
申请人： Tomoki Inoue
发明人： Tomoki Inoue
IPC分类号： H01L23/62
CPC分类号： H01L27/0255
摘要： An ESD protection device includes: a semiconductor substrate of a first conductivity type having a first major surface and a second major surface; a signal input electrode formed on the first major surface of the semiconductor substrate; a base region of a second conductivity type formed on a surface region of the second major surface of the semiconductor substrate; a diffusion region of the first conductivity type; a resistor layer formed on the second major surface of the semiconductor substrate of the first conductivity type; a signal output electrode electrically connected to the diffusion region of the first conductivity type; and a ground electrode electrically connected to the resistor layer. The diffusion region is selectively formed on a surface region of the base region of the second conductivity type in the semiconductor substrate of the first conductivity type. The resistor layer is electrically connected to the diffusion region of the first conductivity type.
摘要翻译： ESD保护装置包括：具有第一主表面和第二主表面的第一导电类型的半导体衬底; 形成在所述半导体衬底的所述第一主表面上的信号输入电极; 形成在所述半导体衬底的所述第二主表面的表面区域上的第二导电类型的基极区域; 第一导电类型的扩散区; 形成在第一导电类型的半导体衬底的第二主表面上的电阻层; 电连接到第一导电类型的扩散区的信号输出电极; 以及电连接到电阻层的接地电极。扩散区选择性地形成在第一导电类型的半导体衬底中的第二导电类型的基极区域的表面区域上。电阻层电连接到第一导电类型的扩散区域。

69. 发明授权

US07439605B2 Semiconductor device and method for manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US07439605B2
公开(公告)日：2008-10-21
申请号：US11117331
申请日：2005-04-29
申请人： Hitoshi Kobayashi , Tomoki Inoue , Satoshi Aida , Yasushi Takahashi
发明人： Hitoshi Kobayashi , Tomoki Inoue , Satoshi Aida , Yasushi Takahashi
IPC分类号： H01L29/76
CPC分类号： H01L29/7802 , H01L21/26586 , H01L29/0634 , H01L29/0653 , H01L29/0696 , H01L29/405 , H01L29/408 , H01L29/66712 , H01L29/7801
摘要： A semiconductor device include a plurality of active element cells including first element regions of a first conductivity type and second element regions of a second conductivity type, the second element regions disposed between the first element regions; and isolation regions disposed between the active element cells so as to isolate the active element cells from each other, the isolation regions being filled with a plurality of semi-insulating particles including granular insulators covered by semiconductor films.
摘要翻译：半导体器件包括多个有源元件单元，其包括第一导电类型的第一元件区域和第二导电类型的第二元件区域，第二元件区域设置在第一元件区域之间; 以及设置在有源元件单元之间以隔离有源元件元件的隔离区域，隔离区域填充有多个包含半导体膜覆盖的粒状绝缘体的半绝缘粒子。

70. 发明申请

US20080173894A1 SEMICONDUCTOR DEVICE 失效
标题翻译：半导体器件
公开(公告)号：US20080173894A1
公开(公告)日：2008-07-24
申请号：US12014449
申请日：2008-01-15
申请人： Tomoki Inoue
发明人： Tomoki Inoue
IPC分类号： H01L29/74
CPC分类号： H01L29/87 , H01L27/0262
摘要： A semiconductor substrate has a second conductivity type cathode layer formed thereon. The cathode layer has a first conductivity type base layer formed thereon. A first anode region of the second conductivity type is formed in the surface of the base layer. A second anode region of the first conductivity type is formed in the first anode region. A first semiconductor region of the first conductivity type is formed in contact with the semiconductor substrate. A second semiconductor region of the second conductivity type is formed adjacent to the first semiconductor region and in contact with the cathode layer. An intermediate electrode is formed on the surfaces of the first semiconductor region and the contact region.
摘要翻译：半导体衬底具有形成在其上的第二导电类型的阴极层。阴极层具有在其上形成的第一导电型基底层。第二导电类型的第一阳极区域形成在基层的表面中。第一导电类型的第二阳极区域形成在第一阳极区域中。第一导电类型的第一半导体区域形成为与半导体衬底接触。第二导电类型的第二半导体区域形成为与第一半导体区域相邻并与阴极层接触。在第一半导体区域和接触区域的表面上形成中间电极。

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