会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 61. 发明授权
    • Electronic device and data processing device for implementing cryptographic algorithms
    • 用于实现加密算法的电子设备和数据处理设备
    • US08577942B2
    • 2013-11-05
    • US11629358
    • 2004-07-07
    • Daisuke SuzukiMinoru Saeki
    • Daisuke SuzukiMinoru Saeki
    • G06F1/02
    • H04L9/0625H04L9/003H04L2209/08H04L2209/125
    • An electronic device that defends against an attack trying to identify confidential information from power consumption is provided without any circuit that performs a complementary operation to eliminate bias in power consumption. An elementary device A 100 is formed by a plurality of transistors 101-112. The elementary device A 100 receives inputs signals x1, x2, a random number r, and a control signal en, and outputs z. The output z is obtained by XORing (x1^r)&(x2^r) with the random number r. After the state transitions of the input signal, x1, x2, and the random number r, are settled, the control signal en is used to output z. This makes the signal transition rate of the output z equal, thereby defending against an attack trying to identify confidential information from power consumption.
    • 提供了一种电子设备,用于防止尝试从功率消耗中识别机密信息的攻击,而没有任何执行补充操作以消除功耗偏差的电路。 基本器件A 100由多个晶体管101-112形成。 基本设备A 100接收输入信号x1,x2,随机数r和控制信号en,并输出z。 通过用随机数r进行XORing(x1 ^ r)&(x2 ^ r)获得输出z。 在输入信号的状态转换x1,x2和随机数r之后,控制信号en用于输出z。 这使得输出z的信号转换速率相等,从而防止试图从功耗识别机密信息的攻击。
    • 66. 发明授权
    • Arithmetic unit and arithmetic processing method for operating with higher and lower clock frequencies
    • 算术单元和算术处理方法,用于操作较高和较低的时钟频率
    • US08219847B2
    • 2012-07-10
    • US12604806
    • 2009-10-23
    • Daisuke SuzukiMinoru SaekiYuichiro Nariyoshi
    • Daisuke SuzukiMinoru SaekiYuichiro Nariyoshi
    • G06F1/04G06F1/32
    • G06F1/10G06F1/3203G06F1/324G06F9/3001Y02D10/126
    • There is a need for providing a battery-less integrated circuit (IC) card capable of operating in accordance with a contact usage or a non-contact usage, preventing coprocessor throughput from degrading despite a decreased clock frequency for reduced power consumption under non-contact usage, and ensuring high-speed processing under non-contact usage. A dual interface card is a battery-less IC card capable of operating in accordance with a contact usage or a non-contact usage. The dual interface card operates at a high clock under contact usage and at a low clock under non-contact usage. A targeted operation comprises a plurality of different basic operations. The dual interface card comprises a basic arithmetic circuit group. Under the contact usage, the basic arithmetic circuit group performs one basic operation of the targeted operation at one cycle. Under the non-contact usage, the basic arithmetic circuit group sequentially performs at least two basic operations of the targeted operation at one cycle.
    • 需要提供能够根据接触使用或非接触使用来操作的无电池集成电路(IC)卡,防止协处理器吞吐量降低,尽管降低的时钟频率以减少非接触下的功耗 使用,并确保非接触式使用下的高速处理。 双接口卡是能够根据联系人使用或非接触使用来操作的无电池IC卡。 双接口卡在接触式使用的高时钟下工作,在非接触式使用的情况下以低时钟工作。 目标操作包括多个不同的基本操作。 双接口卡包括基本运算电路组。 在接触使用情况下,基本算术电路组在一个周期执行目标操作的一个基本操作。 在非接触使用情况下,基本算术电路组在一个周期顺序地执行目标操作的至少两个基本操作。
    • 67. 发明申请
    • External Preparation
    • 外部准备
    • US20120164357A1
    • 2012-06-28
    • US13393702
    • 2010-07-23
    • Daisuke SuzukiJunko TamadaNobuyoshi Koga
    • Daisuke SuzukiJunko TamadaNobuyoshi Koga
    • B32B1/08A61Q19/00A61K8/92
    • A61Q19/02A61K8/342A61K8/44A61K8/466A61K8/8147Y10T428/13
    • The present invention is an external preparation that comprises (A) a higher alcohol, (B) 0.01-5 wt % of a long chain acyl sulfonate anionic surfactant represented by the following general formula (1), such as stearoyl methyltaurate, and (C) 0.1-5 wt % of tranexamic acid, and has a pH of 3.0-6.0. R1CO-a-(CH2)nSO3M1   (1) [R′CO— denotes a saturated or unsaturated fatty acid residue (acyl group) having 10-22 carbon atoms on average; a denotes —O— or —NR2— (R2 denotes a hydrogen atom or an alkyl group having 1-3 carbon atoms); M1 denotes a hydrogen atom, alkali metal, alkali earth metal, ammonium, or organic amine; n denotes an integer 1-3.]The object of the present invention is to provide an external preparation containing tranexamic acid that does not cause precipitation of tranexamic acid crystals.
    • 本发明是一种外用制剂,其包含(A)高级醇,(B)0.01-5重量%的由以下通式(1)表示的长链酰基磺酸盐阴离子表面活性剂,例如硬脂酰甲基牛磺酸酯和(C )0.1-5重量%的氨甲环酸,并且具有3.0-6.0的pH。 R1CO-a-(CH2)nSO3M1(1)[R'CO-表示平均具有10-22个碳原子的饱和或不饱和脂肪酸残基(酰基) a表示-O-或-NR2-(R2表示氢原子或具有1-3个碳原子的烷基); M1表示氢原子,碱金属,碱土金属,铵或有机胺; n表示整数1-3。]本发明的目的是提供一种不引起凝血酸结晶沉淀的凝血酸的外用制剂。
    • 68. 发明申请
    • Adjustment Safeguard
    • 调整保障
    • US20120146250A1
    • 2012-06-14
    • US13074038
    • 2011-03-29
    • Joachim BaumhauerAlexander KrausYoshiharu IwasaDaisuke Suzuki
    • Joachim BaumhauerAlexander KrausYoshiharu IwasaDaisuke Suzuki
    • F02M3/08F02M19/04
    • F02M19/04F02M3/02F02M3/10Y10T137/7062Y10T137/7065
    • An adjustment safeguard for a set screw that is rotatably held in a housing has a cap that is non-rotatably secured on the head of the set screw. The cap is received in a sleeve of the housing and surrounded with minimal radial play by the sleeve that is essentially coaxially positioned relative to the cap. The cap is received with its axial length in the sleeve. The cap has a projection and the sleeve has a stop arranged in the interior of the sleeve. Projection and stop interact with each other in a rotational direction of the set screw. The cap has a top part and a separate bottom part. The bottom part is secured axially and non-rotatably on the head of the set screw. The bottom part engages with form fit the top part in the rotational direction and is axially connected to the top part.
    • 可旋转地保持在壳体中的定位螺钉的调节保护具有不可旋转地固定在固定螺钉的头部上的盖。 盖被容纳在壳体的套筒中并且被套筒的最小径向游隙包围,该套筒基本上相对于盖子同轴地定位。 盖子的轴向长度被套在套筒中。 盖具有突起,并且套筒具有布置在套筒内部的止挡件。 投影和停止在固定螺丝的旋转方向上彼此相互作用。 盖具有顶部和单独的底部。 底部部分被固定在固定螺钉的头部上并且不可旋转地固定。 底部与旋转方向上的顶部接合,并且轴向连接到顶部。
    • 70. 发明授权
    • Charge-controlling semiconductor integrated circuit
    • 充电控制半导体集成电路
    • US08035355B2
    • 2011-10-11
    • US12478065
    • 2009-06-04
    • Yoshihiro MotoichiDaisuke SuzukiYoshihiro TakahashiGentaro Kurokawa
    • Yoshihiro MotoichiDaisuke SuzukiYoshihiro TakahashiGentaro Kurokawa
    • H02J7/16H02J7/24
    • H02J7/0052G01R19/16519H03K17/0822
    • Disclosed is a charge-controlling semiconductor integrated circuit including: a current-controlling MOS transistor; a current detection circuit including a 1/N size current-detecting MOS transistor; and a gate voltage control circuit, wherein the current detection circuit includes an operational amplifier circuit, a bias condition of the current-detecting MOS transistor becomes same as the current-controlling MOS transistor based on an operational amplifier circuit output, voltage drops in lines from drain electrode to a corresponding input point of the operational amplifier circuit become the same by a parasitic resistance, and when the output of the operational amplifier circuit is applied to a control terminal of the bias condition controlling transistor, the drain voltages become the same potential, and the line from the drain electrode of the current-detecting MOS transistor to the input point is formed to be redundantly arranged inside the chip so that a parasitic resistance becomes a predetermined value.
    • 公开了一种电荷控制半导体集成电路,包括:电流控制MOS晶体管; 电流检测电路,包括1 / N尺寸电流检测MOS晶体管; 以及栅极电压控制电路,其中电流检测电路包括运算放大器电路,电流检测用MOS晶体管的偏置状态与基于运算放大器电路输出的电流控制用MOS晶体管相同, 漏电极到运算放大器电路的对应输入点变成相同的寄生电阻,并且当运算放大器电路的输出被施加到偏置条件控制晶体管的控制端时,漏极电压变为相同的电位, 形成从电流检测用MOS晶体管的漏极到输入点的线被冗余配置在芯片的内部,使寄生电阻成为规定值。