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    • 61. 发明授权
    • System and method for generating various simulation conditions for simulation analysis
    • 用于生成模拟分析的各种仿真条件的系统和方法
    • US07599826B2
    • 2009-10-06
    • US11309042
    • 2006-06-13
    • Shou-Kuo HsuCheng-Shien Li
    • Shou-Kuo HsuCheng-Shien Li
    • G06F17/50
    • G06F17/50G06F17/5009G06F17/5036G06F2217/10
    • A system for generating various simulation conditions for simulation analysis is disclosed. The system includes: a signal generating module (301) for generating an N-bit binary sequence consisting of “1” and “0” according to signal source parameters; a application module (302) for applying the N-bit binary sequence to generate the various simulation conditions according to control parameters; a noise generating module (303) for generating N influence values of Gauss noises with N standard deviations to N signal bit-widths; and an addition module (304) for adding the Gauss noises to corresponding digital waveform positions of the generated simulation conditions. A related method is also disclosed.
    • 公开了一种用于生成用于模拟分析的各种模拟条件的系统。 该系统包括:根据信号源参数产生由“1”和“0”组成的N位二进制序列的信号产生模块(301) 应用模块(302),用于根据控制参数应用所述N位二进制序列以产生各种仿真条件; 噪声产生模块(303),用于产生具有N个标准偏差N个信号位宽的高斯噪声的N个影响值; 以及用于将高斯噪声加到所产生的模拟条件的相应数字波形位置的加法模块(304)。 还公开了相关方法。
    • 62. 发明授权
    • Motherboard
    • 母板
    • US07596649B2
    • 2009-09-29
    • US11759238
    • 2007-06-07
    • Shou-Kuo HsuCheng-Shien Li
    • Shou-Kuo HsuCheng-Shien Li
    • G06F13/00
    • G06F13/4068G06F2213/0024H05K1/029H05K1/0295H05K2201/10363
    • A motherboard includes a chipset, a first connector pad suitable for receiving a first type of PCI connector, a second connector pad suitable for receiving a second type of PCI connector, a plurality of first transmission lines, a plurality of second transmission lines, and a plurality of areas for mounting switches. One end of each first transmission line is connected to the chipset, another end of each first transmission line is connected to an end of a corresponding area, one end of each second transmission line is connected to another end of the corresponding area, another end of each second transmission line is connected to the second connector pad, the first connector pad is connected to the plurality of first transmission lines, and the switches are selectively mounted on the plurality of areas.
    • 主板包括芯片组,适于接收第一类型的PCI连接器的第一连接器焊盘,适于接收第二类型的PCI连接器的第二连接器焊盘,多个第一传输线,多条第二传输线,以及 多个安装开关的区域。 每个第一传输线的一端连接到芯片组,每个第一传输线的另一端连接到相应区域的一端,每个第二传输线的一端连接到相应区域的另一端,另一端 每个第二传输线连接到第二连接器焊盘,第一连接器焊盘连接到多个第一传输线,并且开关选择性地安装在多个区域上。
    • 65. 发明授权
    • Printed circuit board able to suppress simultaneous switching noise
    • 印刷电路板能够抑制同时开关噪声
    • US07530043B2
    • 2009-05-05
    • US11563158
    • 2006-11-25
    • Shou-Kuo HsuCheng-Hong Liu
    • Shou-Kuo HsuCheng-Hong Liu
    • G06F17/50H05K7/08H05K1/11
    • H05K1/0216H05K2201/093H05K2201/09309H05K2201/09345H05K2201/09663
    • A printed circuit board includes a first layer including a first power portion and a first ground portion isolated from each other, and a second layer including a second power portion and a second ground portion isolated from each other. The second layer is spaced from the first layer. The second ground portion is arranged below the first power portion. The second power portion is arranged below the first ground portion. One portion of the first power portion overlaps one portion of the second power portion, and one portion of the first ground portion overlaps one portion of the second ground portion to provide a zero-intensity electric field between the first layer and the second layer. The first power portion is coupled to the second power portion via a first via. The first ground portion is coupled to the second ground portion via a second via.
    • 印刷电路板包括第一层,第一层包括彼此隔离的第一电力部分和第一接地部分,以及包括彼此隔离的第二电力部分和第二接地部分的第二层。 第二层与第一层间隔开。 第二接地部分布置在第一电力部分的下方。 第二动力部分布置在第一接地部分的下方。 第一功率部分的一部分与第二功率部分的一部分重叠,并且第一接地部分的一部分与第二接地部分的一部分重叠,以在第一层和第二层之间提供零强度电场。 第一功率部分经由第一通孔耦合到第二功率部分。 第一接地部分经由第二通孔耦合到第二接地部分。
    • 67. 发明申请
    • Method for selecting a ferrite bead for a filter
    • 用于选择过滤器的铁氧体磁珠的方法
    • US20070220050A1
    • 2007-09-20
    • US11525445
    • 2006-09-22
    • Shou-Kuo HsuChun-Jen ChenChun-Shan Hsiao
    • Shou-Kuo HsuChun-Jen ChenChun-Shan Hsiao
    • G06F17/00
    • H03H1/0007H03H2260/00
    • A method for selecting a ferrite bead for a filter to avoid a peak value in a frequency response curve of the filter is provided. The method includes the steps of: building an equivalent model database including parameters of equivalent models of ferrite beads, the parameters including an inductance and a capacitance of a corresponding equivalent model of each ferrite bead; calculating parameters of a desired ferrite bead in the filter based on parameters of the filter, the parameters of the ferrite bead including an inductance, a capacitance, and a resonant frequency; adjusting parameters of the filter until the calculated resonant frequency equals or approaches a desired resonant frequency, and finding an inductance and a capacitance respectively equaling or approaching the calculated inductance and the calculated capacitance in the database; and selecting a ferrite bead with the appropriate inductance and capacitance as found in the database for the filter.
    • 提供了一种用于选择用于滤波器的铁氧体磁珠以避免滤波器的频率响应曲线中的峰值的方法。 该方法包括以下步骤:构建等效模型数据库,其中包括铁素体磁珠的等效模型参数,其参数包括每个铁氧体磁珠的相应等效模型的电感和电容; 基于滤波器的参数,包括电感,电容和谐振频率的铁氧体磁珠的参数来计算滤波器中期望的铁氧体磁珠的参数; 调整滤波器的参数,直到计算出的谐振频率等于或接近期望的谐振频率,并且找到分别等于或接近计算出的电感的电感和电容以及数据库中的计算电容; 并选择具有适当的电感和电容的铁氧体磁珠,如过滤器数据库中所述。