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    • 61. 发明授权
    • Methods of fabricating bipolar junction transistors having a fin
    • 制造具有翅片的双极结型晶体管的方法
    • US08703571B2
    • 2014-04-22
    • US13535090
    • 2012-06-27
    • Po-Yao KeTao-Wen ChungShine ChungFu-Lung Hsueh
    • Po-Yao KeTao-Wen ChungShine ChungFu-Lung Hsueh
    • H01L21/331
    • H01L29/73H01L21/823431
    • A method of forming a semiconductor device is provided. The method includes forming a first fin above a substrate, forming a first emitter region in a first portion of the first fin, forming a first collector region in a second portion of the first fin, and forming a first base region in a third portion of the first fin. The third portion of the first fin is disposed underneath a first gate electrode. The method further includes forming a second fin adjacent to the first fin and above the substrate. The second fin is composed of a semiconductor material. The method also includes forming a first base contact over the second fin. The first base contact is coupled to the first base region through the second fin, the substrate, and the first fin.
    • 提供一种形成半导体器件的方法。 该方法包括在衬底上形成第一鳍片,在第一鳍片的第一部分中形成第一发射极区域,在第一鳍片的第二部分形成第一集电极区域,并在第三鳍片的第三部分形成第一基底区域 第一个翅膀 第一鳍片的第三部分设置在第一栅电极下方。 该方法还包括形成邻近第一鳍片和衬底上方的第二鳍片。 第二鳍由半导体材料构成。 该方法还包括在第二翅片上形成第一基底接触。 第一基底接触件通过第二鳍片,基底和第一鳍片耦合到第一基底区域。
    • 62. 发明授权
    • LCD driver
    • 液晶驱动
    • US08648779B2
    • 2014-02-11
    • US12582107
    • 2009-10-20
    • Fu-Lung HsuehYung-Chow PengKuo-Liang Deng
    • Fu-Lung HsuehYung-Chow PengKuo-Liang Deng
    • G09G5/00G09G3/36
    • G09G3/3688G09G2310/027G09G2320/02G09G2330/021
    • A method includes outputting a first signal from a first DAC decoder circuit in response to receiving a first number of bits of a digital control signal, outputting a second signal from a second DAC decoder circuit in response to receiving a second number of bits of the digital control signal, and alternately outputting one of the first and second signals to an LCD column from a buffer coupled to the first and second DAC decoder circuits. The first signal has a voltage level equal to one of a first plurality of voltage levels received at one of a first plurality of inputs of the first DAC decoder circuit. The second signal has a voltage level equal to one of a second plurality of voltage levels received at one of a second plurality of inputs of the second DAC decoder circuit.
    • 一种方法包括响应于接收数字控制信号的第一位数而输出来自第一DAC解码器电路的第一信号,响应于接收到数字控制信号的第二位数而从第二DAC解码器电路输出第二信号 并且从耦合到第一和第二DAC解码器电路的缓冲器交替地将第一和第二信号之一输出到LCD列。 第一信号具有等于在第一DAC解码器电路的第一多个输入端之一处接收的第一多个电压电平之一的电压电平。 第二信号具有等于在第二DAC解码器电路的第二多个输入端之一处接收的第二多个电压电平之一的电压电平。
    • 69. 发明申请
    • ELECTRICAL FUSE CIRCUIT FOR SECURITY APPLICATIONS
    • 用于安全应用的电气保险丝电路
    • US20100329061A1
    • 2010-12-30
    • US12881944
    • 2010-09-14
    • Shine ChungFu-Lung HsuehFu-Chieh Hsu
    • Shine ChungFu-Lung HsuehFu-Chieh Hsu
    • G11C17/16
    • G11C17/18
    • A fuse circuit is disclosed, which comprises at least one electrical fuse element having a resistance that changes after being stressed in an electromigration mode, a switching device serially coupled with the electrical fuse element in a predetermined path between a fuse programming power supply (VDDQ) and a low voltage power supply (GND) for selectively allowing a programming current passing through the electrical fuse element during a programming operation, and at least one peripheral circuit coupled to the VDDQ, wherein the peripheral circuit is active and draws current from the VDDQ during a fuse programming operation.
    • 公开了一种熔丝电路,其包括至少一个电熔丝元件,该电熔丝元件具有在电迁移模式下受到应力之后变化的电阻;开关装置,其在熔丝编程电源(VDDQ)之间的预定路径中与电熔丝元件串联连接, 以及用于在编程操作期间选择性地允许通过电熔丝元件的编程电流的低电压电源(GND),以及耦合到所述VDDQ的至少一个外围电路,其中所述外围电路是有效的并且在VDDQ期间从VDDQ引出电流 保险丝编程操作。