专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

61. 发明申请

US20050129830A1 Oil or fat composition 有权
标题翻译：油脂组成
公开(公告)号：US20050129830A1
公开(公告)日：2005-06-16
申请号：US11049975
申请日：2005-02-04
申请人： Shin Koike , Takatoshi Murase , Takanori Nii , Toshihiro Tanaka
发明人： Shin Koike , Takatoshi Murase , Takanori Nii , Toshihiro Tanaka
IPC分类号： A23D7/01 , A23D9/013 , A23K1/16 , A23L1/30 , A23L1/325 , A61K31/19 , A61K31/215 , A61K31/23 , A61K31/565 , A23D7/00
CPC分类号： A61K31/215 , A23D7/013 , A23D9/013 , A23K20/158 , A23L17/70 , A23L33/12 , A23V2002/00 , A61K31/19 , A61K31/23 , A61K31/565 , A61K2300/00 , A23V2250/1868 , A23V2250/712 , A23V2250/21 , A23V2250/2116 , A23V2250/187 , A23V2250/192 , A23V2250/182 , A23V2250/2136
摘要： The present invention relates to an oil or fat composition containing the following components (A) and (B): (A) from 80 to 99.9 wt. % of a monoglyceride containing 20 to 75 wt. % of docosahexaenoic acid (DHA) and 0.1 to 25 wt. % of icosapentaenoic acid (IPA), as the constituent fatty acids thereof, wherein the weight ratio of DHA/IPA being 2 or more; and (B) from 0.1 to 20 wt. % of a diglyceride.
摘要翻译：本发明涉及含有以下组分（A）和（B）的油或脂肪组合物：（A）80-99.9重量％％的单酸甘油酯含有20〜75wt。二十二碳六烯酸（DHA）的百分比和0.1至25wt。％的二十碳五烯酸（IPA）作为其构成脂肪酸，其中DHA / IPA的重量比为2以上; 和（B）0.1至20wt。％的甘油二酯。

62. 发明授权

US06869299B2 Power supply unit for electronic devices 失效
标题翻译：电子设备电源单元
公开(公告)号：US06869299B2
公开(公告)日：2005-03-22
申请号：US10700742
申请日：2003-11-04
申请人： Toshihiro Tanaka , Katsumi Myochin
发明人： Toshihiro Tanaka , Katsumi Myochin
IPC分类号： H01R13/71 , H01M2/10 , H01R13/05 , H01R13/24 , H01R13/26 , H01R29/00
CPC分类号： H01R13/26 , H01R13/05 , H01R13/24
摘要： A power supply unit for electronic devices has an insulating battery pack holder with a hollow portion to accommodate a battery pack detachably; a plurality of connector contacts and a switch contact formed of conductive metal and disposed inside the battery pack holder, part of each connector contact protruding toward the hollow portion, the switch contact capable of detaching from or attaching to a predetermined one of the connector contacts with a moving contact portion. When the battery pack is accommodated in the hollow portion, its electrode terminals elastically touch corresponding connector contacts to be conductively connected to a driver circuit. In removal of the battery pack from the hollow portion, when the predetermined connector contact protrudes into the hollow portion by a predetermined distance according to a reduction in urging force of the electrode terminal, the predetermined connector contact touches the switch contact to output a detection signal.
摘要翻译：一种用于电子设备的电源单元具有绝缘电池组保持器，其具有中空部分以可拆卸地容纳电池组; 多个连接器触点和由导电金属形成并设置在电池组保持器内部的开关触点，每个连接器触头的朝向中空部分突出的部分，开关触点能够与预定的一个连接器触点分离或附接到连接器触点中，移动接触部分。当电池组被容纳在中空部分中时，其电极端子弹性地接触相应的连接器触头以与驱动电路导电连接。在从中空部分移除电池组时，当预定的连接器触点根据电极端子的推动力的减小而突出到中空部分预定距离时，预定的连接器触头触摸开关触点以输出检测信号。

63. 发明授权

US06738310B2 Nonvolatile semiconductor memory 失效
公开(公告)号：US06738310B2
公开(公告)日：2004-05-18
申请号：US10351524
申请日：2003-01-27
申请人： Masataka Kato , Tetsuo Adachi , Toshihiro Tanaka , Toshio Sasaki , Hitoshi Kume , Katsutaka Kimura
发明人： Masataka Kato , Tetsuo Adachi , Toshihiro Tanaka , Toshio Sasaki , Hitoshi Kume , Katsutaka Kimura
IPC分类号： G11C700
CPC分类号： G11C16/0416 , G11C8/08 , G11C16/10 , G11C16/12 , G11C16/16 , G11C16/34 , G11C16/3418 , G11C16/3427 , H01L27/115 , H01L27/11521 , H01L27/11524 , H01L29/7883 , H01L29/7885
摘要： Disclosed is a nonvolatile memory system including at least one nonvolatile memory each having a plurality of nonvolatile memory cells and a buffer memory; and a control device coupled to the nonvolatile memory. The control device is enabled to receive external data and to apply the data to the nonvolatile memory, and the nonvolatile memory is enabled to operate a program operation including storing the received data to the buffer memory and storing the data held in the buffer memory to ones of nonvolatile memory cells. Moreover, the control device is enabled to receive external data while the nonvolatile memory is operating in the program operation. Also, the buffer memory is capable of receiving a unit of data, equal to the data length of data to be stored at one time of the program operation, the data length being more than 1 byte.

64. 发明授权

US06713771B2 Method and apparatus for electromagnetic irradiation of liquid 失效
标题翻译：将电磁波施加到液体的装置和方法
公开(公告)号：US06713771B2
公开(公告)日：2004-03-30
申请号：US10204599
申请日：2002-11-26
申请人： Sota Nakagawa , Toshihiro Tanaka , Yasushi Kosaka , Mitsuru Imai
发明人： Sota Nakagawa , Toshihiro Tanaka , Yasushi Kosaka , Mitsuru Imai
IPC分类号： H01J3706
CPC分类号： B01J19/123 , B01J19/125 , B01J19/127 , B01J19/128 , B01J19/129 , B01J19/247 , C02F1/325 , C02F1/38 , C02F1/722 , C02F1/725 , C02F1/78 , C02F2101/36 , C02F2103/06 , C02F2201/3223
摘要： An electromagnetic wave applying apparatus having an electromagnetic wave source (13) such as an ultraviolet lamp or the like, a cylinder (15) surrounding the electromagnetic wave source, a liquid retention tank (16) disposed around the cylinder, and an inlet portion (17) for introducing a liquid overflow from the liquid retention tank as a thin film flowing down an inner wall surface of the cylinder, which is irradiated with an electromagnetic wave from the ultraviolet lamp (11). The electromagnetic wave applying apparatus also has swirling flow forming means for causing the liquid introduced from the inlet portion (17) onto the inner wall surface of the cylinder to flow as a swirling flow down the inner wall surface. The electromagnetic wave applying apparatus allows a large amount of liquid to be stably treated by the application of an electromagnetic wave without causing the electromagnetic wave source such as an ultraviolet lamp or the like to be contaminated.
摘要翻译：具有紫外线灯等电磁波源（13）的电磁波施加装置，围绕电磁波源的圆筒（15），设置在圆筒上的液体保持箱（16）和入口部（ 17），其用于从液体保持槽引入液体溢出，作为从所述紫外灯（11）照射了电磁波的从所述气缸的内壁面向下流动的薄膜。电磁波施加装置还具有旋转流形成装置，用于使从入口部分（17）引入到圆筒的内壁表面上的液体沿着内壁表面沿着旋流流动。电磁波施加装置允许通过施加电磁波来稳定地处理大量的液体，而不会使诸如紫外线灯等的电磁波源被污染。

65. 发明授权

US06711061B2 Non-volatile semiconductor memory device for selectively re-checking word lines 有权
标题翻译：用于选择性地重新检查字线的非易失性半导体存储器件
公开(公告)号：US06711061B2
公开(公告)日：2004-03-23
申请号：US10223488
申请日：2002-08-20
申请人： Nozomu Matsuzaki , Kazuyoshi Shiba , Yasuhiro Taniguchi , Toshihiro Tanaka , Yutaka Shinagawa
发明人： Nozomu Matsuzaki , Kazuyoshi Shiba , Yasuhiro Taniguchi , Toshihiro Tanaka , Yutaka Shinagawa
IPC分类号： G11C1604
CPC分类号： G11C16/3409 , G11C8/08 , G11C16/12 , G11C16/3404
摘要： A method for settling threshold voltages of word lines on a predetermined level in an erasing processing of a non-volatile semiconductor memory device so as to speed up the erasing processing. A word latch circuit is provided for each word line and the threshold voltage of each memory cell is managed for each word line in a selected memory block. Each word latch circuit is shared by a plurality of word lines so as to reduce the required chip area. A rewriting voltage is set for each finished non-volatile memory and the voltage information is stored in the boot area of the non-volatile memory, so that the voltage is recognized by the system each time the system is powered.
摘要翻译：一种用于在非易失性半导体存储器件的擦除处理中在预定电平上建立字线的阈值电压的方法，以加速擦除处理。为每个字线提供字锁存电路，并且在所选择的存储器块中为每个字线管理每个存储器单元的阈值电压。每个字锁存电路由多个字线共享，以便减少所需的芯片面积。为每个完成的非易失性存储器设置重写电压，并且电压信息被存储在非易失性存储器的引导区域中，使得每当系统供电时，系统识别电压。

66. 发明授权

US06643193B2 Semiconductor device, microcomputer and flash memory 有权
公开(公告)号：US06643193B2
公开(公告)日：2003-11-04
申请号：US10247301
申请日：2002-09-20
申请人： Takashi Yamaki , Kan Takeuchi , Mitsuru Hirakii , Toshihiro Tanaka , Yutaka Shinagawa , Masamichi Fujito
发明人： Takashi Yamaki , Kan Takeuchi , Mitsuru Hirakii , Toshihiro Tanaka , Yutaka Shinagawa , Masamichi Fujito
IPC分类号： G11C700
CPC分类号： G11C29/50008 , G11C11/5628 , G11C11/5642 , G11C16/04 , G11C16/28 , G11C16/30 , G11C29/02 , G11C29/021 , G11C29/028
摘要： A semiconductor device whose characteristics are highly reliably regulated for circuits whose desired characteristics need to be realized without being affect by unevenness in device characteristics is to be provided. A replica MOS transistor for amperage measurement connected to an external measuring terminal is provided. A delay circuit and other circuits whose desired characteristics are to be realized have a constant current source MOS transistor formed in the same process as the replica MOS transistor, and a trimming voltage vtri is commonly applied to the respective gates of the constant current source MOS transistor and the replica MOS transistor. Trimming data determined on the basis of an amperage measured from the external measuring terminal are stored into a memory means such as an electrically rewritable non-volatile memory or the like. The trimming data determine the trimming voltage vtri.

67. 发明授权

US06519184B2 Non-volatile memory device with plurality of threshold voltage distributions 失效
公开(公告)号：US06519184B2
公开(公告)日：2003-02-11
申请号：US10082335
申请日：2002-02-26
申请人： Toshihiro Tanaka , Hiroyuki Tanikawa , Masayoshi Nakano , Norio Oza , Koki Watanabe , Yutaka Shinagawa
发明人： Toshihiro Tanaka , Hiroyuki Tanikawa , Masayoshi Nakano , Norio Oza , Koki Watanabe , Yutaka Shinagawa
IPC分类号： G11C1606
CPC分类号： G11C16/344 , G11C16/3468
摘要： In a verify operation after a write or erase to check whether a memory cell threshold voltage is contained in a predetermined threshold voltage distribution, verify voltage is changed in three stages or more in a direction to mitigate the decision condition. This prevents non-convergence of write and erase operation and can complete the write or erase in a short time.

68. 发明授权

US06305876B1 Material and construction method of prevention of scour for the underwater structure 有权
标题翻译：防止水下结构冲刷的材料和施工方法
公开(公告)号：US06305876B1
公开(公告)日：2001-10-23
申请号：US09182501
申请日：1998-10-30
申请人： Masato Yoshino , Yoshikazu Ishikawa , Kazuo Oyama , Sukeo Tamura , Takahito Okubo , Saiji Nozaki , Toshihiro Tanaka
发明人： Masato Yoshino , Yoshikazu Ishikawa , Kazuo Oyama , Sukeo Tamura , Takahito Okubo , Saiji Nozaki , Toshihiro Tanaka
IPC分类号： E02B304
CPC分类号： E02B17/0017 , Y10T428/1362
摘要： A net includes a bag body, an endless suspension rope, and a top closing rope. The bag body prevents scour of an underwater structure, and is formed into a mesh by a knitted fabric. The endless suspension rope is inserted through the mesh adjacent to an opening portion of the bag body. The top closing rope closes the opening of the bag body, and is inserted through a mesh adjacent to the mesh through which the suspension rope is inserted.
摘要翻译：网包括一个袋体，一个无尽的悬挂绳索和一个顶部关闭的绳索。袋体防止水下结构的冲刷，并且通过针织物形成网状。无端悬挂绳索通过邻近袋体的开口部分的网状物插入。顶部关闭绳关闭袋体的开口，并且通过邻近网状物的网状物插入悬挂绳索插入其中。

69. 发明授权

US06272042B1 Nonvolatile semiconductor memory 有权
标题翻译：非易失性半导体存储器
公开(公告)号：US06272042B1
公开(公告)日：2001-08-07
申请号：US09630426
申请日：2000-08-01
申请人： Masataka Kato , Tetsuo Adachi , Toshihiro Tanaka , Toshio Sasaki , Hitoshi Kume , Katsutaka Kimura
发明人： Masataka Kato , Tetsuo Adachi , Toshihiro Tanaka , Toshio Sasaki , Hitoshi Kume , Katsutaka Kimura
IPC分类号： G11C1604
CPC分类号： G11C16/0416 , G11C8/08 , G11C16/10 , G11C16/12 , G11C16/16 , G11C16/34 , G11C16/3418 , G11C16/3427 , H01L27/115 , H01L27/11521 , H01L27/11524 , H01L29/7883 , H01L29/7885
摘要： Each memory cell of a nonvolatile semiconductor memory, essentially, consists of a one-transistor type memory cell such as a MOSFET having a floating gate electrode. When an electric programming operation is carried out, a positive voltage is applied to an n type drain region, a negative voltage is applied to a control gate and a source region is grounded. When an erasing operation is carried out, the positive voltage is applied to the control gate while all the other electrodes and a semiconductor substrate are grounded. Low power consumption can be accomplished because both of the programming operation and erasing operations are carried out by utilizing a tunneling mechanism. Furthermore, because the negative voltage applied to the word line, a drain voltage at the time of programming of data can be lowered, so that degradation of a gate oxide film at a channel portion can be mitigated.
摘要翻译：非易失性半导体存储器的每个存储单元基本上由诸如具有浮置栅电极的MOSFET的单晶体管型存储单元组成。当执行电编程操作时，向n型漏极区域施加正电压，向控制栅极施加负电压，并且源极区域接地。当执行擦除操作时，正电压被施加到控制栅极，而所有其它电极和半导体衬底接地。可以实现低功耗，因为通过利用隧道机制来执行编程操作和擦除操作两者。此外，由于施加到字线的负电压，可以降低数据编程时的漏极电压，从而可以减轻沟道部分处的栅极氧化膜的劣化。

70. 发明授权

US5978270A Semiconductor non-volatile memory device and computer system using the same 失效
标题翻译：半导体非易失性存储器件和使用其的计算机系统
公开(公告)号：US5978270A
公开(公告)日：1999-11-02
申请号：US29748
申请日：1998-03-02
申请人： Toshihiro Tanaka , Masataka Kato , Osamu Tsuchiya , Toshiaki Nishimoto
发明人： Toshihiro Tanaka , Masataka Kato , Osamu Tsuchiya , Toshiaki Nishimoto
IPC分类号： G11C16/04 , G11C16/28 , G11C16/34 , G11C16/06
CPC分类号： G11C16/3413 , G11C16/0416 , G11C16/28 , G11C16/3404 , G11C16/3409 , G11C16/3459
摘要： After decreasing the threshold voltages of a plurality of memory cells collectively or selectively, the presence or absence of any memory cell of which the threshold voltage has dropped below a predetermined voltage verified collectively for each of memory cell groups connected to word line (low-threshold value verification), and any memory cell of which the threshold voltage has excessively dropped is selectively written. Also, the well of each of memory cell is formed in the region of an element isolation layer for isolating it from the substrate of a memory apparatus, and a negative voltage is supplied to the memory well distributively with a positive voltage applied as a word line voltage, thus supplying them as erase operation voltages. The absolute value of the memory well voltage is set substantially equal to or lower than the word line voltage for the read operation. Sectors constituting each memory mat includes a sector (selected sector) selected for the erase operation with each word line thereof supplied with a positive voltage, a sector (non-selected sector) not selected for the erase operation with a word line voltage different from a memory well voltage, and further a sector (completely non-selected sector) not selected for the erase operation with a word line voltage equal to the voltage between a source and a drain of the memory cell.
摘要翻译： PCT No.PCT / JP96 / 02419 Sec。 371日期1998年3月2日 102（e）1998年3月2日PCT PCT 1996年8月29日PCT公布。公开号WO97 / 08707 日期1997年3月6日在集体或选择性地降低多个存储器单元的阈值电压之后，存在或不存在阈值电压已经下降到预定电压以下的任何存储单元，该存储单元对于连接到字的每个存储单元组线路（低阈值验证），并且选择性地写入阈值电压过度下降的任何存储单元。此外，存储单元的阱形成在用于将其与存储装置的基板隔离的元件隔离层的区域中，并且以施加作为字线的正电压将负电压分配地提供给存储器电压，从而将其提供为擦除操作电压。存储器阱电压的绝对值被设定为基本上等于或低于读取操作的字线电压。构成每个存储器垫的扇区包括为其擦除操作选择的扇区（选择的扇区），其每个字线被提供有正电压，未被选择用于擦除操作的扇区（未选择的扇区），字线电压不同于存储器阱电压，以及未被选择用于具有等于存储器单元的源极和漏极之间的电压的字线电压的擦除操作的扇区（完全未选择的扇区）。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式