专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

61. 发明授权

US06785521B2 System and method for current-mode amplitude modulation 有权
标题翻译：电流模式幅度调制的系统和方法
公开(公告)号：US06785521B2
公开(公告)日：2004-08-31
申请号：US09813593
申请日：2001-03-21
申请人： Aristotele Hadjichristos , David R. Pehlke
发明人： Aristotele Hadjichristos , David R. Pehlke
IPC分类号： H03C152
CPC分类号： H03F1/0261 , H03F2200/504 , H04B1/04 , H04B2001/0491
摘要： An amplifier circuit includes a power amplifier biased for saturated mode operation, and a controllable current source to provide supply current to the power amplifier. The controllable current source effects desired amplitude modulation of the output signal from the power amplifier by modulating the supply current it provides responsive to an amplitude information signal.
摘要翻译：放大器电路包括偏置用于饱和模式操作的功率放大器和可控电流源，以向功率放大器提供电源电流。可控电流源通过调制其响应于幅度信息信号提供的电源电流来影响来自功率放大器的输出信号的期望幅度调制。

62. 发明授权

US06566944B1 Current modulator with dynamic amplifier impedance compensation 有权
标题翻译：具有动态放大器阻抗补偿的电流调制器
公开(公告)号：US06566944B1
公开(公告)日：2003-05-20
申请号：US10080239
申请日：2002-02-21
申请人： David R. Pehlke , Aristotele Hadjichristos , William O. Camp, Jr.
发明人： David R. Pehlke , Aristotele Hadjichristos , William O. Camp, Jr.
IPC分类号： H03F338
CPC分类号： H03G3/3047 , H03F1/0233 , H03F1/0272 , H03F1/56 , H03F2200/504 , H03G3/004 , H03G3/3042
摘要： An amplitude modulation circuit (modulator) provides modulated supply current, possibly in combination with modulated supply voltage, to a radio frequency (RF) power amplifier (PA), and includes a detection circuit responsive to changes in the ratio of that voltage to the modulated supply current, described herein as its AM modulation impedance. Such impedance (resistance) changes commonly arise from changing coupling characteristics at the RF antenna assembly driven by the PA. A gain control circuit may be associated with the detection circuit, and made responsive thereto, thus allowing adjustment of modulation gain control responsive to changes in PA AM modulation impedance. In one embodiment, this arrangement permits the modulator to hold a fixed modulation gain over changing PA AM modulation impedance, while in other embodiments, modulation gain varies in response to PA impedance changes to avoid signal clipping. Such clipping might otherwise occur where current modulation values in combination with increased PA resistance would result in PA voltages exceeding the supply voltage of the PA.
摘要翻译：幅度调制电路（调制器）将调制的电源电流（可能与调制的电源电压组合）提供给射频（RF）功率放大器（PA），并且包括响应于该电压与调制的电源电流，这里描述为其AM调制阻抗。这种阻抗（电阻）变化通常来自于由PA驱动的RF天线组件处的耦合特性的改变。增益控制电路可以与检测电路相关联，并对其进行响应，从而允许响应于PA AM调制阻抗的变化来调整调制增益控制。在一个实施例中，这种布置允许调制器在改变PA AM调制阻抗的情况下保持固定的调制增益，而在其他实施例中，调制增益响应于PA阻抗变化而变化以避免信号限幅。否则可能发生这种削波，其中当前调制值与增加的PA电阻相结合将导致PA电压超过PA的电源电压。

63. 发明授权

US06366162B1 Multi-impedance input stage 失效
标题翻译：多阻抗输入级
公开(公告)号：US06366162B1
公开(公告)日：2002-04-02
申请号：US09753145
申请日：2001-01-02
申请人： Chris W. Angell , Erik L. Bengtsson , Scott R. Justice , Aristotele Hadjichristos
发明人： Chris W. Angell , Erik L. Bengtsson , Scott R. Justice , Aristotele Hadjichristos
IPC分类号： G06G726
CPC分类号： H03F1/56 , H03F3/45089 , H03F3/72 , H03F2200/432 , H03F2203/45596 , H03F2203/45702 , H03F2203/7203 , H03F2203/7236
摘要： An input buffer circuit is operable to selectively present either low or high input impedance while maintaining uniform output impedance. The buffer is characterized by first and second amplifier circuits connected in parallel between an input to and an output from the buffer. The amplifiers are individually controlled between enabled and disabled states. When enabled, the first amplifier has low input impedance and predetermined output impedance and the second amplifier has high input impedance and the predetermined output impedance, and when disabled each amplifier has high input and output impedance. To operate the buffer to have low input impedance, the first amplifier is enabled while the second amplifier is disabled. To operate the buffer to have high input impedance, the second amplifier is enabled while the first amplifier is disabled. When an amplifier is disabled, its input and output impedances are sufficiently large that the disabled amplifier does not interfere with operation of the enabled amplifier.
摘要翻译：输入缓冲器电路可操作以选择性地呈现低或高输入阻抗，同时保持均匀的输出阻抗。缓冲器的特征在于在缓冲器的输入和输出之间并联连接的第一和第二放大器电路。放大器在启用和禁用状态之间单独控制。当使能时，第一放大器具有低输入阻抗和预定的输出阻抗，第二放大器具有高输入阻抗和预定输出阻抗，并且禁用时，每个放大器具有高输入和输出阻抗。为了使缓冲器工作，具有低输入阻抗，第一个放大器使能，而第二个放大器被禁用。为了操作缓冲区具有高输入阻抗，第二个放大器在第一个放大器禁用时使能。当禁止放大器时，其输入和输出阻抗足够大，使得禁用的放大器不会干扰使能放大器的工作。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式