专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

61. 发明申请

US20060033102A1 Thin film transistor array panel used for a liquid crystal display and a manufacturing method thereof 失效
标题翻译：用于液晶显示器的薄膜晶体管阵列面板及其制造方法
公开(公告)号：US20060033102A1
公开(公告)日：2006-02-16
申请号：US11249278
申请日：2005-10-14
申请人： Dong-Gyu Kim
发明人： Dong-Gyu Kim
IPC分类号： H01L29/04
CPC分类号： H01L27/1288 , G02F1/1368 , H01L27/1214 , H01L29/78633
摘要： A gate insulating layer, an amorphous silicon layer, an n+ amorphous silicon layer and a metal layer are deposited in sequence after a gate line, a gate electrode and a gate pad are formed on a substrate, using a first mask. The metal layer is etched to form a data line, a source electrode, a drain electrode and a data pad through a photolithography process, using a second mask, and the n+ amorphous silicon layer is etched, using the patterned data line, the source electrode, the drain electrode and the data pad as the mask. A light shielding film and a passivation film, or a passivation film also having a function of the light shielding film are deposited, and is etched through the photolithography process, using a third mask which leaves a portion covering the gate line, the gate electrode, the gate pad and the data line, the source electrode, and the drain electrode. The amorphous silicon layer and the gate insulating layer are etched, using the patterned light shielding film and passivation film, or the patterned passivation film also having the function of the light shielding film as the mask. Here, the gate pad, the data pad and a part of the drain electrode are exposed. A pixel electrode connected to the drain electrode, is formed and indium tin oxide (ITO) pads covering the exposed gate pad and the exposed data pad, is formed by depositing an ITO film and etching thorough the photolithography, using a fourth mask. As a result, a thin film transistor array panel used for a liquid crystal display is fabricated by only four masks.
摘要翻译：在栅极线，栅电极和栅极焊盘形成在基板上之后，依次沉积栅绝缘层，非晶硅层，n + +非晶硅层和金属层，使用第一个面具。通过使用第二掩模的光刻工艺蚀刻金属层以形成数据线，源电极，漏电极和数据焊盘，并使用第二掩模蚀刻n + 图案化数据线，源电极，漏电极和数据焊盘作为掩模。沉积还具有遮光膜功能的遮光膜和钝化膜或钝化膜，并通过光刻工艺蚀刻，使用第三掩模，该第三掩模留下覆盖栅极线的部分，栅电极，栅极焊盘和数据线，源电极和漏电极。使用图案化的遮光膜和钝化膜蚀刻非晶硅层和栅极绝缘层，或者也具有遮光膜功能的图案化的钝化膜作为掩模。这里，露出栅极焊盘，数据焊盘和漏电极的一部分。形成连接到漏电极的像素电极，并且通过使用第四掩模沉积ITO膜并彻底蚀刻来形成覆盖暴露的栅极焊盘和暴露的数据焊盘的氧化铟锡（ITO）焊盘。结果，仅用四个掩模制造用于液晶显示器的薄膜晶体管阵列面板。

62. 发明授权

US06992745B2 Signal transmission film, control signal part and liquid crystal display including the film 有权
公开(公告)号：US06992745B2
公开(公告)日：2006-01-31
申请号：US09948639
申请日：2001-09-10
申请人： Dong-Gyu Kim , Sin-Ku Kang
发明人： Dong-Gyu Kim , Sin-Ku Kang
IPC分类号： G02F1/1345
CPC分类号： G02F1/13458 , G02F1/1345 , G02F1/1362
摘要： The present invention provides a signal transmission film, a control signal part and a liquid crystal display including the signal transmission film that prevents the damage of wires due to electrolysis. In the present invention, a lead of several to several tens microns are formed on the signal transmission film by printing and patterning a copper wire on a high molecular film. The signal transmission film comprises a first signal lead transmitting a first signal voltage; a second signal lead transmitting a second signal voltage lower than the first signal voltage; and a lead formed between the first signal lead and the second signal lead. The lead could be several to several tens microns thick, the same voltage as the first signal voltage could be applied to the lead and the lead could be a dummy lead.

63. 发明授权

US06969643B2 Thin film transistor array panel used for a liquid crystal display and a manufacturing method thereof 失效
标题翻译：用于液晶显示器的薄膜晶体管阵列面板及其制造方法
公开(公告)号：US06969643B2
公开(公告)日：2005-11-29
申请号：US10692033
申请日：2003-10-23
申请人： Dong-Gyu Kim
发明人： Dong-Gyu Kim
IPC分类号： H01L21/77 , H01L21/84 , H01L27/12 , H01L29/786 , H01L21/20 , H01L21/00
CPC分类号： H01L27/1288 , G02F1/1368 , H01L27/1214 , H01L29/78633
摘要： A gate insulating layer, an amorphous silicon layer, an n+ amorphous silicon layer and a metal layer are deposited in sequence after a gate line, a gate electrode and a gate pad are formed on a substrate, using a first mask. The metal layer is etched to form a data line, a source electrode, a drain electrode and a data pad through a photolithography process, using a second mask, and the n+ amorphous silicon layer is etched, using the patterned data line, the source electrode, the drain electrode and the data pad as the mask. A light shielding film and a passivation film, or a passivation film also having a function of the light shielding film are deposited, and is etched through the photolithography process, using a third mask which leaves a portion covering the gate line, the gate electrode, the gate pad and the data line, the source electrode, and the drain electrode. The amorphous silicon layer and the gate insulating layer are etched, using the patterned light shielding film and passivation film, or the patterned passivation film also having the function of the light shielding film as the mask. Here, the gate pad, the data pad and a part of the drain electrode are exposed. A pixel electrode connected to the drain electrode, is formed and indium tin oxide (ITO) pads covering the exposed gate pad and the exposed data pad, is formed by depositing an ITO film and etching thorough the photolithography, using a fourth mask. As a result, a thin film transistor array panel used for a liquid crystal display is fabricated by only four masks.
摘要翻译：在栅极线，栅电极和栅极焊盘形成在基板上之后，依次沉积栅绝缘层，非晶硅层，n + +非晶硅层和金属层，使用第一个面具。通过使用第二掩模的光刻工艺蚀刻金属层以形成数据线，源电极，漏电极和数据焊盘，并使用第二掩模蚀刻n + 图案化数据线，源电极，漏电极和数据焊盘作为掩模。沉积还具有遮光膜功能的遮光膜和钝化膜或钝化膜，并通过光刻工艺蚀刻，使用第三掩模，该第三掩模留下覆盖栅极线的部分，栅电极，栅极焊盘和数据线，源电极和漏电极。使用图案化的遮光膜和钝化膜蚀刻非晶硅层和栅极绝缘层，或者也具有遮光膜功能的图案化的钝化膜作为掩模。这里，露出栅极焊盘，数据焊盘和漏电极的一部分。形成连接到漏电极的像素电极，并且通过使用第四掩模沉积ITO膜并彻底蚀刻来形成覆盖暴露的栅极焊盘和暴露的数据焊盘的氧化铟锡（ITO）焊盘。结果，仅用四个掩模来制造用于液晶显示器的薄膜晶体管阵列面板。

64. 发明申请

US20050190174A1 Liquid crystal display panel with signal transmission patterns 有权
标题翻译：液晶显示面板采用信号传输方式
公开(公告)号：US20050190174A1
公开(公告)日：2005-09-01
申请号：US11109680
申请日：2005-04-20
申请人： Sang-Soo Kim , Choong-Seob Oh , Jin-Hyeok Park , Jin-Ho Park , Dong-Gyu Kim , Yong-Eun Park , Nam-Soo Kang , Gyu-Su Lee
发明人： Sang-Soo Kim , Choong-Seob Oh , Jin-Hyeok Park , Jin-Ho Park , Dong-Gyu Kim , Yong-Eun Park , Nam-Soo Kang , Gyu-Su Lee
IPC分类号： G02F1/1335 , G02F1/13 , G02F1/13357 , G02F1/1345 , G02F1/136 , G02F1/1368 , G09F9/00 , H05K1/14 , H05K1/18 , H05K3/36 , G09G5/00
CPC分类号： G02F1/13452 , G09G3/3611 , G09G2300/0408 , G09G2300/0426 , H05K1/189 , H05K3/361 , Y10S345/903 , Y10S345/905
摘要： A liquid crystal display of compact size is disclosed. The liquid crystal display has a tape carrier package and a single integrated PCB for processing a gate driving signal and data driving signal. The tape carrier package includes a base substrate, a gate driver IC formed on said base substrate, an input pattern formed on said base substrate that applies gate driving signals input from an external device to the gate driver IC, a first output pattern formed on said base substrate that outputs a first gate driving signal processed in said gate driver IC, and a second output pattern formed on said base substrate, that outputs a second gate driving signal bypassing the gate driver IC among the gate driving signals.
摘要翻译：公开了一种紧凑尺寸的液晶显示器。液晶显示器具有载带封装和用于处理栅极驱动信号和数据驱动信号的单个集成PCB。所述带载体封装包括基底基板，形成在所述基底基板上的栅极驱动器IC，形成在所述基底基板上的输入图案，其将从外部装置输入的栅极驱动信号施加到栅极驱动器IC，形成在所述基板上的第一输出图案输出在所述栅极驱动器IC中处理的第一栅极驱动信号的基极基板，以及形成在所述基板上的第二输出图案，其在所述栅极驱动信号中输出旁路栅极驱动器IC的第二栅极驱动信号。

65. 发明授权

US06927420B2 Thin film transistor array panel and manufacturing method thereof 失效
标题翻译：薄膜晶体管阵列面板及其制造方法
公开(公告)号：US06927420B2
公开(公告)日：2005-08-09
申请号：US10648544
申请日：2003-08-26
申请人： Dong-Gyu Kim
发明人： Dong-Gyu Kim
IPC分类号： G02F1/1368 , G02F1/1345 , G02F1/1362 , H01L21/28 , H01L21/3205 , H01L21/336 , H01L21/77 , H01L21/822 , H01L21/84 , H01L23/52 , H01L27/04 , H01L27/12 , H01L29/417 , H01L29/423 , H01L29/45 , H01L29/49 , H01L29/786 , H01L29/04
CPC分类号： G02F1/136204 , G02F2001/13629 , H01L27/124 , H01L27/1288 , H01L29/458 , H01L29/4908 , H01L29/66765
摘要： Gate lines and a gate shorting bar connected to the gate lines, which include lower and upper films, are formed on a substrate. A gate insulating layer, semiconductors, and ohmic contacts are formed in sequence. Data lines and a data shorting bar connected to the data lines, which include lower and upper films, are formed thereon. A passivation layer is formed on the data lines and the data shorting bar. The passivation layer and the gate insulating are patterned to form contact holes exposing the lower films of the gate lines and the data lines. Connecting portions of the gate lines and the data lines for connection with driving circuits are locate opposite the shorting bars with respect to the contact holes.
摘要翻译：栅极线和连接到栅极线的栅极短路棒，其包括下部膜和上部膜，形成在基板上。依次形成栅极绝缘层，半导体和欧姆接触。在其上形成数据线和连接到数据线的数据短路条，其中包括下部和上部膜。在数据线和数据短路棒上形成钝化层。图案化钝化层和栅极绝缘体以形成暴露栅极线和数据线的下部膜的接触孔。与驱动电路连接的栅极线和数据线的连接部分相对于接触孔与短路棒相对。

66. 发明授权

US06862052B2 Liquid crystal display, thin film transistor array panel for liquid crystal display and manufacturing method thereof 失效
标题翻译：液晶显示器，液晶显示器用薄膜晶体管阵列面板及其制造方法
公开(公告)号：US06862052B2
公开(公告)日：2005-03-01
申请号：US10147345
申请日：2002-05-16
申请人： Dong-Gyu Kim
发明人： Dong-Gyu Kim
IPC分类号： G02F1/1368 , G02F1/1362 , H01L21/336 , H01L29/786 , G02F1/1343
CPC分类号： G02F1/13458 , G02F1/13624 , G02F1/136286 , G02F2001/136236 , H01L27/124 , H01L27/1288
摘要： A gate wire is formed on the insulating substrate. The gate wire has gate lines, first and second gate electrodes connected to the gate lines, and gate pads. A gate insulating layer, first and second semiconductor layers and an ohmic contact layer are sequentially formed thereon. A data wire is formed on the ohmic contact layer. The data wire has first and second data lines, data line connectors, first and second source electrodes, first and second drain electrodes, and data pads. A passivation layer is formed on the data wire, and has contact holes respectively exposing the first and the second drain electrodes, and the gate and the data pads. Pixel electrodes, and subsidiary gate and data pads are formed on the passivation layer. As described above, the data line is provided at opposite sides of the pixel area so that variation in the pixel voltage due to the parasitic capacitance between the partitioned areas with different degree of misalignment is reduced. In addition, two TFTs are provided in each pixel area so that the parasitic capacitance between the gate and the drain electrodes in two respective partitioned areas with left-biased and right-biased misalignment is kept to be constant. In this way, the pixel voltage variation between the two partitioned areas is reduced to prevent non-uniformity in the brightness.
摘要翻译：在绝缘基板上形成栅极线。栅极线具有栅极线，连接到栅极线的第一和第二栅电极以及栅极焊盘。在其上依次形成栅极绝缘层，第一和第二半导体层以及欧姆接触层。数据线形成在欧姆接触层上。数据线具有第一和第二数据线，数据线连接器，第一和第二源电极，第一和第二漏电极和数据焊盘。在数据线上形成钝化层，并且具有分别暴露第一和第二漏电极以及栅极和数据焊盘的接触孔。像素电极和辅助栅极和数据焊盘形成在钝化层上。如上所述，数据线设置在像素区域的相对侧，使得由于具有不同失准程度的分割区域之间的寄生电容引起的像素电压的变化减小。此外，在每个像素区域中设置两个TFT，使得具有左偏置和右偏置未对准的两个相应分区中的栅极和漏电极之间的寄生电容保持恒定。以这种方式，减小了两个划分区域之间的像素电压变化，以防止亮度的不均匀。

67. 发明申请

US20050007510A1 Liquid crystal display 有权
标题翻译：液晶显示器
公开(公告)号：US20050007510A1
公开(公告)日：2005-01-13
申请号：US10851642
申请日：2004-05-24
申请人： Dong-Gyu Kim , Sang-Soo Kim , Sang-Wook Lee
发明人： Dong-Gyu Kim , Sang-Soo Kim , Sang-Wook Lee
IPC分类号： G02F1/1333 , G02F1/13 , G02F1/1343 , G02F1/1345 , G02F1/136 , G02F1/1362 , G09F9/30
CPC分类号： G02F1/13458 , G02F1/1345 , G02F1/13452 , G02F1/136286
摘要： A liquid crystal display includes an insulating substrate, gate and data lines formed on the substrate to define pixel areas, or collectively a display area. Gate signal interconnection wires are formed at a corner portion of the substrate outside the display area to transmit gate electrical signals, and provided with gate signal interconnection lines and first and second gate signal interconnection pads connected to both ends of the gate signal interconnection lines. A gate insulating layer, and a protective layer are further formed on the substrate, and provided with first and second contact holes exposing the first and second gate signal interconnection pads. Gate and data signal transmission films are attached to the substrate, and provided with first and second gate signal leads and first and second gate signal wires. The first and second gate signal leads are connected to the first and second gate signal interconnection pads through the first and second contact holes. The first or the second gate signal lead completely covers the first or the second contact hole at least in the longitudinal direction of the lead.
摘要翻译：液晶显示器包括绝缘基板，形成在基板上的门和数据线，以限定像素区域，或统称为显示区域。栅极信号互连线形成在显示区域外部的基板的角部，以传输栅极电信号，并且设置有栅极信号互连线以及连接到栅极信号互连线两端的第一和第二栅极信号互连焊盘。栅极绝缘层和保护层进一步形成在基板上，并且设置有暴露第一和第二栅极信号互连焊盘的第一和第二接触孔。栅极和数据信号传输膜附着到衬底上，并且设置有第一和第二栅极信号引线以及第一和第二栅极信号线。第一和第二栅极信号引线通过第一和第二接触孔连接到第一和第二栅极信号互连焊盘。第一或第二栅极信号引线至少在引线的纵向上完全覆盖第一或第二接触孔。

68. 发明授权

US06798442B1 Thin film transistor array panel for liquid crystal display and method of manufacturing the same 有权
标题翻译：用于液晶显示器的薄膜晶体管阵列面板及其制造方法
公开(公告)号：US06798442B1
公开(公告)日：2004-09-28
申请号：US09450333
申请日：1999-11-29
申请人： Dong-Gyu Kim , Jun-Ho Song , Jong-Woong Chang , Jae-Ho Choi , Byoung-Sun Na , Young-Bae Park , Sung-Wook Huh
发明人： Dong-Gyu Kim , Jun-Ho Song , Jong-Woong Chang , Jae-Ho Choi , Byoung-Sun Na , Young-Bae Park , Sung-Wook Huh
IPC分类号： B02F11336
CPC分类号： G02F1/136286 , G02F2001/136295 , H01L27/124
摘要： A gate wire including a gate line extending in the horizontal direction, and a gate electrode is formed on an insulating substrate. A gate insulating layer is formed on the gate wire and covers the same. A semiconductor pattern is formed on the gate insulating layer 30, and formed on the semiconductor pattern are a data wire having a data line in the vertical direction, a source electrode, a drain electrode separated from the source electrode opposite the source electrode with respect to the gate electrode, and an align pattern located on both sides of the data line. A passivation layer is formed on the data wire and the align pattern, and has contact holes exposing the drain electrode and an opening exposing the substrate between the data line and the align pattern. Here, the align pattern adjacent to the data line is exposed through the opening, and the semiconductor pattern and the gate insulating layer are under-cut. A pixel electrode connected to the drain electrode through the contact hole is formed on the passivation layer. Here, the opening is located between the data line and the pixel electrode. In this structure, misalignment occurring in the manufacturing process of a thin film transistor panel for a liquid crystal display is minimized, and stitch defects are prevented by uniformly forming a coupling capacitance between the data line and the pixel electrode. Shorts between the data line and the pixel electrode are prevented by forming the opening between the data line and the pixel electrode.
摘要翻译：包括在水平方向延伸的栅极线的栅极线和在绝缘基板上形成栅电极。栅极绝缘层形成在栅极导线上并覆盖其上。在栅极绝缘层30上形成半导体图案，在半导体图案上形成有在垂直方向上具有数据线的数据线，源电极，与源极相对的源电极分离的漏电极相对于栅极电极和位于数据线两侧的对准图案。在数据线和对准图案上形成钝化层，并且具有暴露漏电极的接触孔和在数据线和对准图案之间暴露衬底的开口。这里，与数据线相邻的对准图案通过开口露出，并且半导体图案和栅极绝缘层被切割。通过接触孔连接到漏电极的像素电极形成在钝化层上。这里，开口位于数据线和像素电极之间。在这种结构中，在用于液晶显示器的薄膜晶体管面板的制造过程中发生的偏移被最小化，并且通过在数据线和像素电极之间均匀地形成耦合电容来防止缝合缺陷。通过在数据线和像素电极之间形成开口来防止数据线与像素电极之间的短路。

69. 发明授权

US06734925B1 Multiple testing bars for testing liquid crystal display and method thereof 有权
公开(公告)号：US06734925B1
公开(公告)日：2004-05-11
申请号：US09206317
申请日：1998-12-07
申请人： Sang-Kyoung Lee , Dong-Gyu Kim , Min-Hyung Moon
发明人： Sang-Kyoung Lee , Dong-Gyu Kim , Min-Hyung Moon
IPC分类号： G02F11333
CPC分类号： G02F1/1362 , G02F1/1345 , G02F1/136204 , G02F1/136286 , G02F2001/136254 , G09G3/006 , G09G3/3648 , G09G2300/0426 , G09G2330/08
摘要： A plurality of gate lines are formed on an insulating substrate in the horizontal direction, a gate shorting bar connected to the data lines is formed in the vertical direction and a gate insulating film is formed thereon. A plurality of data lines intersecting the gate lines are formed on the gate insulating film in the vertical direction, and a data shorting bar connected to the data lines is formed outside the display region. A first shorting bar is formed on the gate insulating film, located between the gate lines and the gate shorting bar, and connected to the odd gate lines. A second secondary shorting bar is formed parallel to the first shorting bar and connected to the even gate lines.

70. 发明授权

US06717634B2 Liquid crystal display and a manufacturing method thereof 失效
标题翻译：液晶显示器及其制造方法
公开(公告)号：US06717634B2
公开(公告)日：2004-04-06
申请号：US10174054
申请日：2002-06-19
申请人： Sang-Soo Kim , Dong-Gyu Kim , Woon-Yong Park
发明人： Sang-Soo Kim , Dong-Gyu Kim , Woon-Yong Park
IPC分类号： G02F11333
CPC分类号： G02F1/1309 , G02F2001/136263
摘要： A gate line is formed on a substrate in a horizontal direction and a data repair line is formed on the same layer as the gate line in a vertical direction. The repair line is divided into two portions with respect to the gate line. A gate insulating film is formed on the gate line and the data repair line, and a data line is formed on the gate insulating film along the repair line having a smaller width than the repair line, a passivation film being deposited thereon. Contact holes are formed in the passivation film, and contact holes to expose both ends of the divided repair line are formed in the passivation film and gate insulating film. A transparent connecting pattern formed on the passivation film contacts the data line and the repair line through the contact holes. Both ends of the repair line are extended from the data line. A pixel electrode is formed on the passivation film, and the pixel electrode overlaps the edges of the repair line at a predetermined width. The repair line functions as a signal transmitting path when the data line is disconnected, and as a black matrix for blocking light-leakage. The transparent connecting pattern acts as a path when the data line is disconnected at the portion where the gate line intersects the data line.
摘要翻译：在水平方向上在基板上形成栅极线，并且在与垂直方向上的栅极线相同的层上形成数据修复线。修理线相对于栅极线分为两部分。在栅极线和数据修复线上形成栅极绝缘膜，并且沿着具有比修复线宽的宽度的修复线在栅极绝缘膜上形成数据线，在其上沉积钝化膜。在钝化膜中形成接触孔，并且在钝化膜和栅极绝缘膜中形成用于露出分割的修复线的两端的接触孔。形成在钝化膜上的透明连接图案通过接触孔接触数据线和修复线。修复线的两端从数据线延伸。像素电极形成在钝化膜上，像素电极以预定的宽度与修复线的边缘重叠。当数据线断开时，修复线作为信号传输路径，并且作为用于阻止漏光的黑矩阵。当数据线在栅极线与数据线相交的部分断开时，透明连接图案用作路径。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式