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61. 发明申请

US20080132055A1 HARDMASK FOR IMPROVED RELIABILITY OF SILICON BASED DIELECTRICS 失效
标题翻译：用于改善基于硅的电介质的可靠性的HARDMASK
公开(公告)号：US20080132055A1
公开(公告)日：2008-06-05
申请号：US12016594
申请日：2008-01-18
申请人： Son Van Nguyen , Michael Lane , Stephen M. Gates , Xiao H. Liu , Vincent J. McGahay , Sanjay C. Mehta , Thomas M. Shaw
发明人： Son Van Nguyen , Michael Lane , Stephen M. Gates , Xiao H. Liu , Vincent J. McGahay , Sanjay C. Mehta , Thomas M. Shaw
IPC分类号： H01L21/4763
CPC分类号： H01L21/3148 , H01L21/02126 , H01L21/02216 , H01L21/02274 , H01L21/3122 , H01L21/76807 , H01L21/76825 , H01L21/76826 , H01L21/76828 , H01L21/76832 , H01L23/53295 , H01L2924/0002 , Y10T428/24802 , H01L2924/00
摘要： The present invention provides a hardmask that is located on a surface of a low k dielectric material having at least one conductive feature embedded therein. The hardmask includes a lower region of a hermetic oxide material located adjacent to the low k dielectric material and an upper region comprising atoms of Si, C and H located above the hermetic oxide material. The present invention also provides a method of fabricating the inventive hardmask as well as a method to form an interconnect structure containing the same.
摘要翻译：本发明提供了一种硬掩模，其位于具有嵌入其中的至少一个导电特征的低k电介质材料的表面上。硬掩模包括邻近低k电介质材料的气密氧化物材料的下部区域，以及包含位于密封氧化物材料上方的Si，C和H原子的上部区域。本发明还提供了制造本发明的硬掩模的方法以及形成包含该硬掩模的互连结构的方法。

62. 发明授权

US07045453B2 Very low effective dielectric constant interconnect structures and methods for fabricating the same 失效
标题翻译：非常低的有效介电常数互连结构及其制造方法
公开(公告)号：US07045453B2
公开(公告)日：2006-05-16
申请号：US11104764
申请日：2005-04-12
申请人： Donald F. Canaperi , Timothy J. Dalton , Stephen M. Gates , Mahadevaiyer Krishnan , Satya V. Nitta , Sampath Purushothaman , Sean P. E. Smith
发明人： Donald F. Canaperi , Timothy J. Dalton , Stephen M. Gates , Mahadevaiyer Krishnan , Satya V. Nitta , Sampath Purushothaman , Sean P. E. Smith
IPC分类号： H01L21/4763
CPC分类号： H01L21/76807 , H01L21/76834 , H01L21/76835 , H01L21/76885 , H01L2924/0002 , H01L2924/00
摘要： A structure incorporates very low dielectric constant (k) insulators with copper wiring to achieve high performance interconnects. The wiring is supported by a relatively durable low k dielectric such as SiLk or SiO2 and a very low k and less-robust gap fill dielectric is disposed in the remainder of the structure, so that the structure combines a durable layer for strength with a very low k dielectric for interconnect electrical performance.
摘要翻译：一个结构包含非常低的介电常数（k）绝缘体与铜布线，以实现高性能的互连。布线由相对耐用的低k电介质（例如SiLk或SiO 2）支撑，并且在该结构的其余部分中布置非常低的k和较不稳定的间隙填充电介质，使得该结构将耐用层与强度非常相似低k电介质用于互连电气性能。

63. 发明授权

US07030468B2 Low k and ultra low k SiCOH dielectric films and methods to form the same 有权
标题翻译：低k和超低k SiCOH介电膜及其形成方法
公开(公告)号：US07030468B2
公开(公告)日：2006-04-18
申请号：US10758724
申请日：2004-01-16
申请人： Stephen M. Gates , Christos D. Dimitrakopoulos , Alfred Grill , Son Van Nguyen
发明人： Stephen M. Gates , Christos D. Dimitrakopoulos , Alfred Grill , Son Van Nguyen
IPC分类号： H01L23/58
CPC分类号： H01L21/02126 , C23C16/401 , C23C16/56 , H01L21/02216 , H01L21/02274 , H01L21/02304 , H01L21/0234 , H01L21/02348 , H01L21/02351 , H01L21/02362 , H01L21/31633 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： Dielectric materials including elements of Si, C, O and H having specific values of mechanical properties (tensile stress, elastic modulus, hardness cohesive strength, crack velocity in water) that result in a stable ultra low k film which is not degraded by water vapor or integration processing are provided. The dielectric materials have a dielectric constant of about 2.8 or less, a tensile stress of less than 45 MPa, an elastic modulus from about 2 to about 15 GPa, and a hardness from about 0.2 to about 2 GPa. Electronic structures including the dielectric materials of the present invention as well as various methods of fabricating the dielectric materials are also provided.
摘要翻译：包含Si，C，O和H元素的介电材料具有机械性能（拉伸应力，弹性模量，硬度内聚强度，水中裂纹速度）的特定值，这导致稳定的超低k膜，其不被水蒸气降解或集成处理。电介质材料具有约2.8或更小的介电常数，小于45MPa的拉伸应力，约2至约15GPa的弹性模量和约0.2至约2GPa的硬度。还提供了包括本发明的电介质材料的电子结构以及制造介电材料的各种方法。

64. 发明授权

US07023093B2 Very low effective dielectric constant interconnect Structures and methods for fabricating the same 有权
标题翻译：非常低的有效介电常数互连结构及其制造方法
公开(公告)号：US07023093B2
公开(公告)日：2006-04-04
申请号：US10280283
申请日：2002-10-24
申请人： Donald F. Canaperi , Timothy J. Dalton , Stephen M. Gates , Mahadevaiyer Krishnan , Satya V. Nitta , Sampath Purushothaman , Sean P. E. Smith
发明人： Donald F. Canaperi , Timothy J. Dalton , Stephen M. Gates , Mahadevaiyer Krishnan , Satya V. Nitta , Sampath Purushothaman , Sean P. E. Smith
IPC分类号： H01L23/48
CPC分类号： H01L21/76807 , H01L21/76834 , H01L21/76835 , H01L21/76885 , H01L2924/0002 , H01L2924/00
摘要： A structure incorporates very low dielectric constant (k) insulators with copper wiring to achieve high performance interconnects. The wiring is supported by a relatively durable low k dielectric such as SiLk or SiO2 and a very low k and less robust gap fill dielectric is disposed in the remainder of the structure, so that the structure combines a durable layer for strength with a very low k dielectric for interconnect electrical performance.
摘要翻译：一个结构包含非常低的介电常数（k）绝缘体与铜布线，以实现高性能互连。布线由相对耐用的低k电介质（例如SiLk或SiO 2）支撑，并且在该结构的其余部分中设置非常低的k和较不牢固的间隙填充电介质，使得该结构将耐用层与强度非常低 k电介质用于互连电性能。

65. 发明授权

US06929982B2 Patterning layers comprised of spin-on ceramic films 失效
标题翻译：图案层由旋涂陶瓷膜组成
公开(公告)号：US06929982B2
公开(公告)日：2005-08-16
申请号：US10915087
申请日：2004-08-10
申请人： Stephen M. Gates , Jeffrey C. Hedrick , Elbert E. Huang , Dirk Pfeiffer
发明人： Stephen M. Gates , Jeffrey C. Hedrick , Elbert E. Huang , Dirk Pfeiffer
IPC分类号： G03G13/06 , H01L20060101 , H01L21/00 , H01L21/311 , H01L21/312 , H01L21/316 , H01L21/44 , H01L23/48 , H05B6/64
CPC分类号： H01L21/02126 , H01L21/02222 , H01L21/02282 , H01L21/31144 , H01L21/3121 , H01L21/3122 , H01L21/3125 , H01L21/316 , Y10S430/146 , Y10T428/31663
摘要： The present invention comprises a method for forming a hardmask including the steps of depositing a polymeric preceramic precursor film atop a substrate; converting the polymeric preceramic precursor film into at least one ceramic layer, where the ceramic layer has a composition of SivNwCxOyHz where 0.1≦v≦0.9, 0≦w≦0.5, 0.05≦x≦0.9, 0≦y≦0.5, 0.05≦z≦0.8 for v+w+x+y+z=1; forming a patterned photoresist atop the ceramic layer; patterning the ceramic layer to expose regions of the underlying substrate, where a remaining region of the underlying substrate is protected by the patterned ceramic layer; and etching the exposed region of the underlying substrate. Another aspect of the present invention is a buried etch stop layer having a composition of SivNwCxOyHz where 0.05
摘要翻译：本发明包括一种用于形成硬掩模的方法，包括以下步骤：在基底顶上沉积聚合物预陶瓷前体膜; 将聚合物前陶瓷前体膜转化成至少一个陶瓷层，其中陶瓷层具有Si N x O x O x O O的组成，其中0.1 <= v <= 0.9,0 <= w <= 0.5,0.05 <= x <= 0.9,0 <= y <= 0.5,0.05 对于v + w + x + y + z = 1，<= z <= 0.8; 在陶瓷层顶部形成图案化的光刻胶; 图案化陶瓷层以暴露下面的衬底的区域，其中下面的衬底的剩余区域被图案化的陶瓷层保护; 并蚀刻下面的衬底的暴露区域。本发明的另一方面是具有下列组成的掩埋蚀刻停止层：对于v + w + x + y +，0.05

66. 发明授权

US06917108B2 Reliable low-k interconnect structure with hybrid dielectric 有权
公开(公告)号：US06917108B2
公开(公告)日：2005-07-12
申请号：US10294139
申请日：2002-11-14
申请人： John A. Fitzsimmons , Stephen E. Greco , Jia Lee , Stephen M. Gates , Terry Spooner , Matthew S. Angyal , Habib Hichri , Theordorus E. Standaert , Glenn A. Biery
发明人： John A. Fitzsimmons , Stephen E. Greco , Jia Lee , Stephen M. Gates , Terry Spooner , Matthew S. Angyal , Habib Hichri , Theordorus E. Standaert , Glenn A. Biery
IPC分类号： H01L21/768 , H01L23/532 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L21/76832 , H01L21/76801 , H01L21/76807 , H01L21/76835 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： An advanced back-end-of-line (BEOL) interconnect structure having a hybrid dielectric is disclosed. The inter-layer dielectric (ILD) for the via level is preferably different from the ILD for the line level. In a preferred embodiment, the via-level ILD is formed of a low-k SiCOH material, and the line-level ILD is formed of a low-k polymeric thermoset material.

67. 发明授权

US06734096B2 Fine-pitch device lithography using a sacrificial hardmask 失效
标题翻译：使用牺牲硬掩模的精细间距器件光刻
公开(公告)号：US06734096B2
公开(公告)日：2004-05-11
申请号：US10053288
申请日：2002-01-17
申请人： Timothy J. Dalton , Minakshisundaran B. Anand , Michael D. Armacost , Shyng-Tsong Chen , Stephen M. Gates , Stephen E. Greco , Simon M. Karecki , Satyanarayana V. Nitta
发明人： Timothy J. Dalton , Minakshisundaran B. Anand , Michael D. Armacost , Shyng-Tsong Chen , Stephen M. Gates , Stephen E. Greco , Simon M. Karecki , Satyanarayana V. Nitta
IPC分类号： H01L214763
CPC分类号： H01L21/76829 , H01L21/76811 , H01L21/76826
摘要： A method is described for forming a metal pattern in a low-dielectric constant substrate. A hardmask is prepared which includes a low-k lower hardmask layer and a top hardmask layer. The top hardmask layer is a sacrificial layer with a thickness of about 200 Å, preferably formed of a refractory nitride, and which serves as a stopping layer in a subsequent CMP metal removal process. The patterning is performed using resist layers. Oxidation damage to the lower hardmask layer is avoided by forming a protective layer in the hardmask, or by using a non-oxidizing resist strip process.
摘要翻译：描述了在低介电常数衬底中形成金属图案的方法。准备了一个硬掩模，其包括低k较低的硬掩模层和顶部硬掩模层。顶部硬掩模层是厚度为约200埃的牺牲层，优选由耐火氮化物形成，并且在随后的CMP金属去除工艺中用作停止层。使用抗蚀剂层进行图案化。通过在硬掩模中形成保护层，或者通过使用非氧化抗蚀剂剥离工艺来避免对下部硬掩模层的氧化损伤。

68. 发明授权

US06673401B2 Nanoparticle structures utilizing synthetic DNA lattices 有权
标题翻译：利用合成DNA晶格的纳米颗粒结构
公开(公告)号：US06673401B2
公开(公告)日：2004-01-06
申请号：US09733968
申请日：2000-12-12
申请人： Charles T. Black , Stephen M. Gates , Christopher B. Murray , Shouheng Sun
发明人： Charles T. Black , Stephen M. Gates , Christopher B. Murray , Shouheng Sun
IPC分类号： B32B1102
CPC分类号： B82Y25/00 , C07B2200/01 , C12N15/10 , C40B40/00 , H01F1/0054 , H01F1/0063 , Y10T428/13 , Y10T428/24331 , Y10T428/249978 , Y10T428/249979 , Y10T428/24999 , Y10T428/32
摘要： A laminar structure upon a substrate is formed from a) a lattice layer comprising DNA (deoxyribonucleic acid) segments arranged to form cells of the lattice layer, and b), at least one nanoparticle being disposed within each cell of the lattice layer. The nanoparticles are preferably of substantially uniform diameter not exceeding 50 nanometers. A coating may be applied to adhere the the particles to the substrate and to maintain their substantially uniform spaced-apart relationship. The DNA lattice layer is fabricated using known automated synthetis methods, and is designed to contain specific nucleotide base sequences which cause the DNA to form an ordered array of openings, or lattice cells, by self-assembly. Self-assembly of the DNA lattice may be at an air-liquid interface, or in solution. A preferred embodiment is a magnetic storage medium in which the particles are magnetic particles with diameters in the range of 5-20 nm., the particles being organized in square information bits with each bit holding of 4, 9, 16, 25 etc. particles to produce areal information storage densities on the order of 1000 gigabits (one terabit) per square inch. The lattice of bits may be stabilized and protected by a deposited thin film, hard, abrasion-resistant coating.
摘要翻译：基底上的层状结构由a）由布置成形成晶格层的单元的DNA（脱氧核糖核酸）区的晶格层形成，以及b）至少一个纳米颗粒设置在晶格层的每个单元内。纳米颗粒优选具有不超过50纳米的基本均匀的直径。可以施加涂层以将颗粒附着到基材上并保持其基本均匀的间隔关系。使用已知的自动化合成方法制造DNA晶格层，并且被设计为含有特定的核苷酸碱基序列，其通过自组装使DNA形成有序的开口阵列或晶格细胞。 DNA晶格的自组装可以在空气 - 液体界面处或在溶液中。优选的实施方案是磁性存储介质，其中颗粒是直径在5-20nm范围内的磁性颗粒，颗粒被组织成平方信息位，每个位保持4,9,16,25等颗粒以产生大约1000吉比特（1兆比特）每平方英寸的面积信息存储密度。位的晶格可以被沉积的薄膜，硬的耐磨涂层稳定和保护。

69. 发明授权

US06265021B1 Nanoparticle structures utilizing synthetic DNA lattices 失效
标题翻译：利用合成DNA晶格的纳米颗粒结构
公开(公告)号：US06265021B1
公开(公告)日：2001-07-24
申请号：US09127452
申请日：1998-07-31
申请人： Charles T. Black , Stephen M. Gates , Christopher B. Murray , Shouheng Sun
发明人： Charles T. Black , Stephen M. Gates , Christopher B. Murray , Shouheng Sun
IPC分类号： B32B1100
CPC分类号： B82Y25/00 , C07B2200/01 , C12N15/10 , C40B40/00 , H01F1/0054 , H01F1/0063 , Y10T428/13 , Y10T428/24331 , Y10T428/249978 , Y10T428/249979 , Y10T428/24999 , Y10T428/32
摘要： A laminar structure upon a substrate is formed from a) a lattice layer comprising DNA (deoxyribonucleic acid) segments arranged to form cells of the lattice layer, and b), at least one nanoparticle being disposed within each cell of the lattice layer. The nanoparticles are preferably of substantially uniform diameter not exceeding 50 nanometers. A coating may be applied to adhere the particles to the substrate and to maintain their substantially uniform spaced-apart relationship. The DNA lattice layer is fabricated using known automated synthetis methods, and is designed to contain specific nucleotide base sequences which cause the DNA to form an ordered array of openings, or lattice cells, by self-assembly. Self-assembly of the DNA lattice may be at an air-liquid interface, or in solution. A preferred embodiment is a magnetic storage medium in which the particles are magnetic particles with diameters in the range of 5-20 nm., the particles being organized in square information bits with each bit holding of 4, 9, 16, 25 etc. particles to produce real information storage densities on the order of 1000 gigabits (one terabit) per square inch. The lattice of bits may be stabilized and protected by a deposited thin film, hard, abrasion-resistant coating.
摘要翻译：基底上的层状结构由a）由布置成形成晶格层的单元的DNA（脱氧核糖核酸）区的晶格层形成，以及b）至少一个纳米颗粒设置在晶格层的每个单元内。纳米颗粒优选具有不超过50纳米的基本均匀的直径。可以施加涂层以将颗粒附着到基底上并保持其基本均匀的间隔关系。使用已知的自动化合成方法制造DNA晶格层，并且被设计为含有特定的核苷酸碱基序列，其通过自组装使DNA形成有序的开口阵列或晶格细胞。 DNA晶格的自组装可以在空气 - 液体界面处或在溶液中。优选的实施方案是磁性存储介质，其中颗粒是直径在5-20nm范围内的磁性颗粒，颗粒被组织成平方信息位，每个位保持4,9,16,25等颗粒以产生大约1000吉比特（1兆比特）每平方英寸的真实信息存储密度。位的晶格可以被沉积的薄膜，硬的耐磨涂层稳定和保护。

70. 发明授权

US4794863A Motive structure for transporting workpieces 失效
标题翻译：运输工件的动力结构
公开(公告)号：US4794863A
公开(公告)日：1989-01-03
申请号：US171320
申请日：1988-03-21
申请人： Stephen M. Gates , Michael Liehr , Michel G. E. G. Renier , Gary W. Rubloff
发明人： Stephen M. Gates , Michael Liehr , Michel G. E. G. Renier , Gary W. Rubloff
IPC分类号： B23P19/00 , B23Q7/00 , B61D47/00 , B65G25/02 , B65G35/06 , B65G47/52 , B65G49/07 , B61B13/00
CPC分类号： B65G25/02
摘要： An improved motive structure for transporting workpieces (wafers, chip, packages, etc.) between processing stations or tools in a manufacturing operation. The structure includes a first circular crankshaft assembly connected to center axles disposed at right angles to the transport motion. A second such crankshaft assembly is located some distance along the path of motion. Three driverods are connected between the first and second crankshaft assemblies, each affixed 120.degree. apart on the circular crankshafts so that each driverod is moved upward, then forward along the transport direction, then downward and backward to its original position as the crankshafts go through a complete 360.degree. rotation. The structure is disposed beneath transport rails which hold movable containers for holding the workpieces. As a driverod moves up and forward, it contacts a spring-loaded element on the movable container and drives it forward by friction contact. As each driverod begins to move down and away from the workpiece container, the next driverod is being rotated up and forward to continue to move the container along the rails. Pluralities of such structures are linearly arranged to provide an extended transport system.

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