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    • 67. 发明授权
    • Sample preparation apparatus and spray apparatus for sample preparation
    • 样品制备装置和样品制备用喷雾装置
    • US06312943B1
    • 2001-11-06
    • US09349727
    • 1999-07-08
    • Toshihiro TakahashiYoshio Monji
    • Toshihiro TakahashiYoshio Monji
    • C12M136
    • G01N1/312G01N2001/317
    • A sample preparation apparatus for preparing a sample to be used for detecting specimens such as microorganisms isolated on a filter so as to enumerate microorganisms in the sample has a turntable on which multiple sample bases are formed, a filter insertion unit, an extractant spray apparatus, a luminescent reagent spray apparatus and a filter removal unit, disposed in order along a periphery of the turntable in a direction of rotation of the turntable. By eliminating the need to move filters between processing operations as well as any special skill required in the spraying of the extractant and reagent, the sample preparation apparatus can provide accurate microorganism counts quickly and efficiently.
    • 用于制备用于检测样品的样品的样品制备装置,其中所述样品例如在过滤器上分离的微生物,以便列举样品中的微生物,具有其上形成多个样品基底的转台,过滤器插入单元,萃取剂喷雾装置, 发光试剂喷雾装置和过滤器去除单元,沿着转台的周边沿转盘的旋转方向依次布置。 通过消除在处理操作之间移动过滤器的需要以及喷洒萃取剂和试剂所需的任何特殊技术,样品制备装置可以快速有效地提供精确的微生物计数。
    • 69. 发明授权
    • System and method for automatically determining test point for DC
parametric test
    • 用于自动确定直流参数测试测试点的系统和方法
    • US5841965A
    • 1998-11-24
    • US706928
    • 1996-09-03
    • Toshihiro Takahashi
    • Toshihiro Takahashi
    • G01R31/3183G06F17/50G06F11/27
    • G01R31/318357G01R31/318307G06F17/5022
    • Logical simulation result data is obtained from performing a logical simulation operation on a logical circuit to be tested. The logical simulation result data is then examined and thus a test point is obtained for a DC parametric test in which direct-current characteristics of the logical circuit are tested. The logical simulation result data indicates input logical signal levels applied to input terminals and output logical signal levels appearing at output terminals in response to application of the input logical signal levels to the input terminals, and further indicates how the input logical signal levels and output logical signal levels vary as time progresses. It is determined whether or not a desired logical signal level is held at a predetermined circuit terminal of the input terminals and output terminals for a predetermined level maintenance time period in the logical simulation result data.
    • 通过对要测试的逻辑电路进行逻辑仿真操作获得逻辑模拟结果数据。 然后检查逻辑仿真结果数据,从而获得对其中测试逻辑电路的直流特性的直流参数测试的测试点。 逻辑模拟结果数据指示响应于输入逻辑信号电平施加于输入端而输出终端输出的逻辑信号电平并输出出现在输出端的逻辑信号电平,并进一步指示输入逻辑信号电平和输出逻辑 信号电平随着时间的推移而变化。 在逻辑模拟结果数据中,确定期望的逻辑信号电平是否在预定电平维持时间段的输入端子和输出端子的预定电路端子处被保持。