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61. 发明公开

EP1410426A2 BONDING OF LIGHT EMITTING DIODES HAVING SHAPED SUBSTRATES AND COLLETS FOR BONDING OF LIGHT EMITTING DIODES HAVING SHAPED SUBSTRATES 有权
标题翻译：设备与特殊形状的光衬底和夹头发光二极管于连接发光二极管具有特殊形状的光SUBSTRATES
公开(公告)号：EP1410426A2
公开(公告)日：2004-04-21
申请号：EP02763308.0
申请日：2002-07-22
申请人： Cree, Inc. , Cree Microwave, Inc.
发明人： SLATER, David , BHARATHAN, Jayesh , EDMOND, John , RAFFETTO, Mark , MOHAMMED, Anwar , NEGLEY, Gerry , ANDREWS, Peter
IPC分类号： H01L21/00
CPC分类号： H01L33/40 , H01L24/32 , H01L33/20 , H01L33/62 , H01L2224/32245 , H01L2224/48091 , H01L2224/48463 , H01L2224/73265 , H01L2924/12032 , H01L2924/12041 , H01L2924/00012 , H01L2924/00
摘要： Bonding of flip-chip mounted light emitting devices having an irregular configuration is provided. Light emitting diodes having a shaped substrate are bonded to a submount by applying forces to the substrate an a manner such that shear forces within the substrate do not exceed a failure threshold of the substrate. Bonding a light emitting diode to a submount may be provided by applying force to a surface of a substrate of the light emitting diode that is oblique to a direction of motion of the light emitting diode to thermosonically bond the light emitting diode to the submount. Collets for use in bonding shaped substrates to a submount and systems for bonding shaped substrates to a submount are also provided.

62. 发明申请

US20050280087A1 Laterally diffused MOS transistor having source capacitor and gate shield 审中-公开
标题翻译：具有源电容器和栅极屏蔽的横向扩散MOS晶体管
公开(公告)号：US20050280087A1
公开(公告)日：2005-12-22
申请号：US10870795
申请日：2004-06-16
申请人： Jeff Babcock , Johan Darmawan , John Mason
发明人： Jeff Babcock , Johan Darmawan , John Mason
IPC分类号： H01L21/336 , H01L23/522 , H01L27/06 , H01L27/108 , H01L29/08 , H01L29/10 , H01L29/40 , H01L29/417 , H01L29/49 , H01L29/78
CPC分类号： H01L27/0629 , H01L23/5223 , H01L29/0847 , H01L29/1045 , H01L29/402 , H01L29/4175 , H01L29/4933 , H01L29/66659 , H01L29/7835 , H01L2924/0002 , H01L2924/00
摘要： An LDMOS transistor includes a source capacitor structure and a gate-drain shield which can be interconnected whereby the source capacitor can be grounded to provide an RF ground for the shield and whereby the RF shield can have a positive DC voltage bias to enhance laterally diffused drain conductance without increasing doping therein.
摘要翻译： LDMOS晶体管包括源极电容器结构和栅极 - 漏极屏蔽，其可以互连，由此源电容器可以被接地以为屏蔽提供RF接地，由此RF屏蔽可以具有正的DC电压偏置以增强横向扩散的漏极电导而不增加掺杂。

63. 发明授权

US06888167B2 Flip-chip bonding of light emitting devices and light emitting devices suitable for flip-chip bonding 有权
标题翻译：发光器件和适用于倒装芯片接合的发光器件的倒装片接合
公开(公告)号：US06888167B2
公开(公告)日：2005-05-03
申请号：US10185252
申请日：2002-06-27
申请人： David B. Slater, Jr. , Jayesh Bharathan , John Edmond , Mark Raffetto , Anwar Mohammed , Peter S. Andrews , Gerald H. Negley
发明人： David B. Slater, Jr. , Jayesh Bharathan , John Edmond , Mark Raffetto , Anwar Mohammed , Peter S. Andrews , Gerald H. Negley
IPC分类号： H01L21/60 , H01L33/20 , H01L33/40 , H01L33/62 , H01L29/267
CPC分类号： H01L33/62 , H01L33/38 , H01L2224/04026 , H01L2224/26175 , H01L2224/291 , H01L2224/32245 , H01L2224/48463 , H01L2224/73265 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/12032 , H01L2924/12041 , H01L2924/00014 , H01L2924/014 , H01L2924/00
摘要： Light emitting device die having a mesa configuration on a substrate and an electrode on the mesa are attached to a submount in a flip-chip configuration by forming predefined pattern of conductive die attach material on at least one of the electrode and the submount and mounting the light emitting device die to the submount. The predefined pattern of conductive die attach material is selected so as to prevent the conductive die attach material from contacting regions of having opposite conductivity types when the light emitting device die is mounted to the submount. The predefined pattern of conductive die attach material may provide a volume of die attach material that is less than a volume defined by an area of the electrode and a distance between the electrode and the submount. Light emitting device dies having predefined patterns of conductive die attach material are also provided. Light emitting devices having a gallium nitride based light emitting region on a substrate, such as a silicon carbide substrate, may also be mounted in a flip-chip configuration by mounting an electrode of the gallium nitride based light emitting region to a submount utilizing a B-stage curable die epoxy. Light emitting device dies having a B-stage curable die epoxy are also provided.
摘要翻译：通过在电极和底座中的至少一个上形成预定图案的导电芯片附着材料，并将其安装在基板上，并将底板上的电极和底板上的电极的底板配置在倒装芯片结构的底座上，发光器件死到底座。选择导电芯片附着材料的预定图案，以便当发光器件裸片安装到底座时，防止导电芯片附着材料接触具有相反导电类型的区域。导电芯片附接材料的预定图案可以提供小于由电极区域限定的体积以及电极和底座之间的距离的管芯附着材料的体积。还提供具有预定图案的导电芯片附着材料的发光器件裸片。在碳化硅基板等基板上具有氮化镓系发光区域的发光元件也可以通过将氮化镓系发光区域的电极安装在利用B的基板的倒装芯片配置中级环氧树脂。还提供了具有B级可固化模具环氧树脂的发光器件模具。

64. 发明申请

US20030210096A1 N-way RF power amplifier circuit with increased back-off capability and power added efficiency using selected phase lengths and output impedances 有权
标题翻译： N路RF功率放大器电路具有增加的回退能力和功率附加效率，使用选定的相位长度和输出阻抗
公开(公告)号：US20030210096A1
公开(公告)日：2003-11-13
申请号：US10430568
申请日：2003-05-05
申请人： Cree Microwave, Inc.
发明人： Raymond Sydney Pengelly , Simon Maurice Wood
IPC分类号： H03F003/68
CPC分类号： H03F1/0288 , H03F1/0277 , H03F1/32 , H03F3/602 , H03F2201/3203
摘要： An RF power amplifier circuit for amplifying an RF signal over a broad range of power with improved efficiency includes a carrier amplifier for amplifying an RF signal over a first range of power and with a power saturation level below the maximum of the broad range of power is disclosed. A plurality of peak amplifiers are connected in parallel with the carrier amplifier with each of the peak amplifiers being biased to sequentially provide an amplified output signal after the carrier amplifier approaches saturation. The input signal is applied through a signal splitter to the carrier amplifier and the plurality of peak amplifiers, and an output for receiving amplified output signals from the carrier amplifier and the plurality of peak amplifiers includes a resistive load R/2. The split input signal is applied through a 90null transformer to the carrier amplifier, and the outputs of the peak amplifiers are applied through 90null transformers to a output load. When operating below saturation, the carrier amplifier delivers power to a load of 2R and the carrier amplifier delivers current to the load, which is one-half the current at maximum power when the amplifier is saturated. In one embodiment with the output having an impedance, Z, the carrier amplifier and each peak amplifier is connected to the output through an output-matching network presenting an output impedance of less than Z to each amplifier and with each output-matching network having selected phase length to reduce reactance of the output impedance.
摘要翻译：一种RF功率放大器电路，用于在提高效率的宽范围的功率范围内放大RF信号，包括载波放大器，用于在第一功率范围内放大RF信号，并且功率饱和电平低于功率范围宽度的最大值披露多个峰值放大器与载波放大器并联连接，每个峰值放大器被偏置以在载波放大器接近饱和之后依次提供放大的输出信号。输入信号通过信号分离器施加到载波放大器和多个峰值放大器，并且用于从载波放大器和多个峰值放大器接收放大的输出信号的输出包括电阻负载R / 2。分路输入信号通过90°变压器施加到载波放大器，峰值放大器的输出通过90°变压器施加到输出负载。当工作在饱和度以下时，载波放大器将功率输送到2R的负载，并且载波放大器将电流传递到负载，当放大器饱和时，其为最大功率时的电流的一半。在一个实施例中，输出具有阻抗Z，载波放大器和每个峰值放大器通过输出匹配网络连接到输出，输出匹配网络向每个放大器呈现小于Z的输出阻抗，并且每个输出匹配网络已经选择相位长度，以减少输出阻抗的电抗。

65. 发明申请

US20040113697A1 Single package multi-chip RF power amplifier 有权
标题翻译：单封装多芯片射频功率放大器
公开(公告)号：US20040113697A1
公开(公告)日：2004-06-17
申请号：US10318849
申请日：2002-12-13
申请人： Cree Microwave, Inc.
发明人： Raymond Sydney Pengelly , Simon Maurice Wood , John Phillip Quinn
IPC分类号： H03F003/68
CPC分类号： H03F3/602 , H01L23/66 , H01L24/48 , H01L24/49 , H01L25/072 , H01L2223/6644 , H01L2224/48091 , H01L2224/49111 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01023 , H01L2924/10329 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13063 , H01L2924/13064 , H01L2924/19043 , H01L2924/3011 , H01L2924/30111 , H01L2924/00 , H01L2224/45099 , H01L2224/05599
摘要： Disclosed are a multi-chip power amplifier comprising a plurality chips with each chip being a transistor amplifier, and a housing in which all of the semiconductor chips are mounted. A plurality of input leads extend into the housing and a plurality of output leads extend from the housing. A plurality of first matching networks couple a semiconductor chip to an input lead and a plurality of second matching networks couple each semiconductor chip to an output lead whereby each chip has its own input lead and output lead. By providing all amplifier chips within a single housing with matching networks within the housing coupling the chips to the input and output leads, manufacturing cost is reduced and the overall package footprint on a mounting substrate is reduced. Further, the close proximity of the chips within the housing reduces phase differences among signals in the semiconductor chips.
摘要翻译：公开了一种多芯片功率放大器，其包括多个芯片，每个芯片是晶体管放大器，以及壳体，其中安装了所有半导体芯片。多个输入引线延伸到壳体中，并且多个输出引线从壳体延伸。多个第一匹配网络将半导体芯片耦合到输入引线，并且多个第二匹配网络将每个半导体芯片耦合到输出引线，由此每个芯片具有其自己的输入引线和输出引线。通过将单个外壳内的所有放大器芯片提供到壳体内的匹配网络，将芯片耦合到输入和输出引线，降低了制造成本并降低了安装基板上的整体封装占地面积。此外，壳体内的芯片的紧密接近减少了半导体芯片中的信号之间的相位差。

66. 发明授权

US06900501B2 Silicon on insulator device with improved heat removal 有权
标题翻译：绝缘体上硅器件具有改善的散热性能
公开(公告)号：US06900501B2
公开(公告)日：2005-05-31
申请号：US10053424
申请日：2001-11-02
申请人： Johan Agus Darmawan
发明人： Johan Agus Darmawan
IPC分类号： H01L27/04 , H01L21/822 , H01L23/367 , H01L27/08 , H01L27/12 , H01L29/786 , H01L27/01
CPC分类号： H01L29/78603 , H01L23/3677 , H01L2924/0002 , H01L2924/10158 , H01L2924/3011 , H01L2924/00
摘要： A semiconductor device is fabricated in a silicon on insulator (SOI) substrate including a supporting silicon substrate, a silicon oxide layer supported by the substrate, and a silicon layer overlying the silicon oxide layer. An electrical component is fabricated in the silicon layer over a portion of the silicon oxide layer, and then the substrate opposite from the component is masked and etched. A metal layer is then formed in the portion of the substrate which has been removed by etching with the metal layer providing heat removal from the component. In an alternative embodiment, the silicon oxide layer overlying the portion of the substrate is removed with the metal layer abutting the silicon layer. In fabricating the device, preferential etching is employed to remove the silicon in the substrate with the silicon oxide functioning as an etchant stop. A two step process can be employed including a first oxide etch to etch the bulk of the silicon and then a more selective but slower etch. Then, the exposed silicon oxide can then be removed, as in the alternative embodiment, by a preferential etchant of silicon oxide.
摘要翻译：在包括支撑硅衬底的硅绝缘体（SOI）衬底，由衬底支撑的氧化硅层和覆盖氧化硅层的硅层上制造半导体器件。在氧化硅层的一部分上的硅层中制造电气部件，然后对与元件相对的基板进行掩模蚀刻。然后在衬底的已经通过蚀刻除去金属层的部分中形成金属层，从该部件提供热量去除。在替代实施例中，覆盖衬底部分的氧化硅层被去除，金属层邻接硅层。在制造该器件时，采用优先蚀刻来去除衬底中的硅，氧化硅起蚀刻剂停止的作用。可以采用两步法，包括第一氧化物蚀刻来蚀刻大部分硅，然后进行更多选择性但更慢的蚀刻。然后，如在替代实施例中那样，可以通过优选的氧化硅蚀刻剂去除暴露的氧化硅。

67. 发明申请

US20060214732A1 High power Doherty amplifier using multi-stage modules 有权
标题翻译：大功率Doherty放大器采用多级模块
公开(公告)号：US20060214732A1
公开(公告)日：2006-09-28
申请号：US11090577
申请日：2005-03-24
申请人： Raymond Pengelly , E. Crescenzi , Simon Wood , Tom Dekker
发明人： Raymond Pengelly , E. Crescenzi , Simon Wood , Tom Dekker
IPC分类号： H03F3/68
CPC分类号： H03F1/0288
摘要： A high power Doherty RF amplifier utilizes multi-stage amplifier modules for both the main amplifier and the peak amplifiers. In one embodiment of a two way two stage amplifier, the first stage of each amplifier module can include signal pre-distortion whereby the first stage compensates for distortion in both the first and second stages. The design is simple and results in a high efficiency amplifier with high gain. In one embodiment, a commercially available CREE PFM1903OSM power module is used in both the main amplifier and the peak amplifier.
摘要翻译：高功率Doherty RF放大器利用主放大器和峰值放大器的多级放大器模块。在双向两级放大器的一个实施例中，每个放大器模块的第一级可以包括信号预失真，由此第一级补偿第一级和第二级的失真。设计简单，产生了高增益的高效率放大器。在一个实施例中，市售的CREE PFM1903OSM功率模块用于主放大器和峰值放大器。

68. 发明申请

US20050280101A1 Laterally diffused MOS transistor having N+ source contact to N-doped substrate 有权
标题翻译：具有与N掺杂衬底的N +源极接触的横向扩散的MOS晶体管
公开(公告)号：US20050280101A1
公开(公告)日：2005-12-22
申请号：US10870720
申请日：2004-06-16
申请人： Jeff Babcock , Johan Darmawan , John Mason
发明人： Jeff Babcock , Johan Darmawan , John Mason
IPC分类号： H01L21/336 , H01L29/10 , H01L29/40 , H01L29/417 , H01L29/76 , H01L29/78
CPC分类号： H01L29/7835 , H01L29/1045 , H01L29/1087 , H01L29/402 , H01L29/4175 , H01L29/41766 , H01L29/66659
摘要： Reduced source resistance is realized in a laterally diffused MOS transistor by fabricating the transistor in a P-doped epitaxial layer on an N-doped semiconductor substrate and using a trench contact for ohmically connecting the N-doped source region to the N-doped substrate.
摘要翻译：在横向扩散的MOS晶体管中通过在N掺杂半导体衬底上的P掺杂外延层中制造晶体管并使用沟槽接触将N掺杂源极区域与N掺杂衬底进行欧姆连接来实现降低的源极电阻。

69. 发明申请

US20050280080A1 LDMOS transistor with improved gate shield 有权
标题翻译： LDMOS晶体管具有改进的栅极屏蔽
公开(公告)号：US20050280080A1
公开(公告)日：2005-12-22
申请号：US10870753
申请日：2004-06-16
申请人： Jeff Babcock , Johan Darmawan , John Mason , Ly Diep
发明人： Jeff Babcock , Johan Darmawan , John Mason , Ly Diep
IPC分类号： H01L21/336 , H01L29/10 , H01L29/40 , H01L29/417 , H01L29/45 , H01L29/76 , H01L29/78
CPC分类号： H01L29/7835 , H01L29/1045 , H01L29/402 , H01L29/4175 , H01L29/456 , H01L29/66659
摘要： A LDMOS transistor having a gate shield provides reduced drain coupling to the gate shield and source by restricting the thickness of the gate shield and by confining a source contact to the source region without overlap of the gate.
摘要翻译：具有栅极屏蔽的LDMOS晶体管通过限制栅极屏蔽的厚度并且通过将源极接触限制在源极区而不与栅极重叠而提供对栅极屏蔽和源极的减少的漏极耦合。

70. 发明申请

US20040085132A1 RF transistor amplifier linearity using suppressed third order transconductance 有权
标题翻译： RF晶体管放大器使用抑制三阶跨导的线性度
公开(公告)号：US20040085132A1
公开(公告)日：2004-05-06
申请号：US10289734
申请日：2002-11-06
申请人： Cree Microwave, Inc.
发明人： Raymond Sydney Pengelly , Simon Maurice Wood , John Phillip Quinn
IPC分类号： H03F003/68
CPC分类号： H03F3/602 , H03F1/3205 , H03F3/211
摘要： The linearity of a transistor amplifier comprising a plurality of transistors operating parallel is improved by reducing the odd order transconductance derivatives of signals generated by the transistors. The transistors can be provided in groups with each group having a different bias voltage applied thereto or each group of transistors can have a different input signal applied thereto. The groups of transistors can have different physical parameters such as the width to length ratio of gates in field effect transistors and threshold voltages for the transistors.
摘要翻译：通过减少由晶体管产生的信号的奇数阶跨导导数，包括多个并联工作的晶体管的晶体管放大器的线性度得到改善。可以分组地提供晶体管，每个组具有施加到其上的不同的偏置电压，或者每组晶体管可以具有施加到其上的不同的输入信号。晶体管组可以具有不同的物理参数，例如场效应晶体管中的栅极的宽度与长度之比以及晶体管的阈值电压。

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