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51. 发明申请

WO2014051625A1 DYNAMICALLY SELECTING BETWEEN MEMORY ERROR DETECTION AND MEMORY ERROR CORRECTION 审中-公开
标题翻译：在存储器错误检测和存储器错误校正之间动态选择
公开(公告)号：WO2014051625A1
公开(公告)日：2014-04-03
申请号：PCT/US2012/058056
申请日：2012-09-28
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
发明人： MOGUL, Jeffrey Clifford , MURALIMANOHAR, Naveen , SHAH, Mehul A. , ANDERSON, Eric A.
IPC分类号： G11C29/42 , G06F11/08
CPC分类号： G06F11/073 , G06F11/0763 , G06F11/0793 , G06F11/1048 , G11C2029/0411
摘要： Example methods, systems, and apparatus to dynamically select between memory error detection and memory error correction are disclosed herein. An example system includes a buffer to store a flag settable to a first value to indicate that a memory page is to store error protection information to detect but not correct errors in the memory page. The flag is settable to a second value to indicate that the error protection information is to detect and correct errors for the memory page. The example system includes a memory controller to receive a request based on the flag to enable error detection without correction for the memory page when the flag is set to the first value, and to enable error detection and correction for the memory page when the flag is set to the second value.
摘要翻译：本文公开了在存储器错误检测和存储器错误校正之间动态选择的示例性方法，系统和装置。一个示例系统包括一个缓冲器，用于存储可设置到第一值的标志，以指示存储器页面存储错误保护信息以检测存储器页面中的错误，而不是错误。该标志可设置为第二个值，以指示错误保护信息是检测和纠正存储器页面的错误。示例系统包括存储器控制器，用于当标志被设置为第一值时，基于该标志来接收请求以启用错误检测而无需对存储器页进行校正，并且当该标志为标志位时，允许存储器页的错误检测和校正设置为第二个值。

52. 发明申请

WO2012149298A1 WAKING A MEDIA BUS 审中-公开
标题翻译：调用媒体总线
公开(公告)号：WO2012149298A1
公开(公告)日：2012-11-01
申请号：PCT/US2012/035428
申请日：2012-04-27
申请人： QUALCOMM INCORPORATED , GRUBER, Hans Georg , ARCEO, Julio , HARIHARAN, Magesh , MOHAN, Suren
发明人： GRUBER, Hans Georg , ARCEO, Julio , HARIHARAN, Magesh , MOHAN, Suren
IPC分类号： G06F13/42
CPC分类号： G06F13/4291 , G06F1/04 , G06F11/0763 , G06F11/1658
摘要： Arrangements for restarting data transmission on a serial low-power inter-chip media bus (SLIMbus) are presented. A clock signal may be provided in an active mode to a component communicatively coupled with the SLIMbus. Immediately prior to the clock signal in the active mode being provided, the clock signal may have been in a paused mode. While the clock signal was in the paused mode at least until the clock signal is provided in the active mode, the data line may have been inactive (e.g., a toggle on the data line may not have been present). Frame synchronization data for a frame may be transmitted. The frame synchronization data for the frame, as received by the component, may not match expected frame synchronization data. Payload data may be transmitted as part of the frame to the component, wherein the payload data is expected to be read properly by the component.
摘要翻译：介绍了在串行低功耗芯片间媒体总线（SLIMbus）上重新启动数据传输的安排。可以以活动模式将时钟信号提供给与SLIMbus通信耦合的组件。紧接在提供处于活动模式的时钟信号之前，时钟信号可能已经处于暂停模式。至少在时钟信号处于激活模式之前，时钟信号处于暂停模式，数据线可能已经不工作（例如，数据线上的切换可能不存在）。可以发送帧的帧同步数据。由组件接收的帧的帧同步数据可能不匹配预期的帧同步数据。有效负载数据可以作为帧的一部分被发送到组件，其中预期有效载荷数据被组件正确地读取。

53. 发明申请

WO2004023302A3 METHOD AND DEVICE FOR RECOGNIZING ERRORS IN A DISTRIBUTED REAL-TIME COMPUTER SYSTEM 审中-公开
标题翻译：和设备故障检测方法在分布式实时计算机系统
公开(公告)号：WO2004023302A3
公开(公告)日：2004-10-28
申请号：PCT/AT0300256
申请日：2003-09-03
申请人： FTS COMPUTERTECHNIK GMBH , KOPETZ HERMANN
发明人： KOPETZ HERMANN
IPC分类号： G06F11/00
CPC分类号： G06F11/0763
摘要： The invention relates to a method for consistent recognition of errors in a distributed real-time computer system, comprising a plurality of node computers which exchange messages via a round-based real-time communication system. According to the invention, the node computers form functional groups. One node computer can be a member of several functional groups. A dedicated functional group member field is allocated to each functional group. A specified bit of the functional group member field is clearly allocated to each node computer involved in said functional group; each node computer manages a local version of the functional group member field of each functional group in which it is involved, and the sending node places the associated bit in the local functional group member field on RIGHT prior to sending a message or WRONG prior to sending a message according to whether the sending node considers that the operability thereof in the functional group is correct or not. The sending node copies all the local functional group member fields thereof in a message to be sent in order to transmit them to a recipient.
摘要翻译：一种用于在分布式实时计算机系统错误的一致检测方法，包括多个经由轮系的实时通信的系统消息交换数据节点的计算机。根据本发明，形成节点计算器的官能团，它为一个节点的计算机是可能是几个功能组的成员，并且其中每个官能团被分配一个专用的功能组件领域，并且其中每个节点的计算机所涉及的功能组件字段的指定位唯一地与相关联的功能组中，并且其中每个节点计算机的本地版本在其参与，管理，并且每个功能组的功能组成员字段，其中，发送一个消息，所述发射节点之前设置在其本地功能组成员字段其相关联的位为TRUE或FALSE，这取决于是否在发送节点上其操作性这个功能组中关于作为给定的或没有，并且其中所述发送节点将所有其本地功能组成员字段的在消息中被发送，将它们传送给收件人。

54. 发明申请

WO1993005456A1 LOCALIZING POWER FAULTS IN AN ELECTRONIC PRICING DISPLAY SYSTEM 审中-公开
标题翻译：在电子价格显示系统中定位电源故障
公开(公告)号：WO1993005456A1
公开(公告)日：1993-03-18
申请号：PCT/US1992007319
申请日：1992-08-28
申请人： ELECTRONIC RETAILING SYSTEMS INTERNATIONAL
发明人： ELECTRONIC RETAILING SYSTEMS INTERNATIONAL , BERLUTI, Vincent , POLAND, Terrell , WALDRON, Steven
IPC分类号： G05B23/02
CPC分类号： H04L12/40032 , G06F11/0763 , G06F11/0796 , H04L12/403
摘要： Methods and apparatus are dislocsed for localizing power faults occuring in an electronic pricing display system. A host communicates with electronic price displays (10) via serial data communications bus (11), with power limiting devices (5) located on the bus so that a first one of the elctronic price displays is powered through a first power limiting device and a second one of the power limiting devices is not powered through the first power limiting device. By sending messages to particular electronic price displays that are powered through the same power limiting device, it can be established whether the particular electronic price displays and their associated portions of the communications bus are functioning properly. By removing power to the portion of a communications bus powered through a particular power liminting device when the associated electronic price display draws excessive power, the power fault can be localized.
摘要翻译：方法和设备被错位用于定位电子定价显示系统中发生的电力故障。主机通过串行数据通信总线（11）与电子价格显示器（10）通信，功率限制装置（5）位于总线上，使得电子价格显示器中的第一个通过第一功率限制装置和第二功率限制装置不通过第一功率限制装置供电。通过向通过相同功率限制装置供电的特定电子价格显示器发送消息，可以确定特定电子价格显示器及其相关部分的通信总线是否正常工作。当相关联的电子价格显示消耗过多的功率时，通过去除通过特定功率限制装置供电的通信总线的部分的电力，可以对电力故障进行定位。

55. 发明申请

WO9101027A3 ILLEGAL SEQUENCE DETECTION AND PROTECTION CIRCUIT 审中-公开
标题翻译：非法序列检测和保护电路
公开(公告)号：WO9101027A3
公开(公告)日：1991-03-21
申请号：PCT/US9003397
申请日：1990-06-18
申请人： PACIFIC BELL
发明人： LIU KUO-HUI
IPC分类号： G06F11/00 , H04L1/24 , H04Q11/04 , G06K
CPC分类号： G06F11/0763 , H04J2203/006 , H04L1/242
摘要： A circuit for eliminating illegal data sequences from a data stream is disclosed. The circuit (10) examines and stores a portion of an input data stream (28). The previously received data sequence is then examined. If the previously received data matches an illegal sequence, the stored data is altered. The stored data is then outputted to form an output sequence (29).
摘要翻译：公开了一种用于从数据流中消除非法数据序列的电路。电路（10）检查并存储输入数据流（28）的一部分。然后检查先前接收到的数据序列。如果先前接收到的数据与非法序列匹配，则存储的数据将被更改。存储的数据然后被输出以形成输出序列（29）。

56. 发明公开

KR1020140086174A 멀티-타임 프로그래머블 동작의 오류 검출 방법 및 이를 채용한 유기 발광 표시 장치 审中-实审
标题翻译：检测多次可编程操作的错误的方法，以及使用其的有机发光显示装置
公开(公告)号：KR1020140086174A
公开(公告)日：2014-07-08
申请号：KR1020120156337
申请日：2012-12-28
申请人： 삼성디스플레이 주식회사
发明人： 권명호 , 이창진 , 이창길 , 김태식
IPC分类号： G09G3/30
CPC分类号： G06F11/0763 , G06F11/0736 , G09G3/006 , G09G3/3208 , G09G5/06 , G09G2320/0276 , G09G2330/12
摘要： A method of detecting an error of a multi-time programmable (MTP) operation writes a gamma-offset and a header-bit for each reference gray-level in an MTP memory device while the MTP operation on a pixel circuit is performed, wherein the header-bit indicates whether or not the gamma-offset is written in the MTP memory device; and detects whether or not the MTP operation is performed on the pixel circuit based on a logical operation of the header-bit for each reference gray-level read from the MTP memory device when the MTP operation on the pixel circuit is finished.
摘要翻译：检测多时间可编程（MTP）操作的错误的方法在执行像素电路上的MTP操作时，在MTP存储器件中为每个参考灰度级写入伽马偏移和标题位，其中标题位表示是否在MTP存储器件中写入伽马偏移量; 并且当对像素电路的MTP操作完成时，基于从MTP存储器件读取的每个参考灰度级的标题位的逻辑运算，检测是否对像素电路执行MTP操作。

57. 发明公开

KR1020040038712A 비휘발성 메모리 시스템에서 사용하기 위한 전원 관리 블럭 无效
标题翻译：在非易失性存储器系统中使用的电源管理块确定存储电源的先前状态异常地关闭
公开(公告)号：KR1020040038712A
公开(公告)日：2004-05-08
申请号：KR1020030075147
申请日：2003-10-27
申请人： 샌디스크 엘엘씨
发明人： 창,로버트씨. , 콰와미,바만 , 사벳-샤기,파시드 , 유딘,세르게이
IPC分类号： G11C16/30
CPC分类号： G06F11/0763 , G06F11/1417 , G06F11/1435 , G06F11/1441
摘要： PURPOSE: A power supply management block to be used in a nonvolatile memory system is provided to enable to determine efficiently whether a system whose memory power is turned on is turned off normally or abnormally. CONSTITUTION: A power supply management block(304) includes a random number of pages. The number of pages included in the power supply management block is determined according to the standard size of a block in the whole nonvolatile memory including the power supply management block. When a memory part is initialized, an initialization or start signature(312) is recorded in the first page(308a) of the power supply management block. The memory part including the power management block is supplied with power, the recent page with contents is accessed generally. A prevention or close signature includes a bit to indicate that the close process is ended. When the close signature is recorded in a page(308b), the close signature is recorded in the page(308b) together with other information.
摘要翻译：目的：提供在非易失性存储器系统中使用的电源管理块，以便能够有效地确定其存储器电源被接通的系统是正常还是异常地被断开。构成：电源管理块（304）包括随机数的页面。根据包括电源管理块的整个非易失性存储器中的块的标准尺寸来确定包括在电源管理块中的页数。当存储器部分被初始化时，初始化或开始签名（312）被记录在电源管理块的第一页（308a）中。包括电源管理块的存储器部分被供电，通常访问具有内容的最近的页面。预防或关闭签名包括一点以表示关闭过程结束。当在页面（308b）中记录关闭签名时，将密切签名与其他信息一起记录在页面（308b）中。

58. 发明授权

KR100350484B1 저장 디바이스에서 스택과 관련된 커랩션을 검출하기 위한장치 및 방법 失效
标题翻译：用于检测与存储设备中的堆叠相关的损坏的装置和方法
公开(公告)号：KR100350484B1
公开(公告)日：2002-08-28
申请号：KR1019990052272
申请日：1999-11-23
申请人： 삼성전자주식회사
发明人： 로베떼,스티븐유진
IPC分类号： G06F5/06
CPC分类号： G06F11/0763 , G06F11/073 , G06F21/52
摘要： 본발명은기억장치내의스택과관련된커랩션(corruption)을검출하기위한기술에관한것이다. 본발명의일실시예에서, 처리장치가기억장치내의스택에인접하여초기상태를갖는다량의정보를입력하게된다. 상기처리장치는상기정보가초기상태로부터이탈되는것을확인하여기억장치내의스택과관련된커랩션을검출하기위하여상기다량의정보를검사한다.

59. 发明申请

WO2016036447A3 SEMANTIC FRAMEWORK FOR VARIABLE HAPTIC OUTPUT 审中-公开
公开(公告)号：WO2016036447A3
公开(公告)日：2016-06-09
申请号：PCT/US2015041858
申请日：2015-07-23
申请人： APPLE INC
发明人： MOUSSETTE CAMILLE , BUTCHER GARY , VERWEIJ HUGO , IVE JONATHAN
IPC分类号： G06F3/01 , G06F3/041 , G06F3/0484 , G06F11/07 , G06F11/10 , G08B1/00 , G08B3/10 , G08B6/00 , G08B23/00 , H04L12/58 , H04M1/725 , H04M19/04
CPC分类号： G08B6/00 , G06F3/016 , G06F3/0416 , G06F3/04842 , G06F3/0488 , G06F11/0745 , G06F11/0763 , G06F2203/014 , G08B3/10 , G08B7/06 , H04L51/24 , H04M1/72569 , H04M19/04
摘要： Methods and apparatus organize a plurality of haptic output variations into a cohesive semantic framework that uses various information about the alert condition and trigger, application context, and other conditions to provide a system of haptic outputs that share characteristics between related events. In some embodiments, an event class or application class provides the basis for a corresponding haptic output. In some embodiments, whether an alert-salience setting is on provides the basis for adding an increased salience haptic output to the standard haptic output for the alert. In some embodiments, consistent haptics provide for branding of the associated application class, application, and/or context.

60. 发明申请

WO2012058597A1 SYSTEM, METHOD AND APPARATUS FOR ERROR CORRECTION IN MULTI-PROCESSOR SYSTEMS 审中-公开
标题翻译：用于多处理器系统中错误校正的系统，方法和装置
公开(公告)号：WO2012058597A1
公开(公告)日：2012-05-03
申请号：PCT/US2011/058394
申请日：2011-10-28
申请人： MAXWELL TECHNOLOGIES, INC. , HILLMAN, Robert , WILLIAMSON, Gale
发明人： HILLMAN, Robert , WILLIAMSON, Gale
IPC分类号： G06F11/00
CPC分类号： G06F11/073 , G06F11/0724 , G06F11/0763 , G06F11/1658 , G06F11/184 , G06F2201/83
摘要： This disclosure provides apparatus, methods and systems for error correction in multi processor systems. Some implementations include a plurality of computing modules, each computing module including a processor. Each processor may include processing state. In some other implementations, each computing module may also include a memory. Upon receiving a signal to perform a partial re-synchronization, a hash of each processor's state data may be performed. In some embodiments, a hash of at least a portion of each computing module's memory data may also be performed. The hashes for each processor are then compared to determine majority hashes and possible minority hashes. Upon identifying a minority hash, the computing module that produced the minority hash may receive new processing state data from one of the computing modules that produced a majority hash.
摘要翻译：本公开提供了用于多处理器系统中的纠错的装置，方法和系统。一些实施方式包括多个计算模块，每个计算模块包括处理器。每个处理器可以包括处理状态。在一些其他实现中，每个计算模块还可以包括存储器。在接收到执行部分重新同步的信号时，可以执行每个处理器的状态数据的散列。在一些实施例中，还可以执行每个计算模块的存储器数据的至少一部分的散列。然后对每个处理器的散列进行比较，以确定大多数散列和可能的少数散列。在识别少数散列时，产生少数散列的计算模块可以从产生多数散列的计算模块之一接收新的处理状态数据。

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