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    • 57. 发明授权
    • Light irradiation head and information storage apparatus
    • 光照射头和信息存储装置
    • US07239599B2
    • 2007-07-03
    • US11057989
    • 2005-02-15
    • Fumihiro TawaShinya Hasegawa
    • Fumihiro TawaShinya Hasegawa
    • G11B7/00
    • G11B5/127G11B11/10532G11B2005/0005G11B2005/0021
    • A light irradiation head of the present invention includes: a propagation body having a tapered two dimensional shape axially symmetrical to a predetermined symmetrical axis, and consisting of a first kind material that propagates electromagnetic fields of light; and a covering body covering the propagation body so as to surround the symmetrical axis, and consisting of a second kind material different from the first kind material. The propagation body further includes: a bottom edge of projecting shape or recessed shape which is present on the symmetrical axis and which is axially symmetrical to the symmetrical axis; a tip edge which is present on the symmetrical axis and which is narrow relative to the bottom edge; and a pair of reflective edges which are present on both sides of the symmetrical axis and whose interval is gradually reduced in the direction from the bottom edge side to the tip edge side.
    • 本发明的光照射头包括:具有与预定对称轴轴对称的锥形二维形状的传播体,由传播电磁场的第一种材料构成; 以及覆盖所述传播体以覆盖所述对称轴线的覆盖体,并且由与所述第一种材料不同的第二种材料构成。 传播体还包括:在对称轴上存在并且与对称轴线轴对称的突出形状或凹陷形状的底部边缘; 尖端边缘,其位于对称轴线上并且相对于底部边缘窄; 以及一对反射边缘,其存在于对称轴线的两侧,并且其间隔从底边缘侧到前端边缘侧的方向逐渐减小。
    • 60. 发明授权
    • Semiconductor circuit and functional block including synchronizing circuit for determining operation timing
    • 半导体电路和功能块包括用于确定操作时序的同步电路
    • US06904536B2
    • 2005-06-07
    • US09895997
    • 2001-06-28
    • Shinya Hasegawa
    • Shinya Hasegawa
    • G06F13/42G06F1/12G11C11/34G06F1/04H03K3/00
    • G06F1/12
    • The burden of developing a complex bridge block imposed on the IP reuser is reduced by introducing a system clock into the IP. The IP composed of a functional circuit of this invention and its synchronizing circuit takes in the system clock by integrating the synchronizing circuit taking in the system clock with the IP functional circuit into the IP in reusing the IP complying with the standard in the development of an LSI with a built-in IP and its derivatives. This enables the reuser to incorporate the IP into the LSI via a simple bridge block, taking into account only the system clock for driving the system bus, which reduces the burden of handling the IP and increases the reusability of the IP.
    • 通过将系统时钟引入到IP中,可以减轻开发复杂的桥接块对IP重定位器的负担。 由本发明的功能电路构成的IP及其同步电路通过将采用系统时钟的同步电路与IP功能电路集成到IP中来实现系统时钟,将IP符合标准的IP重用于IP LSI内置IP及其衍生产品。 这使得重新定位器能够通过简单的桥接块将IP并入LSI中,仅考虑用于驱动系统总线的系统时钟,这降低了处理IP的负担并增加了IP的可重用性。