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51. 发明授权

US08357107B2 Blood glucose meter having integral lancet device and test strip storage vial for single handed use and methods for using same 有权
标题翻译：具有整体式柳叶刀装置的血糖仪和用于单手使用的测试条存储小瓶及其使用方法
公开(公告)号：US08357107B2
公开(公告)日：2013-01-22
申请号：US11980651
申请日：2007-10-31
申请人： Gregg R. Draudt , Dirk Ahlgrim , Jan Schminke , Mark Follman , José Colucci, Jr. , Raymond Yao , Robert J. McCaffrey , Victor Chan
发明人： Gregg R. Draudt , Dirk Ahlgrim , Jan Schminke , Mark Follman , José Colucci, Jr. , Raymond Yao , Robert J. McCaffrey , Victor Chan
IPC分类号： A61B5/00 , B65D81/00
CPC分类号： A61B5/14532 , A61B5/150022 , A61B5/150175 , A61B5/150259 , A61B5/150358 , A61B5/15087 , A61B5/15113 , A61B5/15115 , A61B5/15186 , A61B5/1519 , A61B5/157 , A61B2562/0295 , G01N33/523 , G01N33/526 , G01N33/66
摘要： A blood glucose meter having a test strip port and an adjustable lancet device disposed at the same end of the device body is disclosed. The device body further includes an enclosure at the proximal end of the device body which houses a test strip storage vial and which facilitates one-handed opening and closing of the vial to simplify access to test strips contained therein. The enclosure is further provided with a window which allows the reading of the lot numbers on the label of the test strip vial therein without necessitating removal of the vial. A data connector is also provided on the device body for communication access, such as to upload data from other devices or to download data to other devices. By combining these multiple components into a single device body, the blood glucose meter requires fewer steps for sampling and testing, and makes device use easier and more convenient.
摘要翻译：公开了一种具有测试条端口和设置在装置本体的同一端的可调整的柳叶刀装置的血糖仪。装置主体还包括位于装置本体的近端处的壳体，其容纳测试条存储小瓶并且便于单手打开和关闭小瓶以简化对其中包含的测试条的访问。外壳还设置有窗口，其允许读取测试条瓶标签上的批号，而不需要移除小瓶。数据连接器还提供在设备主体上用于通信访问，例如从其他设备上传数据或将数据下载到其他设备。通过将这些多个组件组合到单个设备主体中，血糖仪需要更少的采样和测试步骤，并且使设备使用更容易和更方便。

52. 发明申请

US20120130376A1 SURGICAL INSTRUMENTATION AND METHODS OF USE FOR IMPLANTING A PROSTHESIS 审中-公开
标题翻译：外科手术和用于植入前列腺的使用方法
公开(公告)号：US20120130376A1
公开(公告)日：2012-05-24
申请号：US13001080
申请日：2009-06-25
申请人： Thomas Loring , Stephen Gilbert , Victor Chan , Chulho Pak , Michael Daniels , Gregory Horton , James K. Deorio , Michael Coughlin , Keith Wapner
发明人： Thomas Loring , Stephen Gilbert , Victor Chan , Chulho Pak , Michael Daniels , Gregory Horton , James K. Deorio , Michael Coughlin , Keith Wapner
IPC分类号： A61F2/46 , A61B17/88 , A61B17/16 , A61B17/90
CPC分类号： A61B17/15 , A61B17/025 , A61B17/1682 , A61B17/1739 , A61B17/1775 , A61F2/4202 , A61F2/46
摘要： A tissue resection guide for use with a datum includes a base releasably engagable with the datum. The tissue resection guide has a first frame fixed relative to the base and the first frame has at least one integral first guide path that is sized and configured to at least partially capture and guide a first tissue resection tool relative to the first frame.
摘要翻译：与基准面一起使用的组织切除引导件包括可释放地与基准面接合的基座。所述组织切除引导件具有相对于所述基座固定的第一框架，并且所述第一框架具有至少一个整体的第一引导路径，所述第一引导路径的尺寸和构造用于至少部分地相对于所述第一框架捕获和引导第一组织切除工具。

53. 发明授权

US08012821B2 Semiconductor embedded resistor generation 有权
标题翻译：半导体嵌入式电阻器生成
公开(公告)号：US08012821B2
公开(公告)日：2011-09-06
申请号：US12364764
申请日：2009-02-03
申请人： Choongryul Ryou , Seunghwan Lee , Jun Yuan , Victor Chan , Manfred Eller , Nam Sung Kim , Narasimhulu Kanike , Srikanth Balaji Samavedam
发明人： Choongryul Ryou , Seunghwan Lee , Jun Yuan , Victor Chan , Manfred Eller , Nam Sung Kim , Narasimhulu Kanike , Srikanth Balaji Samavedam
IPC分类号： H01L21/8238
CPC分类号： H01L27/0629 , H01L23/5256 , H01L28/20 , H01L2924/0002 , H01L2924/00
摘要： Generating an embedded resistor in a semiconductor device includes forming a shallow trench isolation (STI) region in a substrate; forming a pad oxide on the STI region and substrate; depositing a silicon layer on the pad oxide; forming a photo-resist mask on a portion of the silicon layer disposed above the STI region; etching the silicon layer to yield a polyconductor above the STI region; oxidizing the polyconductor; depositing an oxide material or a metal gate material on the oxidized surface; depositing a silicon layer on the oxide material or metal gate material; depositing additional silicon on a portion of the silicon layer above the STI region; patterning a transistor gate with a photo-resist mask on another portion of the silicon layer away from the STI region; and etching the silicon layer to yield a transistor structure away from the STI region and a resistor structure above the STI region.
摘要翻译：在半导体器件中产生嵌入式电阻器包括在衬底中形成浅沟槽隔离（STI）区域; 在STI区和衬底上形成衬垫氧化物; 在衬垫氧化物上沉积硅层; 在设置在STI区域上方的硅层的一部分上形成光刻胶掩模; 蚀刻硅层以在STI区域上方产生多导体; 氧化多导体; 在氧化表面上沉积氧化物材料或金属栅极材料; 在氧化物材料或金属栅极材料上沉积硅层; 在STI区域上方的硅层的一部分上沉积附加的硅; 在硅层的远离STI区域的另一部分上形成具有光致抗蚀剂掩模的晶体管栅极; 并蚀刻硅层以产生远离STI区域的晶体管结构和在STI区域上方的电阻器结构。

54. 发明授权

US07943486B2 Enhancement of electron and hole mobilities in <110> Si under biaxial compressive strain 有权
标题翻译：在双轴压缩应变下，增强了<110> Si中的电子和空穴迁移率
公开(公告)号：US07943486B2
公开(公告)日：2011-05-17
申请号：US12115731
申请日：2008-05-06
申请人： Victor Chan , Massimo V. Fischetti , John M. Hergenrother , Meikei Ieong , Rajesh Rengarajan , Alexander Reznicek , Paul M. Solomon , Chun-yung Sung , Min Yang
发明人： Victor Chan , Massimo V. Fischetti , John M. Hergenrother , Meikei Ieong , Rajesh Rengarajan , Alexander Reznicek , Paul M. Solomon , Chun-yung Sung , Min Yang
IPC分类号： H01L21/30
CPC分类号： H01L29/7842 , H01L21/823807 , H01L29/045 , H01L29/6659 , H01L29/7833 , H01L29/7843 , H01L29/7846 , H01L29/78684
摘要： The present invention provides a semiconductor material that has enhanced electron and hole mobilities that comprises a Si-containing layer having a crystal orientation and a biaxial compressive strain. The term “biaxial compressive stress” is used herein to describe the net stress caused by longitudinal compressive stress and lateral stress that is induced upon the Si-containing layer during the manufacturing of the semiconductor material. Other aspect of the present invention relates to a method of forming the semiconductor material of the present invention. The method of the present invention includes the steps of providing a silicon-containing layer; and creating a biaxial strain in the silicon-containing layer.
摘要翻译：本发明提供了具有增强的电子和空穴迁移率的半导体材料，其包含具有<110>晶体取向和双轴压缩应变的含Si层。本文中使用的术语“双轴压应力”来描述在制造半导体材料期间由含Si层引起的纵向压应力和横向应力引起的净应力。本发明的另一方面涉及形成本发明的半导体材料的方法。本发明的方法包括提供含硅<110>层的步骤; 并在含硅<110>层中产生双轴应变。

55. 发明申请

US20100197106A1 SEMICONDUCTOR EMBEDDED RESISTOR GENERATION 有权
标题翻译：半导体嵌入式电阻发生器
公开(公告)号：US20100197106A1
公开(公告)日：2010-08-05
申请号：US12364764
申请日：2009-02-03
申请人： Choongryul Ryou , Seunghwan Lee , Jun Yuan , Victor Chan , Manfred Eller , Nam Sung Kim , Narasimhulu Kanike , Srikanth Balaji Samavedam
发明人： Choongryul Ryou , Seunghwan Lee , Jun Yuan , Victor Chan , Manfred Eller , Nam Sung Kim , Narasimhulu Kanike , Srikanth Balaji Samavedam
IPC分类号： H01L21/76 , G06F17/50
CPC分类号： H01L27/0629 , H01L23/5256 , H01L28/20 , H01L2924/0002 , H01L2924/00
摘要： A method for generating an embedded resistor in a semiconductor device and related computer-readable storage medium are provided, the method and program steps of the medium including forming a shallow trench isolation (STI) region in a substrate; forming a pad oxide on the STI region and substrate; depositing a silicon layer on the pad oxide; forming a photo-resist mask on a portion of the silicon layer disposed substantially above the STI region.; etching the silicon layer to yield a polyconductor (PC) disposed substantially above the STI region; oxidizing the PC; depositing at least one of an oxide material or a metal gate material on the oxidized surface; depositing a silicon layer on the at least one oxide material or metal gate material; depositing additional silicon on a portion of the silicon layer disposed substantially above the STI region; patterning a transistor gate with a photo-resist mask disposed on another portion of the silicon layer disposed substantially away from the STI region; and etching the silicon layer to yield at least one transistor structure disposed substantially away from the STI region and at least one resistor structure disposed substantially above the STI region.
摘要翻译：提供了一种用于在半导体器件和相关的计算机可读存储介质中产生嵌入式电阻器的方法，所述介质的方法和程序步骤包括在衬底中形成浅沟槽隔离（STI）区域; 在STI区和衬底上形成衬垫氧化物; 在衬垫氧化物上沉积硅层; 在基本上位于STI区域上方的硅层的一部分上形成光刻胶掩模; 蚀刻硅层以产生基本上位于STI区域上方的多导体（PC）; 氧化PC; 在氧化表面上沉积氧化物材料或金属栅极材料中的至少一种; 在所述至少一种氧化物材料或金属栅极材料上沉积硅层; 在基本上位于STI区域上方的硅层的一部分上沉积附加的硅; 图案化具有设置在基本上远离STI区域设置在硅层的另一部分上的光致抗蚀剂掩模的晶体管栅极; 并且蚀刻所述硅层以产生基本上远离所述STI区域布置的至少一个晶体管结构以及基本上设置在所述STI区域上的至少一个电阻器结构。

56. 发明申请

US20090200185A1 SYSTEMS AND METHODS FOR ADMINISTERING A MEDICAL REGIMEN 有权
标题翻译：用于管理医疗方案的系统和方法
公开(公告)号：US20090200185A1
公开(公告)日：2009-08-13
申请号：US12423035
申请日：2009-04-14
申请人： Mark Follman , Ray Yao , Scott Gisler , Victor Chan
发明人： Mark Follman , Ray Yao , Scott Gisler , Victor Chan
IPC分类号： A61B19/02
CPC分类号： A61B5/14532 , A61B5/150022 , A61B5/150305 , A61B5/150358 , A61B5/150786 , A61B5/150793 , A61B5/150809 , A61B5/150824 , A61B5/15087 , A61B5/157 , A61B2562/0295 , A61M5/003 , A61M5/20 , A61M5/31525 , A61M2205/3569 , A61M2205/3576 , A61M2205/52 , G06F19/00 , G06F19/3468
摘要： A medical regimen can be administered with a diagnostic and medication delivery system. In one form the system includes a medication delivery pen with a controller and a monitor for monitoring a characteristic of a bodily fluid with a controller. A case includes a compartment for removably storing the medication delivery pen and the monitor. The case includes a communications link for establishing communication between the controller of the pen and the controller of the monitor. The medication delivery pen and monitor are operable in a first mode cooperative with one another and in a second mode independent of one another.
摘要翻译：医疗方案可以与诊断和药物输送系统一起使用。在一种形式中，该系统包括具有控制器的药物输送笔和用于通过控制器监测体液特征的监测器。病例包括用于可移除地存储药物输送笔和监视器的隔间。该情况包括用于在笔的控制器和监视器的控制器之间建立通信的通信链路。药物输送笔和监视器可以彼此协作的第一模式和彼此独立的第二模式操作。

57. 发明申请

US20080052131A1 Managing a Virtual Persona Through Selective Association 审中-公开
标题翻译：通过选择性协会管理虚拟角色
公开(公告)号：US20080052131A1
公开(公告)日：2008-02-28
申请号：US11932084
申请日：2007-10-31
申请人： Ross McKegney , Darshanand Khusial , Lev Mirlas , Victor Chan
发明人： Ross McKegney , Darshanand Khusial , Lev Mirlas , Victor Chan
IPC分类号： G06Q50/00 , G06Q30/00
CPC分类号： G06Q10/10 , G06Q30/0601 , G06Q50/24
摘要： A technique is provided to generally provide user support across multiple accounts by allowing a single person or user to represent multiple organizations. An embodiment may typically provide support for a user to act on behalf of an account in the form of a virtual persona and also to provide the ability to manage the assignment of access rights allowing only prescribed privileged users to act on behalf of an account. This may then be accomplished through registration of a single identity for the user or person on the system, while allowing that person to then select the desired organization to represent for a particular session (which will be stored in the user's session).
摘要翻译：提供了一种技术来通常允许单个人或用户表示多个组织来跨多个帐户提供用户支持。一个实施例通常可以提供对用户以虚拟角色的形式代表帐户行动的支持，并且还提供管理访问权限的分配的能力，只允许规定的特权用户代表帐户行动。然后可以通过为系统上的用户或个人注册单个身份来实现，同时允许该人选择期望的组织来表示特定会话（将存储在用户的会话中）。

58. 发明申请

US20080026523A1 Structure and method to implement dual stressor layers with improved silicide control 审中-公开
标题翻译：具有改进的硅化物控制的双应力层的结构和方法
公开(公告)号：US20080026523A1
公开(公告)日：2008-01-31
申请号：US11495508
申请日：2006-07-28
申请人： Yong Meng Lee , Haining S. Yang , Victor Chan , Eng Hua Lim
发明人： Yong Meng Lee , Haining S. Yang , Victor Chan , Eng Hua Lim
IPC分类号： H01L21/8238
CPC分类号： H01L21/823807 , H01L21/823835 , H01L21/823864 , H01L29/7843
摘要： An example embodiment for a method of fabrication of a semiconductor device comprises the following. We provide a substrate with a first device region and a second device region. We provide a first type FET transistor in the first device region and provide a second type FET transistor in the second device region. We form an etch stop layer over the first and second device regions and forming a first stressor layer over the first device region. The first stressor layer puts a first type stress on the substrate in the first device region. We form a second stressor layer over the second device region. The second stressor layer puts a second type stress on the substrate in the second device region. Another example embodiment is the structure of a dual stress layer device having an etch stop layer.
摘要翻译：用于制造半导体器件的方法的示例实施例包括以下。我们提供具有第一器件区域和第二器件区域的衬底。我们在第一器件区域提供第一类型FET晶体管，并在第二器件区域中提供第二类型FET晶体管。我们在第一和第二器件区域上形成蚀刻停止层，并在第一器件区域上形成第一应激源层。第一应力层在第一器件区域中的衬底上施加第一类应力。我们在第二设备区域上形成第二应力层。第二应力层在第二器件区域中的衬底上施加第二类应力。另一示例性实施例是具有蚀刻停止层的双应力层器件的结构。

59. 发明授权

US07314790B2 Enhancement of electron and hole mobilities in <110> Si under biaxial compressive strain 失效
公开(公告)号：US07314790B2
公开(公告)日：2008-01-01
申请号：US11612309
申请日：2006-12-18
申请人： Victor Chan , Massimo V. Fischetti , John M. Hergenrother , Meikei Ieong , Rajesh Rengarajan , Alexander Reznicek , Paul M. Solomon , Chun-yung Sung , Min Yang
发明人： Victor Chan , Massimo V. Fischetti , John M. Hergenrother , Meikei Ieong , Rajesh Rengarajan , Alexander Reznicek , Paul M. Solomon , Chun-yung Sung , Min Yang
IPC分类号： H01L21/336
CPC分类号： H01L29/7842 , H01L21/823807 , H01L29/045 , H01L29/6659 , H01L29/7833 , H01L29/7843 , H01L29/7846 , H01L29/78684
摘要： The present invention provides a semiconductor material that has enhanced electron and hole mobilities that comprises a Si-containing layer having a crystal orientation and a biaxial compressive strain. The term “biaxial compressive stress” is used herein to describe the net stress caused by longitudinal compressive stress and lateral stress that is induced upon the Si-containing layer during the manufacturing of the semiconductor material. Other aspect of the present invention relates to a method of forming the semiconductor material of the present invention. The method of the present invention includes the steps of providing a silicon-containing layer; and creating a biaxial strain in the silicon-containing layer.

60. 发明申请

US20070179892A1 Previewing in live electronic commerce environment 有权
标题翻译：在现场电子商务环境中预览
公开(公告)号：US20070179892A1
公开(公告)日：2007-08-02
申请号：US11341771
申请日：2006-01-27
申请人： Victor Chan , Darshanand Khusial , Jacob Vandergoot
发明人： Victor Chan , Darshanand Khusial , Jacob Vandergoot
IPC分类号： G06Q99/00
CPC分类号： G06Q30/00 , G06Q90/00
摘要： A method for previewing electronic commerce content in a live electronic commerce environment is provided. A preview mode is selected on a live electronic commerce server, which invokes a preview application. A unique user session associated with a user is created for the preview mode. A user request is verified to ensure that the request originates from the user associated with unique user session. The request is dispatched to an electronic commerce application on the live electronic server and the request is executed.
摘要翻译：提供了一种用于在实时电子商务环境中预览电子商务内容的方法。在实时电子商务服务器上选择预览模式，该服务器调用预览应用程序。为预览模式创建与用户关联的唯一用户会话。验证用户请求以确保请求源自与唯一用户会话相关联的用户。该请求被发送到实时电子服务器上的电子商务应用，并且执行该请求。

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