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51. 发明授权

US06361832B1 Polishing pads and planarizing machines for mechanical or chemical-mechanical planarization of microelectronic-device substrate assemblies, and methods for making and using such pads and machines 失效
公开(公告)号：US06361832B1
公开(公告)日：2002-03-26
申请号：US09621021
申请日：2000-07-21
申请人： Vishnu K. Agarwal , Scott G. Meikle
发明人： Vishnu K. Agarwal , Scott G. Meikle
IPC分类号： B05D118
CPC分类号： B24B37/26 , B24B37/22 , B24D3/22 , Y10S977/776 , Y10S977/883 , Y10S977/888
摘要： Polishing pads used in the manufacturing of microelectronic devices, and apparatuses and methods for making and using such polishing pads. In one aspect of the invention, a polishing pad for planarizing microelectronic-device substrate assemblies has a backing member including a first surface and a second surface, a plurality of pattern elements distributed over the first surface of the backing member, and a hard cover layer over the pattern elements. The pattern elements define a plurality of contour surfaces projecting away from the first surface of the backing member. The cover layer at least substantially conforms to the contour surfaces of the pattern elements to form a plurality of hard nodules projecting away from the first surface of the backing member. The hard nodules define abrasive elements to contact and abrade material from a microelectronic-device substrate assembly. As such, the cover layer defines at least a portion of a planarizing surface of the polishing pad.

52. 发明授权

US06290576B1 Semiconductor processors, sensors, and semiconductor processing systems 失效
标题翻译：半导体处理器，传感器和半导体处理系统
公开(公告)号：US06290576B1
公开(公告)日：2001-09-18
申请号：US09324737
申请日：1999-06-03
申请人： Scott E. Moore , Scott G. Meikle , Magdel Crum
发明人： Scott E. Moore , Scott G. Meikle , Magdel Crum
IPC分类号： B24B100
CPC分类号： B24B37/04 , B24B49/10 , B24B57/02
摘要： Semiconductor processors, sensors, semiconductor processing systems, semiconductor workpiece processing methods, and turbidity monitoring methods are provided. According to one aspect, a semiconductor processor includes a process chamber configured to receive a semiconductor workpiece for processing; a supply connection in fluid communication with the process chamber and configured to supply slurry to the process chamber; and a sensor configured to monitor the turbidity of the slurry. Another aspect provides a semiconductor workpiece processing method including providing a semiconductor process chamber; supplying slurry to the semiconductor process chamber; and monitoring the turbidity of the slurry using a sensor.
摘要翻译：提供半导体处理器，传感器，半导体处理系统，半导体工件处理方法和浊度监测方法。根据一个方面，一种半导体处理器包括：处理室，被配置为接收用于处理的半导体工件; 供应连接，其与所述处理室流体连通并且被配置为将浆料供应到所述处理室; 以及被配置为监测浆料的浊度的传感器。另一方面提供一种半导体工件处理方法，包括提供半导体处理室; 向半导体处理室供应浆料; 并使用传感器监测浆料的浊度。

53. 发明授权

US06218295B1 Semiconductor structure with a titanium aluminum nitride layer and method for fabricating the same 有权
标题翻译：具有氮化铝钛层的半导体结构及其制造方法
公开(公告)号：US06218295B1
公开(公告)日：2001-04-17
申请号：US09138793
申请日：1998-08-24
申请人： Scott G. Meikle , Sung Kim
发明人： Scott G. Meikle , Sung Kim
IPC分类号： H01L2144
CPC分类号： H01L21/76856 , H01L21/28518 , H01L21/76843 , H01L21/76855
摘要： A semiconductor device having a contact layer and a diffusion barrier layer is fabricated by preparing a semiconductor substrate, forming a layer of titanium/aluminum alloy on the surface of the substrate and then heating the resultant structure in a nitrogen ambient to form a contact layer of titanium silicide interposed between the substrate and a diffusion barrier layer consisting of titanium/aluminum/nitride.
摘要翻译：具有接触层和扩散阻挡层的半导体器件通过制备半导体衬底，在衬底的表面上形成钛/铝合金层，然后在氮气环境中加热所得结构以形成接触层插入在基板和由钛/铝/氮化物组成的扩散阻挡层之间的硅化钛。

54. 发明授权

US5892281A Tantalum-aluminum-nitrogen material for semiconductor devices 失效
标题翻译：用于半导体器件的钽 - 铝 - 氮材料
公开(公告)号：US5892281A
公开(公告)日：1999-04-06
申请号：US660849
申请日：1996-06-10
申请人： Salman Akram , Scott G. Meikle
发明人： Salman Akram , Scott G. Meikle
IPC分类号： H01L21/768 , H01L23/532 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L21/76849 , H01L21/76843 , H01L21/7685 , H01L23/53223 , H01L2924/0002 , H01L2924/12044
摘要： Ta-Al-N is formed on a semiconductor device structure, such as a wiring line, to prevent interdiffusion between surrounding layers. The Ta-Al-N material serves as a diffusion between (i) two conductor layers, (ii) a semiconductor layer and a conductor layer, (iii) an insulator layer and a conductor layer, (iv) an insulator layer and a semiconductor layer, or (v) two semiconductor layers. Another use is to promote adhesion with adjacent layers, such as between (i) two conductor layers, (ii) a conductor layer and an insulator layer, (iii) a semiconductor layer and a conductor layer, or (iv) two semiconductor layers. The Ta-Al-N material also is used to form a contact or electrode. The Ta-Al-N material includes between 0.5% and 99.0% aluminum, between 0.5% and 99.0% tantalum, and between 0.5% and 99.0% nitrogen. The Ta-Al-N layer has a thickness between 50 angstroms and 6000 angstroms, and as part of a wiring line structure, has a thickness which is between 1% and 25% of the wiring line structure thickness.
摘要翻译： Ta-Al-N形成在诸如布线的半导体器件结构上，以防止周围层之间的相互扩散。 Ta-Al-N材料用作（i）两个导体层之间的扩散，（ii）半导体层和导体层，（iii）绝缘体层和导体层，（iv）绝缘体层和半导体层，或（v）两个半导体层。另一个用途是促进与相邻层之间的粘附，例如（i）两个导体层之间，（ii）导体层和绝缘体层，（iii）半导体层和导体层之间，或（iv）两个半导体层。 Ta-Al-N材料也用于形成接触或电极。 Ta-Al-N材料包括0.5％至99.0％的铝，0.5％至99.0％的钽和0.5％至99.0％的氮。 Ta-Al-N层的厚度在50埃至6000埃之间，并且作为布线结构的一部分，其厚度在布线结构厚度的1％和25％之间。

55. 发明授权

US5254499A Method of depositing high density titanium nitride films on semiconductor wafers 失效
标题翻译：在半导体晶片上沉积高密度氮化钛膜的方法
公开(公告)号：US5254499A
公开(公告)日：1993-10-19
申请号：US914748
申请日：1992-07-14
申请人： Gurtej S. Sandhu , Trung T. Doan , Scott G. Meikle
发明人： Gurtej S. Sandhu , Trung T. Doan , Scott G. Meikle
IPC分类号： H01L21/285 , H01L21/283
CPC分类号： H01L21/28512
摘要： Disclosed is a chemical vapor deposition method of providing a conformal layer of TiN atop a semiconductor wafer in a manner which increases density and reduces etch rate of the TiN layer. The method comprises: a) positioning a wafer within a chemical vapor deposition reactor; b) heating the positioned wafer to a selected processing temperature of from about 200.degree. C. to about 600.degree. C.; c) injecting selected quantities of a gaseous titanium organometallic precursor of the formula Ti(NR.sub.2).sub.4, where R is selected from the group consisting of H and a carbon containing radical; gaseous ammonia; and a carrier gas to within the reactor having the positioned preheated wafer therein; and d) maintaining the reactor at a pressure of from about 5 Torr to about 100 Torr and the wafer at a selected elevated temperature which in combination are effective for reacting the precursor and ammonia to deposit a film on the wafer which comprises TiN, the film having increased density and reduced etch rate over films deposited by the same method but at lower than about 5 Torr pressure. Preferably and typically, the resultant film will consist essentially of TiN, with the film having in excess of 99% TiN by volume.
摘要翻译：公开了一种化学气相沉积方法，其以提高密度并降低TiN层的蚀刻速率的方式提供半导体晶片顶部的TiN保形层。该方法包括：a）将晶片定位在化学气相沉积反应器内; b）将定位的晶片加热至选定的加工温度为约200℃至约600℃; c）注入选定量的式Ti（NR 2）4的气态钛有机金属前体，其中R选自H和含碳基团; 气氨和在其内具有定位的预热晶片的反应器内的载气; 并且d）将反应器保持在约5托至约100托的压力下，并且所述晶片在选定的升高温度下，其组合对于使前体和氨反应以在包含TiN的晶片上沉积膜是有效的，该膜具有相对于通过相同方法但低于约5Torr压力沉积的膜的密度增加和蚀刻速率降低。优选并且通常，所得膜将基本上由TiN组成，膜的体积具有超过99％的TiN。

56. 发明授权

US5231306A Titanium/aluminum/nitrogen material for semiconductor devices 失效
标题翻译：用于半导体器件的钛/铝/氮材料
公开(公告)号：US5231306A
公开(公告)日：1993-07-27
申请号：US828721
申请日：1992-01-31
申请人： Scott G. Meikle , Sung C. Kim , Donald L. Westmoreland
发明人： Scott G. Meikle , Sung C. Kim , Donald L. Westmoreland
IPC分类号： H01L23/482 , H01L23/532
CPC分类号： H01L23/4827 , H01L23/53223 , H01L2224/04026 , Y10S257/915
摘要： A barrier material for use in preventing interdiffusion of silicon and aluminum at silicon/aluminum interfaces comprises a layer of titanium, aluminum, and nitrogen between about 100.ANG. and 1000.ANG. thick. The barrier material comprises between 1% and 20% aluminum, between 30% and 60% titanium, and between 30% and 60% nitrogen. The TiAlN material is more resistant to diffusion than TiN and can be etched and sputtered like TiN. It has better thermal budget than TiN and better stability on silicon, and thus can replace TiN in many of its uses in semiconductor devices.
摘要翻译：用于防止硅/铝界面上硅和铝的相互扩散的阻挡材料包括约100安格姆和1000安格姆厚之间的钛，铝和氮层。阻挡材料包括1％至20％的铝，30％至60％的钛，以及30％至60％的氮。 TiAlN材料比TiN更能抵抗扩散，并可像TiN一样被蚀刻溅射。它具有比TiN更好的热预算和更好的硅稳定性，因此可以代替其在半导体器件中的许多应用中的TiN。

57. 发明授权

US07700436B2 Method for forming a microelectronic structure having a conductive material and a fill material with a hardness of 0.04 GPA or higher within an aperture 有权
标题翻译：用于去除微电子衬底的相邻导电材料和非导电材料的方法和装置
公开(公告)号：US07700436B2
公开(公告)日：2010-04-20
申请号：US11413256
申请日：2006-04-28
申请人： Whonchee Lee , Scott G. Meikle , Guy T. Blalock
发明人： Whonchee Lee , Scott G. Meikle , Guy T. Blalock
IPC分类号： H01L21/8242 , H01L29/00
CPC分类号： H01L21/31053 , H01L21/3212 , H01L21/32125 , H01L28/65 , H01L28/91
摘要： A microelectronic substrate and method for removing adjacent conductive and nonconductive materials from a microelectronic substrate. In one embodiment, the microelectronic substrate includes a substrate material (such as borophosphosilicate glass) having an aperture with a conductive material (such as platinum) disposed in the aperture and a fill material (such as phosphosilicate glass) in the aperture adjacent to the conductive material. The fill material can have a hardness of about 0.04 GPa or higher, and a microelectronics structure, such as an electrode, can be disposed in the aperture, for example, after removing the fill material from the aperture. Portions of the conductive and fill material external to the aperture can be removed by chemically-mechanically polishing the fill material, recessing the fill material inwardly from the conductive material, and electrochemically-mechanically polishing the conductive material. The hard fill material can resist penetration by conductive particles, and recessing the fill material can provide for more complete removal of the conductive material external to the aperture.
摘要翻译：一种用于从微电子衬底去除相邻的导电和非导电材料的微电子衬底和方法。在一个实施例中，微电子衬底包括具有设置在孔中的导电材料（例如铂）的孔的衬底材料（例如硼磷硅酸盐玻璃）和邻近导电的孔中的填充材料（例如磷硅玻璃）材料。填充材料可以具有约0.04GPa或更高的硬度，并且例如在从孔中去除填充材料之后，诸如电极的微电子结构可以设置在孔中。孔的外部的导电和填充材料的部分可以通过化学机械抛光填充材料，将填充材料从导电材料向内凹陷，以及电化学机械抛光导电材料来去除。硬填充材料可以抵抗导电颗粒的渗透，并且凹陷填充材料可以提供更全面地去除孔的外部的导电材料。

58. 发明授权

US07560017B2 Methods and apparatus for electrically detecting characteristics of a microelectronic substrate and/or polishing medium 失效
标题翻译：用于电检测微电子衬底和/或抛光介质的特性的方法和装置
公开(公告)号：US07560017B2
公开(公告)日：2009-07-14
申请号：US11482586
申请日：2006-07-06
申请人： Whonchee Lee , Scott E. Moore , Scott G. Meikle
发明人： Whonchee Lee , Scott E. Moore , Scott G. Meikle
IPC分类号： C25F3/16 , C25F7/00
CPC分类号： C25F7/00 , B23H5/08 , C25F3/14
摘要： Methods and apparatuses for detecting characteristics of a microelectronic substrate. A method in accordance with an embodiment of the invention includes positioning the microelectronic substrate proximate to and spaced apart from the first and second spaced apart electrodes, contacting the microelectronic substrate with a polishing surface of a polishing medium, removing conductive material from the microelectronic substrate by moving the substrate and/or the electrodes relative to each other while passing a variable electrical signal through the electrodes and the substrate, and detecting a change in the variable electrical signal or a supplemental electrical signal passing through the microelectronic substrate. The rate at which material is removed from the microelectronic substrate can be changed based at least in part on the change in the electrical signal.
摘要翻译：用于检测微电子衬底特性的方法和装置。根据本发明的实施例的方法包括将微电子基板定位成靠近并间隔开第一和第二间隔开的电极，使微电子基板与抛光介质的抛光表面接触，通过以下步骤从微电子基板移除导电材料：在使可变电信号通过电极和基板的同时，相对于彼此移动基板和/或电极，并且检测可变电信号的变化或通过微电子基板的补充电信号。可以至少部分地基于电信号的变化来改变材料从微电子衬底移除的速率。

59. 发明授权

US07530877B1 Semiconductor processor systems, a system configured to provide a semiconductor workpiece process fluid 失效
标题翻译：半导体处理器系统，被配置为提供半导体工件工艺流体的系统
公开(公告)号：US07530877B1
公开(公告)日：2009-05-12
申请号：US09517127
申请日：2000-03-02
申请人： Scott E. Moore , Scott G. Meikle , Magdel Crum
发明人： Scott E. Moore , Scott G. Meikle , Magdel Crum
IPC分类号： B24B49/00 , B24B51/00
CPC分类号： B24B37/04 , B24B49/10 , B24B57/02
摘要： Semiconductor processor systems, systems configured to provide a semiconductor workpiece process fluid, semiconductor workpiece processing methods, methods of preparing semiconductor workpiece process fluid, and methods of delivering semiconductor workpiece process fluid to a semiconductor processor are provided. One aspect of the invention provides a semiconductor processor system including a process chamber adapted to process at least one semiconductor workpiece using a process fluid; a connection coupled with the process chamber and configured to receive the process fluid; a sensor coupled with the connection and configured to output a signal indicative of the process fluid; and a control system coupled with the sensor and configured to control at least one operation of the semiconductor processor system responsive to the signal.
摘要翻译：提供半导体处理器系统，配置为提供半导体工件工艺流体的系统，半导体工件加工方法，半导体工件加工流体的制备方法以及将半导体工件加工流体输送到半导体处理器的方法。本发明的一个方面提供一种半导体处理器系统，其包括适于使用工艺流体处理至少一个半导体工件的处理室; 连接处理室并被配置为接收处理流体的连接; 耦合所述连接并被配置为输出指示所述过程流体的信号的传感器; 以及与所述传感器耦合并被配置为响应于所述信号来控制所述半导体处理器系统的至少一个操作的控制系统。

60. 发明授权

US07276446B2 Planarizing solutions, planarizing machines and methods for mechanical or chemical-mechanical planarization of microelectronic-device substrate assemblies 有权
标题翻译：用于微电子器件衬底组件的机械或化学机械平面化的平面化解决方案，平面化机器和方法
公开(公告)号：US07276446B2
公开(公告)日：2007-10-02
申请号：US10968827
申请日：2004-10-18
申请人： Karl M. Robinson , Scott G. Meikle
发明人： Karl M. Robinson , Scott G. Meikle
IPC分类号： H01L21/461 , H01L21/302
CPC分类号： B24B37/04 , B24B57/02 , H01L21/3212 , H01L21/7684
摘要： Planarizing solutions, planarizing machines and methods for planarizing microelectronic-device substrate assemblies using mechanical and/or chemical-mechanical planarizing processes. In one aspect of the invention, a microelectronic-device substrate assembly is planarized by abrading material from the substrate assembly using a plurality of first abrasive particles and removing material from the substrate assembly using a plurality second abrasive particles. The first abrasive particles have a first planarizing attribute, and the second abrasive particles have a second planarizing attribute. The first and second planarizing attributes are different from one another to preferably selectively remove topographical features from substrate assembly and/or selectively remove different types of material at the substrate surface.
摘要翻译：使用机械和/或化学机械平面化工艺平面化平面化微电子器件衬底组件的解决方案，平面化机器和方法。在本发明的一个方面，微电子器件衬底组件通过使用多个第一磨料颗粒从衬底组件研磨材料并使用多个第二磨料颗粒从衬底组件移除材料来平坦化。第一磨料颗粒具有第一平面化属性，并且第二磨料颗粒具有第二平面化属性。第一和第二平面化属性彼此不同，以优选地选择性地从衬底组件移除形貌特征和/或选择性地移除衬底表面处的不同类型的材料。

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