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    • 56. 发明专利
    • VERTICAL SYNCHRONIZATION SEPARATING CIRCUIT
    • JPS63224479A
    • 1988-09-19
    • JP5674387
    • 1987-03-13
    • TOSHIBA CORP
    • ITO KENJI
    • H04N5/06
    • PURPOSE:To reduce the circuit scale of a vertical synchronous separating circuit with high quantization accuracy by synchronizing a composite synchronizing signal with clock pulses of sufficiently high frequency, resetting a means which divides the frequency of a high-accuracy clock with its synchronized output, and using its frequency division output as the clock of an up/down counting means. CONSTITUTION:The composite synchronizing signal A is synchronized by D flip-flop circuits 31 and 32 and an inverter 40 with the clock pulse C. An AND circuit 41 detects one edge, e.g. leading edge of the synchronized composite synchronizing signal A and D flip-flop circuits 33-35 are reset with the detection output. When an all-'0' state is detected, a D flip-flop circuit 36, AND circuits 44 and 45, and an inverter 45 inhibit a clock for counting from being inputted to the up/down counter 37 to stop its counting operation. An AND circuit 42 resets the D flip-flop circuit 36 with the leading edge of the composite synchronizing signal A synchronized with the clock pulses C to reset the stop of the counting operation.
    • 58. 发明专利
    • DIGITAL SERVO DEVICE
    • JPS6385910A
    • 1988-04-16
    • JP23171986
    • 1986-09-30
    • TOSHIBA CORP
    • ITO KENJI
    • G05D13/62G11B15/46G11B15/467
    • PURPOSE:To perform the switching of a loop gain at a digital processing part so as to be useful for integration, by varying the detected gain of a digital detection circuit. CONSTITUTION:A latch circuit 35 latches the content of (M-1) bits of a counter 33 after shifting, and the data of a QM latched previously. Also, a latch circuit 38 latches the output signals K and L of the data of a bit processing circuit 34. the data being held in the latch circuit 35 is utilized as a control signal for the rotational frequency of servomotor. Meanwhile, the data being held in the latch circuit 38 represents whether the data for controlling rotation is within a range controlled by a linear, or whether the data for controlling the rotation exceeds the upper limit or the lower limit of a linear range. And the bit processing circuit 34 performs a role to detect a desired linear range because the linear range varies by bit shift when the detected gain is varied.
    • 60. 发明专利
    • DC ELECTROMOTIVE SYSTEM AND OPERATING METHOD THEREOF
    • JP2002234365A
    • 2002-08-20
    • JP2001031754
    • 2001-02-08
    • TOSHIBA CORP
    • KANAI TAKEOIGAWA HIDEKAZUITO KENJI
    • H02J1/00B60M3/00H02M7/12
    • PROBLEM TO BE SOLVED: To provide a DC electromotive system having little cross current among substations, and suppressing a rated capacity of equipment to a required minimum capacity, and little power loss, and to provide an operating method thereof. SOLUTION: The DC electromotive system is provided with a plurality of substations connected to be parallel with each other on a feeder 40 of a DC electric railroad. The substations respectively have: a power converter 1a, 1b, 1c, 1d for converting an AC current to a DC current; a current detector 2b, 2c, 2d for detecting the output current of the substation flowing through the feeder; and a voltage controller 3a, 3b, 3c, 3d for controlling the output voltage of the power converter based on a current value detected by the current detector. The DC electromotive system is operated by a method comprising the steps of: under a state free from load and when a train is not in an electromotive interval of a predetermined reference substation, controlling the output voltage of the substations neighboring the reference substation so that the current flowing from the neighboring substations to the reference substation becomes zero or nearly equal to zero; and controlling the output voltage of the further neighboring substations of the neighboring substations based on the neighboring substations. Therefore, the output voltage is adjusted one after another as described above.