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    • 58. 发明申请
    • FLASH MEMORY ACCESS CIRCUIT
    • 闪存存取电路
    • US20100169546A1
    • 2010-07-01
    • US12377675
    • 2007-08-13
    • Victor Martinus Gerardus Van AchtNicolaas Lambert
    • Victor Martinus Gerardus Van AchtNicolaas Lambert
    • G06F12/00G06F12/02G06F13/28G06F13/24
    • G06F9/4812
    • A system comprises an instruction processor (10), a flash memory device (14a), a flash control circuit (14) and a working memory (16). Instructions of an interrupt program are kept stored in the flash memory device (14a). When the instruction processor (10) receives an interrupt signal, the instruction processor (10) executes loading instructions, to cause the flash control circuit (14) to load said instructions of the interrupt program from the flash memory device (14a) into the working memory (16). The instructions of the interrupt program are subsequently executed with the instruction processor (10) from the working memory (16). Preferably it is tested whether a copy of said instructions of the interrupt program is stored in the working memory (16) at the time of the interrupt. If the copy is found stored, execution of said instructions from the copy is started before completing execution of of access instructions that were in progress at the time of the interrupt. If the copy is not found stored, execution of the access instructions is first completed and subsequently the instruction processor (10) executes the loading instructions, followed by execution of the instructions of the copy of interrupt program from the working memory (16).
    • 系统包括指令处理器(10),闪存设备(14a),闪存控制电路(14)和工作存储器(16)。 中断程序的指令被保存在闪速存储器件(14a)中。 当指令处理器(10)接收到中断信号时,指令处理器(10)执行加载指令,使闪存控制电路(14)将来自闪存设备(14a)的中断程序指令加载到工作 记忆(16)。 随后使用来自工作存储器(16)的指令处理器(10)执行中断程序的指令。 优选地,在中断时测试中断程序的所述指令的副本是否存储在工作存储器(16)中。 如果找到存储的副本,则在中断之前完成正在进行的访问指令的执行之前,开始从副本执行所述指令。 如果没有存储副本,则首先完成访问指令的执行,随后指令处理器(10)执行加载指令,随后从工作存储器(16)执行中断程序副本的指令。
    • 60. 发明授权
    • Encoding of data words using three or more level levels
    • 使用三级或更多级别编码数据字
    • US07579968B2
    • 2009-08-25
    • US11572807
    • 2005-07-19
    • Victor M. G. Van AchtNicolaas LambertSebastian EgnerHans M. B. Boeve
    • Victor M. G. Van AchtNicolaas LambertSebastian EgnerHans M. B. Boeve
    • H03M5/02
    • H03M5/04G11C11/56G11C11/5621H03M5/20
    • A data processing circuit comprises an encoder circuit for encoding a data word, wherein each digit may have any one of three or more digit values. The data word is encoded so that digit counts in the data word satisfy predetermined criteria (the digit counts are counts of the numbers of the digits in the encoded data word that assume respective digit values). The encoder defines at least two digit maps, each digit map defining assignments of each of the available digit values to a respective different output digit value. The encoder selects at least two groups of digits within the input data word. Each group is associated with a respective one of the digit maps, the groups being selected so that when each digit map has been applied selectively to the digits from its associated group, digit counts of the number of times respective digit values occur in the data word will satisfy predetermined criteria. A data signal is generated that represents the input data word by information that identifies the selected groups and an output data word obtained by mapping the digits of each group in the input data word according to the digit map for that group.
    • 数据处理电路包括用于对数据字进行编码的编码器电路,其中每个数字可以具有三个或更多个数字值中的任何一个。 对数据字进行编码,使得数据字中的数字计数满足预定标准(数字计数是在编码数据字中的数字的数量的计数,该数字字代表各自的数字值)。 编码器定义至少两个数字映射,每个数字映射将每个可用数字值的分配定义为相应的不同的输出数字值。 编码器在输入数据字中选择至少两组数字。 每个组与数字映射中的相应一个相关联,这些组被选择,使得当每个数字映射已被选择性地应用于来自其关联组的数字时,相应数字值在数据字中出现的次数的数字计数 将满足预定的标准。 生成数据信号,其通过标识所选择的组的信息和通过根据该组的数字映射映射输入数据字中的每个组的数字而获得的输出数据字来生成输入数据字。