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51. 发明专利

DE60315532T2 未知
公开(公告)号：DE60315532T2
公开(公告)日：2008-05-15
申请号：DE60315532
申请日：2003-02-26
申请人： SANDISK CORP
发明人： LI YAN , CHEN JIAN
IPC分类号： G11C16/02 , G11C16/34 , G11C16/04 , G11C16/06 , H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792
摘要： The present invention presents a non-volatile memory having a plurality of erase units or blocks, where each block is divided into a plurality of parts sharing the same word lines to save on the row decoder area, but which can be read or programmed independently. An exemplary embodiment is a Flash EEPROM memory with a NAND architecture that has blocks composed of a left half and a right half, where each part will accommodate one or more standard page (data transfer unit) sizes of 512 bytes of data. In the exemplary embodiment, the left and right portions of a block each have separate source lines, and separate sets of source and drain select lines. During the programming or reading of the left side, as an example, the right side can be biased to produce channel boosting to reduce data disturbs. In an alternate set of embodiments, the parts can have separate well structures.

52. 发明专利

DE60214023T2 未知
公开(公告)号：DE60214023T2
公开(公告)日：2007-03-29
申请号：DE60214023
申请日：2002-09-13
申请人： SANDISK CORP
发明人： CHEN JIAN
IPC分类号： G11C16/02 , G11C16/04 , G11C11/56 , G11C16/06 , G11C16/12 , H01L21/8247 , H01L27/10 , H01L27/115 , H01L29/788 , H01L29/792
摘要： A flash non-volatile memory system that normally operates its memory cells in multiple storage states is provided with the ability to operate some selected or all of its memory cell blocks in two states instead. The two states are selected to be the furthest separated of the multiple states, thereby providing an increased margin during two state operation. This allows faster programming and a longer operational life of the memory cells being operated in two states when it is more desirable to have these advantages than the increased density of data storage that multi-state operation provides.

53. 发明专利

AT356410T 未知
公开(公告)号：AT356410T
公开(公告)日：2007-03-15
申请号：AT04756719
申请日：2004-07-07
申请人： SANDISK CORP
发明人： CHEN JIAN , LI YAN , LUTZE JEFFREY W
IPC分类号： G11C16/34
摘要： In a non-volatile semiconductor memory system (or other type of memory system), a memory cell is programmed by changing the threshold voltage of that memory cell. Because of variations in the programming speeds of different memory cells in the system, the possibility exists that some memory cells will be over programmed. That is, in one example, the threshold voltage will be moved past the intended value or range of values. The present invention includes determining whether the memory cells are over programmed.

54. 发明专利

AT336788T 未知
公开(公告)号：AT336788T
公开(公告)日：2006-09-15
申请号：AT02798963
申请日：2002-09-13
申请人： SANDISK CORP
发明人： CHEN JIAN
IPC分类号： G11C16/02 , G11C11/56 , G11C16/04 , G11C16/06 , G11C16/12 , H01L21/8247 , H01L27/10 , H01L27/115 , H01L29/788 , H01L29/792
摘要： A flash non-volatile memory system that normally operates its memory cells in multiple storage states is provided with the ability to operate some selected or all of its memory cell blocks in two states instead. The two states are selected to be the furthest separated of the multiple states, thereby providing an increased margin during two state operation. This allows faster programming and a longer operational life of the memory cells being operated in two states when it is more desirable to have these advantages than the increased density of data storage that multi-state operation provides.

55. 发明专利

AU2003297825A1 ERROR RECOVERY FOR NONVOLATILE MEMORY 未知
公开(公告)号：AU2003297825A1
公开(公告)日：2004-07-09
申请号：AU2003297825
申请日：2003-12-09
申请人： SANDISK CORP
发明人： TU LOC , CHEN JIAN
IPC分类号： G11C29/50 , G11C29/00
摘要： An error recovery technique is used on marginal nonvolatile memory cells. A marginal memory cell is unreadable because it has a voltage threshold (VT) of less than zero volts. By biasing adjacent memory cells, this will shift the voltage threshold of the marginal memory cells, so that it is a positive value. Then the VT of the marginal memory cell can be determined. The technique is applicable to both binary and multistate memory cells.

56. 发明专利

DE602006020494D1 FORTGESETZTE VERIFIKATION BEI SCHREIBOPERATIONEN IN NICHTFLÜCHTIGEN SPEICHER 未知
公开(公告)号：DE602006020494D1
公开(公告)日：2011-04-14
申请号：DE602006020494
申请日：2006-12-27
申请人： SANDISK CORP
发明人： CHEN JIAN
IPC分类号： G11C16/34

57. 发明专利

DE602006007981D1 未知
公开(公告)号：DE602006007981D1
公开(公告)日：2009-09-03
申请号：DE602006007981
申请日：2006-05-11
申请人： SANDISK CORP
发明人： WAN JUN , LUTZE JEFFREY , HIGASHITANI MASAAKI , HEMINK GERRIT , OOWADA KEN , CHEN JIAN , GONGWER GEOFFREY S
IPC分类号： G11C16/34 , G11C11/56
摘要： A non-volatile memory system is programmed so as to reduce or avoid program disturb. In accordance with one embodiment, multiple program inhibit schemes are employed for a single non-volatile memory system. Program inhibit schemes are selected based on the word line being programmed. Certain program inhibit schemes have been discovered to better minimize or eliminate program disturb at select word lines. In one embodiment, selecting a program inhibit scheme includes selecting a program voltage pulse ramp rate. Different ramp rates have been discovered to better minimize program disturb when applied to select word lines. In another embodiment, the temperature of a memory system is detected before or during a program operation. A program inhibit scheme can be selected based on the temperature of the system.

58. 发明专利

AT421148T 未知
公开(公告)号：AT421148T
公开(公告)日：2009-01-15
申请号：AT05752106
申请日：2005-05-20
申请人： SANDISK CORP
发明人： TRAN DAT , PONNURU KIRAN , CHEN JIAN , LUTZE JEFFREY , WANG JUN
IPC分类号： G11C16/34
摘要： Systems and methods in accordance with various embodiments can provide for comprehensive erase verification and defect detection in non-volatile semiconductor memory. In one embodiment, the results of erasing a group of storage elements is verified using a plurality of test conditions to better detect defective and/or insufficiently erased storage elements of the group. For example, the results of erasing a NAND string can be verified by testing charging of the string in a plurality of directions with the storage elements biased to turn on if in an erased state. If a string of storage elements passes a first test process or operation but fails a second test process or operation, the string can be determined to have failed the erase process and possibly be defective. By testing charging or conduction of the string in a plurality of directions, defects in any transistors of the string that are masked under one set of conditions may be exposed under a second set of bias conditions. For example, a string may pass an erase verification operation but then be read as including one or more programmed storage elements. Such a string can be defective and mapped out of the memory device.

59. 发明专利

DE602004005211T8 未知
公开(公告)号：DE602004005211T8
公开(公告)日：2008-05-15
申请号：DE602004005211
申请日：2004-07-07
申请人： SANDISK CORP
发明人： CHEN JIAN , LI YAN , LUTZE JEFFREY W
IPC分类号： G11C16/34
摘要： In a non-volatile semiconductor memory system (or other type of memory system), a memory cell is programmed by changing the threshold voltage of that memory cell. Because of variations in the programming speeds of different memory cells in the system, the possibility exists that some memory cells will be over programmed. That is, in one example, the threshold voltage will be moved past the intended value or range of values. The present invention includes determining whether the memory cells are over programmed.

60. 发明专利

DE602004005211T2 未知
公开(公告)号：DE602004005211T2
公开(公告)日：2007-11-08
申请号：DE602004005211
申请日：2004-07-07
申请人： SANDISK CORP
发明人： CHEN JIAN , LI YAN , LUTZE JEFFREY W
IPC分类号： G11C16/34
摘要： In a non-volatile semiconductor memory system (or other type of memory system), a memory cell is programmed by changing the threshold voltage of that memory cell. Because of variations in the programming speeds of different memory cells in the system, the possibility exists that some memory cells will be over programmed. That is, in one example, the threshold voltage will be moved past the intended value or range of values. The present invention includes determining whether the memory cells are over programmed.

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