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51. 发明授权

US08533823B2 System and method for source IP anti-spoofing security 有权
公开(公告)号：US08533823B2
公开(公告)日：2013-09-10
申请号：US12392422
申请日：2009-02-25
申请人： Ronald W. Szeto , Nitin Jain , Ravindran Suresh , Philip Kwan
发明人： Ronald W. Szeto , Nitin Jain , Ravindran Suresh , Philip Kwan
IPC分类号： G06F12/00
CPC分类号： H04L63/0263 , H04L63/101 , H04L63/1441 , H04L2463/146
摘要： A system and method that provides for using source IP addresses and MAC addresses in a network to provide security against attempts by users of the network to use false source IP addresses in data packets. The system and method provide for analyzing MAC addresses and source IP addresses at the datalink (layer 2) level, and to use the information derived from such analysis to block access through a port where a host device is using a false, or spoofed, source IP address in transmitted data packets. Further, the system and method provide for validating initially learned source IP addresses, and for determining whether the number of unsuccessful attempts to validate new source IP addresses exceeds a threshold level, and where the number does exceed the threshold number the system and method can provide for operation in a possible attack mode.

52. 发明授权

US08526246B2 Write circuitry for hierarchical memory architectures 有权
标题翻译：写分层内存架构的电路
公开(公告)号：US08526246B2
公开(公告)日：2013-09-03
申请号：US13370035
申请日：2012-02-09
申请人： Siddharth Gupta , Nitin Jain , Anand Mishra
发明人： Siddharth Gupta , Nitin Jain , Anand Mishra
IPC分类号： G11C7/00
CPC分类号： G11C7/1096 , G11C7/18 , G11C7/22 , G11C8/12 , G11C8/18 , G11C11/413
摘要： A memory architecture includes a plurality of local input and output circuitries, with each local input and output circuitry associated with at least one memory bank. The memory architecture also includes a global input and output circuitry, which includes a plurality of global sub-write circuitries, is coupled to the plurality of local input and output circuitries One global sub-write circuitry is enabled and provides a write-data to a selected local input and output circuitry.
摘要翻译：存储器架构包括多个本地输入和输出电路，其中每个本地输入和输出电路与至少一个存储体相关联。存储器架构还包括全局输入和输出电路，其包括多个全局子写入电路，耦合到多个本地输入和输出电路。一个全局子写入电路被使能，并将写入数据提供给选择本地输入和输出电路。

53. 发明申请

US20130188514A1 MANAGING A CLUSTER OF SWITCHES USING MULTIPLE CONTROLLERS 审中-公开
标题翻译：使用多个控制器管理一个开关组
公开(公告)号：US20130188514A1
公开(公告)日：2013-07-25
申请号：US13557105
申请日：2012-07-24
申请人： Nitin Jain
发明人： Nitin Jain
IPC分类号： H04L12/24
CPC分类号： H04L41/042 , H04L12/18 , H04L41/12 , H04L61/103
摘要： One embodiment of the present invention provides a computing system. The computing system includes a discovery module, a high-availability management module, and a controlling module. The discovery module determines local switch-specific information associated with a switch based on a discovery response packet. The high-availability management module determines remote switch-specific information about the same switch with respect to a remote computing system. The controlling module determines whether the computing system is to manage the switch based on a metric derived from the local and remote switch-specific information.
摘要翻译：本发明的一个实施例提供一种计算系统。计算系统包括发现模块，高可用性管理模块和控制模块。发现模块基于发现响应分组来确定与交换机相关联的本地交换机特定信息。高可用性管理模块相对于远程计算系统确定关于相同交换机的远程交换机特定信息。控制模块基于从本地和远程交换机特定信息导出的度量来确定计算系统是否要管理交换机。

54. 发明申请

US20120147747A1 PRIORITY AWARE MAC FLOW CONTROL 有权
标题翻译：优先级MAC流量控制
公开(公告)号：US20120147747A1
公开(公告)日：2012-06-14
申请号：US13161439
申请日：2011-06-15
申请人： Nitin Jain , Rajkumar Jalan
发明人： Nitin Jain , Rajkumar Jalan
IPC分类号： H04L12/24 , H04L12/26
CPC分类号： H04L47/10 , G06F15/17368 , H04L12/2852 , H04L47/2433
摘要： Solutions are provided that allow a network device to apply flow control on the MAC layer while taking into account the priority of the frame of traffic. This may be accomplished by generating a frame indicating that traffic flow should be paused, while utilizing a new opcode value, or alternatively by utilizing a new type/length value (possibly combined with a new opcode value). A receiving device may then examine the fields of the frame to determine whether it should use priority-based pausing, and then examine other fields to determine which priority-levels to pause and for how long. This allows for improved efficiency in flow control on the MAC layer.
摘要翻译：提供的解决方案允许网络设备在考虑到流量帧的优先级的情况下对MAC层应用流量控制。这可以通过生成指示业务流应该被暂停，同时利用新的操作码值，或者通过利用新的类型/长度值（可能与新的操作码值组合）来实现。然后，接收设备可以检查帧的字段以确定它是否应该使用基于优先级的暂停，然后检查其他字段以确定要暂停的优先级等级以及多长时间。这样可以提高MAC层的流量控制效率。

55. 发明申请

US20120096237A1 METHOD OF IMPROVING PERFORMANCE OF A DATA STORAGE DEVICE 有权
标题翻译：提高数据存储设备性能的方法
公开(公告)号：US20120096237A1
公开(公告)日：2012-04-19
申请号：US12903975
申请日：2010-10-13
申请人： Robert Punkunus , Kallol Mandal , Sumanth Sukumar , Nitin Jain
发明人： Robert Punkunus , Kallol Mandal , Sumanth Sukumar , Nitin Jain
IPC分类号： G06F12/06
CPC分类号： G06F12/0246 , G06F3/0613 , G06F3/064 , G06F3/0659 , G06F3/0688 , G06F11/1076 , G06F2212/7202 , G06F2212/7208 , G06F2212/7209
摘要： Methods are provided for efficiently storing data to a data storage device or subsystem. The data storage device may be a Solid-State Device (SSD), and may be implemented as part of a RAID (Redundant Array of Independent Disks) or other subsystem. When existing data is read and updated, and must be re-stored, the data is assembled and stored as if it were new data, and is written in a sequential manner, instead of being written to the same storage location. A newer generation number distinguishes it from the previous version. If the storage subsystem employs data striping, stripe size may be matched with the size of a logical collection of data (e.g., an extent), so that each such logical collection of data is wholly stored on just device in the storage subsystem. Concurrent device access may be supported by concurrently writing substripes of data to each device/extent.
摘要翻译：提供了有效地将数据存储到数据存储设备或子系统的方法。数据存储设备可以是固态设备（SSD），并且可以被实现为RAID（独立磁盘的冗余阵列）或其他子系统的一部分。当现有数据被读取和更新并且必须被重新存储时，数据被组合和存储，就像它是新数据一样，并且以顺序的方式被写入，而不是被写入同一存储位置。较新版本的版本与之前的版本不同。如果存储子系统采用数据条带化，则条带大小可以与数据的逻辑集合（例如，扩展）的大小相匹配，使得每个这样的逻辑数据集合被完全存储在存储子系统中的设备上。可以通过将数据的同时写入每个设备/范围来支持并发设备访问。

56. 发明授权

US07957706B2 Combined matching and filter circuit 有权
标题翻译：组合匹配和滤波电路
公开(公告)号：US07957706B2
公开(公告)日：2011-06-07
申请号：US12701837
申请日：2010-02-08
申请人： Peter Onno , Rajanish , Nitin Jain , Christopher D. Weigand
发明人： Peter Onno , Rajanish , Nitin Jain , Christopher D. Weigand
IPC分类号： H04B1/04 , H03H7/38
CPC分类号： H03H7/1758 , H03H7/0115 , H03H7/0123 , H03H7/1766 , H03H7/1783 , H03H7/1791 , H03H7/38 , H03H2001/0064 , H03H2001/0078
摘要： A combined matching and harmonic rejection circuit with increased harmonic rejection provided by a split resonance for one or more of the capacitive or inductive elements of the circuit. At a fundamental frequency, the circuit comprises an inductive series arm with capacitive shunt arms. The capacitance of a shunt arm may be provided by two or more parallel paths, each having a capacitor and an inductor in series so that, in addition to providing the effective capacitance necessary for impedance matching at the fundamental frequency, two separate harmonics represented by the series resonances of the parallel paths are rejected. In this manner, an extra null in the circuit's stop-band may be achieved using the same number of shunt elements necessary to achieve impedance matching at the fundamental frequency.
摘要翻译：一种组合匹配和谐波抑制电路，其具有由电路的一个或多个电容或电感元件的分裂谐振提供的增加的谐波抑制电路。在基频处，电路包括具有电容分流臂的感应串联臂。分流臂的电容可以由两个或更多个并联路径提供，每个并联路径具有串联的电容器和电感器，使得除了提供在基频处的阻抗匹配所必需的有效电容之外，由并行路径的串联谐振被拒绝。以这种方式，可以使用在基频实现阻抗匹配所需的相同数量的并联元件来实现电路的阻带中的额外零点。

57. 发明申请

US20210235282A2 BEAMFORMING INTEGRATED CIRCUIT, AESA SYSTEM AND METHOD 有权
公开(公告)号：US20210235282A2
公开(公告)日：2021-07-29
申请号：US16231799
申请日：2018-12-24
申请人： Pavel Brechko , David W. Corman , Vipul Jain , Shamsun Nahar , Jason Durbin , Nitin Jain
发明人： Pavel Brechko , David W. Corman , Vipul Jain , Shamsun Nahar , Jason Durbin , Nitin Jain
IPC分类号： H04W16/28 , H04B7/06 , H04B7/10
摘要： A beamforming integrated circuit system is configured to optimize performance. Among other things, the system may run at a lower power than conventional integrated circuits, selectively disable branches to control certain system functions, and/or selectively position ground pads around receiving pads to enhance isolation. The system also may use a beamforming integrated circuit as a distribution circuit for a number of similar or like beamforming integrated circuits.

58. 发明授权

US09819454B2 Wireless communication apparatus and method for HARQ buffer management 有权
公开(公告)号：US09819454B2
公开(公告)日：2017-11-14
申请号：US14568087
申请日：2014-12-11
申请人： Nitin Jain , Maneesh Gupta
发明人： Nitin Jain , Maneesh Gupta
IPC分类号： H04J3/00 , H04L1/18
CPC分类号： H04L1/1812 , H04L1/1809 , H04L1/1819 , H04L1/1822 , H04L1/1835
摘要： A transmission node in a wireless communication network includes a receiving unit for receiving a set of data packets transmitted from a set of nodes in the network scheduled in one TTI, a memory unit having a number of memory blocks, each for storing a set of data packets transmitted in a separate TTI of a HARQ process. Each memory block includes sub-memory blocks, each of which is for storing a data packet transmitted from a separate UE. The transmission node further includes a processor for allocating the set of data packets to the sub-memory blocks and releasing the sub-memory blocks after one HARQ process upon receipt of the set of data packets.

59. 发明申请

US20160174216A1 WIRELESS COMMUNICATION APPARATUS AND METHOD FOR HARQ BUFFER MANAGEMENT 有权
标题翻译：无线通信装置和HARQ缓冲器管理方法
公开(公告)号：US20160174216A1
公开(公告)日：2016-06-16
申请号：US14568087
申请日：2014-12-11
申请人： Nitin Jain , Maneesh Gupta
发明人： Nitin Jain , Maneesh Gupta
IPC分类号： H04W72/04 , H04W72/12 , H04L1/18
CPC分类号： H04L1/1812 , H04L1/1809 , H04L1/1819 , H04L1/1822 , H04L1/1835
摘要： A transmission node in a wireless communication network includes a receiving unit for receiving a set of data packets transmitted from a set of nodes in the network scheduled in one TTI, a memory unit having a number of memory blocks, each for storing a set of data packets transmitted in a separate TTI of a HARQ process. Each memory block includes sub-memory blocks, each of which is for storing a data packet transmitted from a separate UE. The transmission node further includes a processor for allocating the set of data packets to the sub-memory blocks and releasing the sub-memory blocks after one HARQ process upon receipt of the set of data packets.
摘要翻译：无线通信网络中的传输节点包括：接收单元，用于接收从在一个TTI中调度的网络中的一组节点发送的一组数据分组;存储单元，具有多个存储块，每个用于存储一组数据在HARQ进程的单独TTI中发送的分组。每个存储器块包括子存储器块，每个存储器块用于存储从单独的UE发送的数据分组。发送节点还包括处理器，用于在接收到该组数据分组之后，在一个HARQ进程之后将该组数据分组分配给子存储器块并释放子存储器块。

60. 发明授权

US08971944B2 Method and devices of communicating physical cell identifier information to mobile stations 有权
标题翻译：将物理小区标识符信息传送到移动台的方法和设备
公开(公告)号：US08971944B2
公开(公告)日：2015-03-03
申请号：US13346269
申请日：2012-01-09
申请人： Nitin Jain , Venkata Raju Indukuri
发明人： Nitin Jain , Venkata Raju Indukuri
IPC分类号： H04B7/00 , H04W8/26 , H04W28/04 , H04W48/08 , H04W88/08
CPC分类号： H04W8/26 , H04W28/04 , H04W48/08 , H04W88/08
摘要： The present invention provides a method and system for communicating physical cell identifier information to mobile stations. In one embodiment, a method includes detecting a need to change a physical cell identifier associated with a cell in a telecommunication network used for serving the mobile station. The method also includes communicating physical cell identifier information to the mobile station based on the detected need to change the physical cell identifier. The method includes employing another physical cell identifier associated with the cell based on the communicated physical cell identifier information. The physical cell identifier information is communicated in one or more modification periods such that said another physical cell identifier is employed by the base station and the mobile station at a boundary of one of the modification periods. Moreover, the method includes continue serving the mobile station based on the employed said another physical cell identifier.
摘要翻译：本发明提供了一种用于将物理小区标识符信息传送到移动台的方法和系统。在一个实施例中，一种方法包括检测需要改变与用于服务移动站的电信网络中的小区相关联的物理小区标识符。该方法还包括基于检测到的改变物理小区标识符的需要向物理小区标识信息传送到移动台。该方法包括基于所传送的物理小区标识符信息采用与小区相关联的另一个物理小区标识符。在一个或多个修改周期中传送物理小区标识符信息，使得所述另一个物理小区标识符被基站和移动站采用在修改周期之一的边界。此外，该方法包括基于所采用的所述另一个物理小区标识符继续为移动台服务。

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