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51. 发明授权

US06664592B2 Semiconductor device with groove type channel structure 失效
标题翻译：具有凹槽型沟道结构的半导体器件
公开(公告)号：US06664592B2
公开(公告)日：2003-12-16
申请号：US10330280
申请日：2002-12-30
申请人： Seiji Inumiya , Tomohiro Saito , Atsushi Yagishita , Katsuhiko Hieda , Toshihiko Iinuma
发明人： Seiji Inumiya , Tomohiro Saito , Atsushi Yagishita , Katsuhiko Hieda , Toshihiko Iinuma
IPC分类号： H01L2976
CPC分类号： H01L29/495 , H01L21/28114 , H01L21/28123 , H01L21/76801 , H01L21/76829 , H01L21/76831 , H01L21/76832 , H01L21/76834 , H01L21/76897 , H01L21/823437 , H01L29/41783 , H01L29/4941 , H01L29/6653 , H01L29/66537 , H01L29/66545 , H01L29/6659 , H01L29/66621 , H01L29/78 , Y10S257/90
摘要： A semiconductor device includes a semiconductor substrate, a gate insulator film formed on a bottom surface and a side surface of a groove formed in the semiconductor substrate, a gate electrode having a lower portion buried in the groove on whose bottom and side surface the gate insulator film is formed, and an upper portion protruding a surface of said semiconductor substrate, and source region and a drain region formed on a surface of the semiconductor substrate in such a way as to sandwich the gate electrode. A thickness of the upper portion of the gate electrode protruding the surface of the semiconductor substrate is equal to or greater than twice a thickness of the lower portion of the gate electrode buried in the groove.
摘要翻译：半导体器件包括半导体衬底，形成在半导体衬底的凹槽的底面和凹槽的侧面上的栅极绝缘体膜，栅电极，其下部埋设在沟槽中，栅极绝缘体的底部和侧表面上的栅极绝缘体并且形成在半导体衬底的表面上的源极区域和漏极区域以夹着栅极电极的方式突出所述半导体衬底的表面的上部。突出半导体衬底表面的栅电极的上部的厚度等于或大于埋在槽中的栅电极的下部的厚度的两倍。

52. 发明授权

US06294481B1 Semiconductor device and method for manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US06294481B1
公开(公告)日：2001-09-25
申请号：US09232849
申请日：1999-01-19
申请人： Seiji Inumiya , Yoshio Ozawa
发明人： Seiji Inumiya , Yoshio Ozawa
IPC分类号： H01L213115
CPC分类号： H01L21/28202 , H01L21/28185 , H01L21/2822 , H01L21/31155 , H01L21/76224 , H01L21/823481 , H01L29/42368 , H01L29/518
摘要： A semiconductor device is provided in which a lowering in the breakdown voltage of a gate insulating film (nitrided silicon oxide film) in a boundary region between the upper-end corner portion of the side wall of an element isolating groove and a silicon substrate in the end portion of an element forming region which is formed in contact therewith can be suppressed without causing an increase in the number of steps (time for effecting the steps). An element isolation insulating film is filled into the internal portion of the element isolating groove to cover the end portion of the silicon substrate in the element forming region which is formed in contact with the upper-end portion of the side wall of the element isolating groove, nitrogen is selectively doped into the surface of the silicon substrate in a region of the element forming region other than the end portion thereof with the element isolation insulating film used as a mask, then a portion of the element isolation insulating film lying outside the element isolating groove is removed to expose the upper-end portion of the side wall, and a nitrided silicon oxide film used as the gate insulating film is formed by the heat treatment in an atmosphere containing an oxidizing agent.
摘要翻译：提供了一种半导体器件，其中在元件隔离槽的侧壁的上端拐角部分和硅衬底的边界区域中的栅极绝缘膜（氮化硅氧化物膜）的击穿电压降低可以抑制与其接触形成的元件形成区域的端部，而不会增加步骤数（进行步骤的时间）。元件隔离绝缘膜被填充到元件隔离槽的内部，以覆盖与元件隔离槽的侧壁的上端部接触形成的元件形成区域中的硅基板的端部在元件隔离绝缘膜用作掩模的情况下，在除了其端部之外的元件形成区域的区域中的氮衬底的表面中选择性地掺杂氮，然后元件隔离绝缘膜的位于元件外部的部分去除隔离槽以暴露侧壁的上端部分，并且在包含氧化剂的气氛中通过热处理形成用作栅极绝缘膜的氮化氧化硅膜。

53. 发明授权

US6054355A Method of manufacturing a semiconductor device which includes forming a dummy gate 失效
标题翻译：制造半导体器件的方法，包括形成虚拟栅极
公开(公告)号：US6054355A
公开(公告)日：2000-04-25
申请号：US105956
申请日：1998-06-29
申请人： Seiji Inumiya , Tomohiro Saito , Atsushi Yagishita , Katsuhiko Hieda , Toshihiko Iinuma
发明人： Seiji Inumiya , Tomohiro Saito , Atsushi Yagishita , Katsuhiko Hieda , Toshihiko Iinuma
IPC分类号： H01L21/28 , H01L21/336 , H01L21/60 , H01L21/768 , H01L21/8234 , H01L29/423 , H01L29/49
CPC分类号： H01L29/495 , H01L21/28114 , H01L21/28123 , H01L21/76801 , H01L21/76829 , H01L21/76831 , H01L21/76832 , H01L21/76834 , H01L21/76897 , H01L21/823437 , H01L29/41783 , H01L29/6653 , H01L29/66545 , H01L29/6659 , H01L29/66621 , H01L29/78 , H01L29/4941 , H01L29/66537 , Y10S257/90
摘要： A method of manufacturing a semiconductor device comprises the steps of forming a first film and a second film on a semiconductor substrate, selectively removing the second film, the first film and a top portion of the semiconductor substrate to form a first groove, burying a first insulator film in the first groove to form an isolation region, patterning the second film surrounded by the isolation region to form a dummy gate layer, doping the semiconductor substrate with an impurity using the dummy gate layer as a mask, forming a second insulator film on the semiconductor substrate surrounded by the dummy gate layer and the first insulator film, removing the dummy gate layer and the first film to form a second groove, forming a gate insulator film on the semiconductor substrate in the second groove, and forming a gate electrode on the gate insulator film in the second groove.
摘要翻译：一种制造半导体器件的方法包括以下步骤：在半导体衬底上形成第一膜和第二膜，选择性地去除第二膜，第一膜和半导体衬底的顶部以形成第一槽，在第一沟槽中形成绝缘体膜以形成隔离区域，对由隔离区域包围的第二膜进行构图以形成伪栅极层，使用伪栅极层作为掩模将杂质掺杂到半导体衬底上，形成第二绝缘膜所述半导体基板被所述伪栅极层和所述第一绝缘膜包围，去除所述伪栅极层和所述第一膜以形成第二沟槽，在所述第二沟槽中的所述半导体基板上形成栅极绝缘膜，并且形成栅电极第二槽中的栅极绝缘膜。

54. 发明授权

US08461006B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08461006B2
公开(公告)日：2013-06-11
申请号：US13434889
申请日：2012-03-30
申请人： Masato Koyama , Yoshinori Tsuchiya , Seiji Inumiya
发明人： Masato Koyama , Yoshinori Tsuchiya , Seiji Inumiya
IPC分类号： H01L21/8234
CPC分类号： H01L21/823842 , H01L21/28097 , H01L21/823835 , H01L21/823857 , H01L29/4975 , H01L29/517 , H01L29/665 , H01L29/66545
摘要： It is made possible to provide a method for manufacturing a semiconductor device that includes CMISs each having a low threshold voltage Vth and a Ni-FUSI/SiON or high-k gate insulating film structure. The method comprises: forming a p-type semiconductor region and an n-type semiconductor region insulated from each other in a substrate; forming a first and second gate insulating films on the p-type and n-type semiconductor regions, respectively; forming a first nickel silicide having a composition of Ni/Si
摘要翻译：可以提供一种半导体器件的制造方法，该半导体器件包括具有低阈值电压Vth和Ni-FUSI / SiON或高k栅极绝缘膜结构的CMIS。该方法包括：在衬底中形成彼此绝缘的p型半导体区域和n型半导体区域; 在p型和n型半导体区分别形成第一和第二栅极绝缘膜; 在所述第二栅极绝缘膜上形成具有Ni / Si <31/12以上的第一栅极绝缘膜的第一镍硅化物和具有Ni / Si> 31/12的组成的第二硅化镍; 以及通过使铝通过第一硅化镍扩散，在第一硅化镍和第一栅极绝缘膜之间的界面处分离铝。

55. 发明授权

US08435858B2 Semiconductor device manufacturing method 有权
标题翻译：半导体器件制造方法
公开(公告)号：US08435858B2
公开(公告)日：2013-05-07
申请号：US13282507
申请日：2011-10-27
申请人： Seiji Inumiya , Tomonori Aoyama
发明人： Seiji Inumiya , Tomonori Aoyama
IPC分类号： H01L21/336
CPC分类号： H01L21/28167 , H01L21/02057 , H01L21/28088 , H01L21/28194 , H01L21/28202 , H01L21/7624 , H01L21/823857 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66795 , H01L29/785
摘要： A semiconductor device manufacturing method includes: removing an insulating film on a semiconductor substrate by using wet etching and subsequently oxidizing a surface of the substrate by using a liquid oxidation agent without exposing this surface to an atmosphere, thereby forming a first insulating film containing an oxide of a constituent element of the substrate on the surface of the substrate; forming a second insulating film containing aluminum and another metal element on the first insulating film; forming a high-k insulating film containing at least one of hafnium and zirconium on the second insulating film; forming a metal film on the high-k insulating film; and conducting heat treatment to react the first insulating film and the second insulating film, thereby forming a third insulating film made of a mixture containing aluminum, the another metal element, the constituent element of the substrate, and oxygen.
摘要翻译：半导体器件制造方法包括：通过使用湿法蚀刻在半导体衬底上去除绝缘膜，随后通过使用液体氧化剂氧化衬底的表面而不将该表面暴露在大气中，从而形成含有氧化物的第一绝缘膜所述基板表面上的所述基板的构成元件; 在所述第一绝缘膜上形成含有铝和另一金属元素的第二绝缘膜; 在所述第二绝缘膜上形成含有铪和锆中的至少一种的高k绝缘膜; 在高k绝缘膜上形成金属膜; 进行热处理以使第一绝缘膜和第二绝缘膜反应，从而形成由含有铝，另一金属元素，基板的构成元素和氧的混合物制成的第三绝缘膜。

56. 发明授权

US08198159B2 Semiconductor memory device and method of manufacturing the same 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US08198159B2
公开(公告)日：2012-06-12
申请号：US12054089
申请日：2008-03-24
申请人： Masayuki Tanaka , Yoshio Ozawa , Hirokazu Ishida , Katsuaki Natori , Seiji Inumiya
发明人： Masayuki Tanaka , Yoshio Ozawa , Hirokazu Ishida , Katsuaki Natori , Seiji Inumiya
IPC分类号： H01L21/324 , H01L29/788
CPC分类号： H01L29/7881 , G11C16/0483 , H01L21/28273 , H01L27/115 , H01L27/11521 , H01L29/42324 , H01L29/513
摘要： A semiconductor memory device includes a semiconductor substrate, an isolation insulation film filled in a plurality of trenches formed in the semiconductor substrate to define a plurality of element formation regions, a floating gate of polysilicon provided on each of the element formation regions through a first insulation film, a second insulation film, provided on the floating gate, containing a metal element, a control gate of polysilicon, provided on the second insulation film, and source/drain regions provided in the semiconductor substrate, both a polysilicon conductive layer containing a metal element and a mutual diffusion layer composed of a silicate layer of a mixed oxide material composed of a silicon element contained in the floating gate and the control gate and a metal element contained in the second insulation film are provided on a surface of each of the floating gate and the control gate, respectively.
摘要翻译：半导体存储器件包括半导体衬底，隔离绝缘膜，填充在形成于半导体衬底中的多个沟槽中，以限定多个元件形成区域;多晶硅浮置栅极，通过第一绝缘层设置在每个元件形成区域上; 设置在浮置栅极上的第二绝缘膜，包含设置在第二绝缘膜上的金属元件，多晶硅控制栅极和设置在半导体衬底中的源极/漏极区域，包含金属的多晶硅导电层元件和由浮置栅极中包含的硅元素和控制栅极组成的混合氧化物材料的硅酸盐层和包含在第二绝缘膜中的金属元素构成的互扩散层设置在每个浮动栅极的表面上门和控制门。

57. 发明授权

US08183641B2 Semiconductor device and method for manufacturing same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08183641B2
公开(公告)日：2012-05-22
申请号：US12626216
申请日：2009-11-25
申请人： Seiji Inumiya , Tomonori Aoyama
发明人： Seiji Inumiya , Tomonori Aoyama
IPC分类号： H01L29/76
CPC分类号： H01L21/823857 , H01L29/513 , H01L29/517
摘要： A silicon oxynitride film is formed on entire surface of a semiconductor substrate, a lanthanum oxide film is formed on the silicon oxynitride film and the lanthanum oxide film is removed from a pMOS region. Then, a nitrided hafnium silicate film serving as a highly dielectric film is formed on the entire surface, an aluminum-containing titanium nitride film is formed, a polysilicon film is formed, and the stacked films are patterned into a gate electrode configuration. Next, impurities are introduced into a source/drain region, and an annealing for activating the impurities is utilized to diffuse the aluminum included in the aluminum-containing titanium nitride film to the interface between the silicon oxynitride film and the nitrided hafnium aluminum silicate film in the pMOS region.
摘要翻译：在半导体衬底的整个表面上形成氧氮化硅膜，在氧氮化硅膜上形成氧化镧膜，并从pMOS区域除去氧化镧膜。然后，在整个表面上形成用作高电介质膜的氮化铪硅酸盐膜，形成含铝的氮化钛膜，形成多晶硅膜，并将层叠的膜图案化为栅电极构造。接下来，将杂质引入源极/漏极区域，并且利用用于激活杂质的退火将包含在含铝氮化钛膜中的铝扩散到氮氧化硅膜和氮化铪硅酸铝膜之间的界面 pMOS区域。

58. 发明授权

US07989896B2 Semiconductor device and method of fabricating the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US07989896B2
公开(公告)日：2011-08-02
申请号：US12612238
申请日：2009-11-04
申请人： Tomonori Aoyama , Seiji Inumiya , Kazuaki Nakajima , Takashi Shimizu
发明人： Tomonori Aoyama , Seiji Inumiya , Kazuaki Nakajima , Takashi Shimizu
IPC分类号： H01L27/11
CPC分类号： H01L21/823462 , H01L21/823412 , H01L21/823807 , H01L21/823857 , H01L27/0629 , H01L29/517
摘要： A method of fabricating a semiconductor device according to one embodiment includes: laying out a first region, a second region, a third region and a fourth region on a semiconductor substrate by forming an element isolation region in the semiconductor substrate; forming a first insulating film on the first region and the second region; forming a first semiconductor film on the first insulating film; forming a second insulating film and an aluminum oxide film thereon on the fourth region after forming of the first semiconductor film; forming a third insulating film and a lanthanum oxide film thereon on the third region after forming of the first semiconductor film; forming a high dielectric constant film on the aluminum oxide film and the lanthanum oxide film; forming a metal film on the high dielectric constant film; forming a second semiconductor film on the first semiconductor film and the metal film; and patterning the first insulating film, the first semiconductor film, the second insulating film, the aluminum oxide film, the third insulating film, the lanthanum oxide film, the high dielectric constant film, the metal film and the second semiconductor film.
摘要翻译：根据一个实施例的制造半导体器件的方法包括：通过在半导体衬底中形成元件隔离区，在半导体衬底上铺设第一区域，第二区域，第三区域和第四区域; 在所述第一区域和所述第二区域上形成第一绝缘膜; 在所述第一绝缘膜上形成第一半导体膜; 在形成第一半导体膜之后的第四区域上形成第二绝缘膜和氧化铝膜; 在形成第一半导体膜之后，在第三区域上形成第三绝缘膜和氧化镧膜; 在氧化铝膜和氧化镧膜上形成高介电常数膜; 在高介电常数膜上形成金属膜; 在所述第一半导体膜和所述金属膜上形成第二半导体膜; 以及图案化第一绝缘膜，第一半导体膜，第二绝缘膜，氧化铝膜，第三绝缘膜，氧化镧膜，高介电常数膜，金属膜和第二半导体膜。

59. 发明申请

US20100133626A1 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100133626A1
公开(公告)日：2010-06-03
申请号：US12612238
申请日：2009-11-04
申请人： Tomonori Aoyama , Seiji Inumiya , Kazuaki Nakajima , Takashi Shimizu
发明人： Tomonori Aoyama , Seiji Inumiya , Kazuaki Nakajima , Takashi Shimizu
IPC分类号： H01L27/06 , H01L21/28 , H01L21/8236
CPC分类号： H01L21/823462 , H01L21/823412 , H01L21/823807 , H01L21/823857 , H01L27/0629 , H01L29/517
摘要： A method of fabricating a semiconductor device according to one embodiment includes: laying out a first region, a second region, a third region and a fourth region on a semiconductor substrate by forming an element isolation region in the semiconductor substrate; forming a first insulating film on the first region and the second region; forming a first semiconductor film on the first insulating film; forming a second insulating film and an aluminum oxide film thereon on the fourth region after forming of the first semiconductor film; forming a third insulating film and a lanthanum oxide film thereon on the third region after forming of the first semiconductor film; forming a high dielectric constant film on the aluminum oxide film and the lanthanum oxide film; forming a metal film on the high dielectric constant film; forming a second semiconductor film on the first semiconductor film and the metal film; and patterning the first insulating film, the first semiconductor film, the second insulating film, the aluminum oxide film, the third insulating film, the lanthanum oxide film, the high dielectric constant film, the metal film and the second semiconductor film.
摘要翻译：根据一个实施例的制造半导体器件的方法包括：通过在半导体衬底中形成元件隔离区，在半导体衬底上铺设第一区域，第二区域，第三区域和第四区域; 在所述第一区域和所述第二区域上形成第一绝缘膜; 在所述第一绝缘膜上形成第一半导体膜; 在形成第一半导体膜之后的第四区域上形成第二绝缘膜和氧化铝膜; 在形成第一半导体膜之后，在第三区域上形成第三绝缘膜和氧化镧膜; 在氧化铝膜和氧化镧膜上形成高介电常数膜; 在高介电常数膜上形成金属膜; 在所述第一半导体膜和所述金属膜上形成第二半导体膜; 以及图案化第一绝缘膜，第一半导体膜，第二绝缘膜，氧化铝膜，第三绝缘膜，氧化镧膜，高介电常数膜，金属膜和第二半导体膜。

60. 发明申请

US20080176389A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20080176389A1
公开(公告)日：2008-07-24
申请号：US12054089
申请日：2008-03-24
申请人： Masayuki Tanaka , Yoshio Ozawa , Hirokazu Ishida , Katsuaki Natori , Seiji Inumiya
发明人： Masayuki Tanaka , Yoshio Ozawa , Hirokazu Ishida , Katsuaki Natori , Seiji Inumiya
IPC分类号： H01L21/4763
CPC分类号： H01L29/7881 , G11C16/0483 , H01L21/28273 , H01L27/115 , H01L27/11521 , H01L29/42324 , H01L29/513
摘要： A semiconductor memory device includes a semiconductor substrate, an isolation insulation film filled in a plurality of trenches formed in the semiconductor substrate to define a plurality of element formation regions, a floating gate of polysilicon provided on each of the element formation regions through a first insulation film, a second insulation film, provided on the floating gate, containing a metal element, a control gate of polysilicon, provided on the second insulation film, and source/drain regions provided in the semiconductor substrate, both a polysilicon conductive layer containing a metal element and a mutual diffusion layer composed of a silicate layer of a mixed oxide material composed of a silicon element contained in the floating gate and the control gate and a metal element contained in the second insulation film are provided on a surface of each of the floating gate and the control gate, respectively.
摘要翻译：半导体存储器件包括半导体衬底，隔离绝缘膜，填充在形成于半导体衬底中的多个沟槽中，以限定多个元件形成区域;多晶硅浮置栅极，通过第一绝缘层设置在每个元件形成区域上; 设置在浮置栅极上的第二绝缘膜，包含设置在第二绝缘膜上的金属元件，多晶硅控制栅极和设置在半导体衬底中的源极/漏极区域，包含金属的多晶硅导电层元件和由浮置栅极中包含的硅元素和控制栅极组成的混合氧化物材料的硅酸盐层和包含在第二绝缘膜中的金属元素构成的互扩散层设置在每个浮动栅极的表面上门和控制门。

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